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-rw-r--r--chip/g/config_chip.h2
-rw-r--r--chip/host/config_chip.h14
-rw-r--r--chip/it83xx/config_chip.h2
-rw-r--r--chip/lm4/config_chip.h2
-rw-r--r--chip/mec1322/config_chip.h4
-rw-r--r--chip/mec1322/config_flash_layout.h3
-rw-r--r--chip/mec1322/lfw/ec_lfw.c7
-rw-r--r--chip/mec1322/system.c3
-rw-r--r--chip/npcx/config_chip.h14
-rw-r--r--chip/npcx/config_flash_layout.h5
-rw-r--r--chip/npcx/spiflashfw/ec_npcxflash.c2
-rw-r--r--chip/npcx/system.c3
-rw-r--r--chip/nrf51/config_chip.h2
-rw-r--r--chip/stm32/config-stm32f03x.h1
-rw-r--r--chip/stm32/config-stm32f05x.h1
-rw-r--r--chip/stm32/config-stm32f07x.h1
-rw-r--r--chip/stm32/config-stm32f09x.h1
-rw-r--r--chip/stm32/config-stm32f373.h1
-rw-r--r--chip/stm32/config-stm32l100.h1
-rw-r--r--chip/stm32/config-stm32l15x.h1
-rw-r--r--chip/stm32/config-stm32ts60.h1
-rw-r--r--chip/stm32/config_chip.h2
-rw-r--r--chip/stm32/flash-f.c4
-rw-r--r--chip/stm32/flash-stm32l.c7
24 files changed, 42 insertions, 42 deletions
diff --git a/chip/g/config_chip.h b/chip/g/config_chip.h
index 9e763d1822..1935378ba5 100644
--- a/chip/g/config_chip.h
+++ b/chip/g/config_chip.h
@@ -23,7 +23,7 @@
#define CONFIG_RO_HEAD_ROOM 1024 /* Room for ROM signature. */
/* Describe the flash layout */
-#define CONFIG_FLASH_BASE 0x40000
+#define CONFIG_PROGRAM_MEMORY_BASE 0x40000
#define CONFIG_FLASH_PHYSICAL_SIZE (512 * 1024)
/* Compute the rest of the flash params from these */
diff --git a/chip/host/config_chip.h b/chip/host/config_chip.h
index 5df44a9315..eaaf46287f 100644
--- a/chip/host/config_chip.h
+++ b/chip/host/config_chip.h
@@ -12,13 +12,13 @@
#define CONFIG_FLASH_PHYSICAL_SIZE 0x00020000
extern char __host_flash[CONFIG_FLASH_PHYSICAL_SIZE];
-#define CONFIG_FLASH_BASE ((uintptr_t)__host_flash)
-#define CONFIG_FLASH_BANK_SIZE 0x1000
-#define CONFIG_FLASH_ERASE_SIZE 0x0010 /* erase bank size */
-#define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */
-#define CONFIG_FLASH_WRITE_IDEAL_SIZE 0x0080 /* ideal write size */
-#define CONFIG_RAM_BASE 0x0 /* Not supported */
-#define CONFIG_RAM_SIZE 0x0 /* Not supported */
+#define CONFIG_PROGRAM_MEMORY_BASE ((uintptr_t)__host_flash)
+#define CONFIG_FLASH_BANK_SIZE 0x1000
+#define CONFIG_FLASH_ERASE_SIZE 0x0010 /* erase bank size */
+#define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */
+#define CONFIG_FLASH_WRITE_IDEAL_SIZE 0x0080 /* ideal write size */
+#define CONFIG_RAM_BASE 0x0 /* Not supported */
+#define CONFIG_RAM_SIZE 0x0 /* Not supported */
#define CONFIG_FPU
diff --git a/chip/it83xx/config_chip.h b/chip/it83xx/config_chip.h
index 01676a9171..5115e62c24 100644
--- a/chip/it83xx/config_chip.h
+++ b/chip/it83xx/config_chip.h
@@ -42,7 +42,7 @@
/* Default task stack size */
#define TASK_STACK_SIZE 512
-#define CONFIG_FLASH_BASE 0x00000000
+#define CONFIG_PROGRAM_MEMORY_BASE 0x00000000
#define CONFIG_FLASH_BANK_SIZE 0x00000800 /* protect bank size */
#define CONFIG_FLASH_ERASE_SIZE 0x00000400 /* erase bank size */
#define CONFIG_FLASH_WRITE_SIZE 0x00000004 /* minimum write size */
diff --git a/chip/lm4/config_chip.h b/chip/lm4/config_chip.h
index d02e0c530f..65c3f07889 100644
--- a/chip/lm4/config_chip.h
+++ b/chip/lm4/config_chip.h
@@ -52,7 +52,7 @@
/* Default task stack size */
#define TASK_STACK_SIZE 512
-#define CONFIG_FLASH_BASE 0x00000000
+#define CONFIG_PROGRAM_MEMORY_BASE 0x00000000
#define CONFIG_FLASH_BANK_SIZE 0x00000800 /* protect bank size */
#define CONFIG_FLASH_ERASE_SIZE 0x00000400 /* erase bank size */
#define CONFIG_FLASH_WRITE_SIZE 0x00000004 /* minimum write size */
diff --git a/chip/mec1322/config_chip.h b/chip/mec1322/config_chip.h
index f668765482..514f292914 100644
--- a/chip/mec1322/config_chip.h
+++ b/chip/mec1322/config_chip.h
@@ -99,10 +99,8 @@
#define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000
/* Program memory base address */
-#define CONFIG_FLASH_BASE 0x00100000
-
+#define CONFIG_PROGRAM_MEMORY_BASE 0x00100000
#define CONFIG_CDRAM_BASE 0x00100000
-#define CONFIG_CDRAM_SIZE 0x00020000
#include "config_flash_layout.h"
diff --git a/chip/mec1322/config_flash_layout.h b/chip/mec1322/config_flash_layout.h
index d7a16085c9..4a10175a02 100644
--- a/chip/mec1322/config_flash_layout.h
+++ b/chip/mec1322/config_flash_layout.h
@@ -16,7 +16,8 @@
/* Non-memmapped, external SPI */
#define CONFIG_CODERAM_ARCH
-#undef CONFIG_FLASH_MAPPED
+#define CONFIG_EXTERNAL_STORAGE
+#undef CONFIG_MAPPED_STORAGE
#undef CONFIG_FLASH_PSTATE
#define CONFIG_SPI_FLASH
diff --git a/chip/mec1322/lfw/ec_lfw.c b/chip/mec1322/lfw/ec_lfw.c
index 1e48cb25da..db02a7df57 100644
--- a/chip/mec1322/lfw/ec_lfw.c
+++ b/chip/mec1322/lfw/ec_lfw.c
@@ -91,7 +91,8 @@ static int spi_flash_readloc(uint8_t *buf_usr,
int spi_image_load(uint32_t offset)
{
- uint8_t *buf = (uint8_t *) (CONFIG_RW_MEM_OFF + CONFIG_FLASH_BASE);
+ uint8_t *buf = (uint8_t *) (CONFIG_RW_MEM_OFF +
+ CONFIG_PROGRAM_MEMORY_BASE);
uint32_t i;
memset((void *)buf, 0xFF, (CONFIG_FW_IMAGE_SIZE - 4));
@@ -257,7 +258,7 @@ void lfw_main()
switch (system_get_image_copy()) {
case SYSTEM_IMAGE_RW:
uart_puts("lfw-RW load\n");
- init_addr = CONFIG_RW_MEM_OFF + CONFIG_FLASH_BASE;
+ init_addr = CONFIG_RW_MEM_OFF + CONFIG_PROGRAM_MEMORY_BASE;
spi_image_load(CONFIG_RW_IMAGE_FLASHADDR);
break;
case SYSTEM_IMAGE_RO:
@@ -267,7 +268,7 @@ void lfw_main()
default:
MEC1322_VBAT_RAM(MEC1322_IMAGETYPE_IDX) =
SYSTEM_IMAGE_RO;
- init_addr = CONFIG_RO_MEM_OFF + CONFIG_FLASH_BASE;
+ init_addr = CONFIG_RO_MEM_OFF + CONFIG_PROGRAM_MEMORY_BASE;
}
jump_to_image(*(uintptr_t *)(init_addr + 4));
diff --git a/chip/mec1322/system.c b/chip/mec1322/system.c
index ce25c87620..fd8c79a2f1 100644
--- a/chip/mec1322/system.c
+++ b/chip/mec1322/system.c
@@ -448,7 +448,8 @@ enum system_image_copy_t system_get_shrspi_image_copy(void)
uint32_t system_get_lfw_address(void)
{
- uint32_t * const lfw_vector = (uint32_t * const) CONFIG_FLASH_BASE;
+ uint32_t * const lfw_vector =
+ (uint32_t * const)CONFIG_PROGRAM_MEMORY_BASE;
return *(lfw_vector + 1);
}
diff --git a/chip/npcx/config_chip.h b/chip/npcx/config_chip.h
index 6bb5809235..56db32cc65 100644
--- a/chip/npcx/config_chip.h
+++ b/chip/npcx/config_chip.h
@@ -45,13 +45,13 @@
/*****************************************************************************/
/* Memory mapping */
-#define CONFIG_RAM_BASE 0x200C0000 /* memory map address of data ram */
-#define CONFIG_RAM_SIZE (0x00008000 - 0x800) /* 30KB data ram */
-#define CONFIG_CDRAM_BASE 0x100A8000 /* memory map address of code ram */
-#define CONFIG_CDRAM_SIZE 0x00018000 /* 96KB code ram */
-#define CONFIG_FLASH_BASE 0x64000000 /* memory address of spi-flash */
-#define CONFIG_LPRAM_BASE 0x40001600 /* memory address of low power ram */
-#define CONFIG_LPRAM_SIZE 0x00000620 /* 1568B low power ram */
+#define CONFIG_RAM_BASE 0x200C0000 /* memory address of data ram */
+#define CONFIG_RAM_SIZE (0x00008000 - 0x800) /* 30KB data ram */
+#define CONFIG_CDRAM_BASE 0x100A8000 /* memory address of code ram */
+#define CONFIG_CDRAM_SIZE 0x00018000 /* 96KB code ram */
+#define CONFIG_PROGRAM_MEMORY_BASE 0x64000000 /* program memory base address */
+#define CONFIG_LPRAM_BASE 0x40001600 /* memory address of lpwr ram */
+#define CONFIG_LPRAM_SIZE 0x00000620 /* 1568B low power ram */
/* System stack size */
#define CONFIG_STACK_SIZE 4096
diff --git a/chip/npcx/config_flash_layout.h b/chip/npcx/config_flash_layout.h
index 0988c3ca35..986c0bbfea 100644
--- a/chip/npcx/config_flash_layout.h
+++ b/chip/npcx/config_flash_layout.h
@@ -14,7 +14,10 @@
*/
/* Memmapped, external SPI */
-#define CONFIG_FLASH_MAPPED
+#define CONFIG_EXTERNAL_STORAGE
+#define CONFIG_MAPPED_STORAGE
+/* Storage is memory-mapped, but program runs from SRAM */
+#define CONFIG_MAPPED_STORAGE_BASE 0x64000000
#undef CONFIG_FLASH_PSTATE
/* Size of one firmware image in flash */
diff --git a/chip/npcx/spiflashfw/ec_npcxflash.c b/chip/npcx/spiflashfw/ec_npcxflash.c
index ccaff16872..cc97f69e5a 100644
--- a/chip/npcx/spiflashfw/ec_npcxflash.c
+++ b/chip/npcx/spiflashfw/ec_npcxflash.c
@@ -218,7 +218,7 @@ int sspi_flash_verify(int offset, int size, const char *data)
uint8_t *ptr_flash;
uint8_t *ptr_mram;
- ptr_flash = (uint8_t *)(CONFIG_FLASH_BASE + offset);
+ ptr_flash = (uint8_t *)(CONFIG_PROGRAM_MEMORY_BASE + offset);
ptr_mram = (uint8_t *)data;
result = 1;
diff --git a/chip/npcx/system.c b/chip/npcx/system.c
index 525049acba..23d66d7882 100644
--- a/chip/npcx/system.c
+++ b/chip/npcx/system.c
@@ -708,7 +708,8 @@ void system_jump_to_booter(void)
}
/* Make sure the reset vector is inside the destination image */
- addr_entry = *(uintptr_t *)(flash_offset + CONFIG_FLASH_BASE + 4);
+ addr_entry = *(uintptr_t *)(flash_offset +
+ CONFIG_PROGRAM_MEMORY_BASE + 4);
download_from_flash(
flash_offset, /* The offset of the data in spi flash */
diff --git a/chip/nrf51/config_chip.h b/chip/nrf51/config_chip.h
index 328471967c..6f17b59b98 100644
--- a/chip/nrf51/config_chip.h
+++ b/chip/nrf51/config_chip.h
@@ -39,7 +39,7 @@
#define CONFIG_RAM_SIZE 0x00004000
/* Flash mapping */
-#define CONFIG_FLASH_BASE 0x00000000
+#define CONFIG_PROGRAM_MEMORY_BASE 0x00000000
#define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000
#define CONFIG_FLASH_BANK_SIZE 0x1000
diff --git a/chip/stm32/config-stm32f03x.h b/chip/stm32/config-stm32f03x.h
index 18c8806908..3cb6e955bd 100644
--- a/chip/stm32/config-stm32f03x.h
+++ b/chip/stm32/config-stm32f03x.h
@@ -4,7 +4,6 @@
*/
/* Memory mapping */
-#define CONFIG_FLASH_BASE 0x08000000
#define CONFIG_FLASH_PHYSICAL_SIZE 0x00008000
#define CONFIG_FLASH_BANK_SIZE 0x1000
#define CONFIG_FLASH_ERASE_SIZE 0x0400 /* erase bank size */
diff --git a/chip/stm32/config-stm32f05x.h b/chip/stm32/config-stm32f05x.h
index 9b1701a407..e312e61cfd 100644
--- a/chip/stm32/config-stm32f05x.h
+++ b/chip/stm32/config-stm32f05x.h
@@ -4,7 +4,6 @@
*/
/* Memory mapping */
-#define CONFIG_FLASH_BASE 0x08000000
#define CONFIG_FLASH_PHYSICAL_SIZE (64 * 1024)
#define CONFIG_FLASH_BANK_SIZE 0x1000
#define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */
diff --git a/chip/stm32/config-stm32f07x.h b/chip/stm32/config-stm32f07x.h
index 45b340355c..07e50d8d32 100644
--- a/chip/stm32/config-stm32f07x.h
+++ b/chip/stm32/config-stm32f07x.h
@@ -4,7 +4,6 @@
*/
/* Memory mapping */
-#define CONFIG_FLASH_BASE 0x08000000
#define CONFIG_FLASH_PHYSICAL_SIZE (128 * 1024)
#define CONFIG_FLASH_BANK_SIZE 0x1000
#define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */
diff --git a/chip/stm32/config-stm32f09x.h b/chip/stm32/config-stm32f09x.h
index fe73db195f..29a0cd248b 100644
--- a/chip/stm32/config-stm32f09x.h
+++ b/chip/stm32/config-stm32f09x.h
@@ -4,7 +4,6 @@
*/
/* Memory mapping */
-#define CONFIG_FLASH_BASE 0x08000000
#define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000
#define CONFIG_FLASH_BANK_SIZE 0x2000
#define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */
diff --git a/chip/stm32/config-stm32f373.h b/chip/stm32/config-stm32f373.h
index 42857af2c9..eca9bf58f8 100644
--- a/chip/stm32/config-stm32f373.h
+++ b/chip/stm32/config-stm32f373.h
@@ -4,7 +4,6 @@
*/
/* Memory mapping */
-#define CONFIG_FLASH_BASE 0x08000000
#define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000
#define CONFIG_FLASH_BANK_SIZE 0x2000
#define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */
diff --git a/chip/stm32/config-stm32l100.h b/chip/stm32/config-stm32l100.h
index e751e396cd..2e4f10ad6e 100644
--- a/chip/stm32/config-stm32l100.h
+++ b/chip/stm32/config-stm32l100.h
@@ -4,7 +4,6 @@
*/
/* Memory mapping */
-#define CONFIG_FLASH_BASE 0x08000000
#define CONFIG_FLASH_PHYSICAL_SIZE 0x00020000
#define CONFIG_FLASH_BANK_SIZE 0x1000
#define CONFIG_FLASH_ERASE_SIZE 0x0100 /* erase bank size */
diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h
index dc897253aa..480a0dcbee 100644
--- a/chip/stm32/config-stm32l15x.h
+++ b/chip/stm32/config-stm32l15x.h
@@ -4,7 +4,6 @@
*/
/* Memory mapping */
-#define CONFIG_FLASH_BASE 0x08000000
#define CONFIG_FLASH_PHYSICAL_SIZE 0x00020000
#define CONFIG_FLASH_BANK_SIZE 0x1000
#define CONFIG_FLASH_ERASE_SIZE 0x0100 /* erase bank size */
diff --git a/chip/stm32/config-stm32ts60.h b/chip/stm32/config-stm32ts60.h
index 540855c724..fc6375f20d 100644
--- a/chip/stm32/config-stm32ts60.h
+++ b/chip/stm32/config-stm32ts60.h
@@ -4,7 +4,6 @@
*/
/* Memory mapping */
-#define CONFIG_FLASH_BASE 0x08000000
#define CONFIG_FLASH_PHYSICAL_SIZE 0x0010000 /* Actually 0x8000 */
#define CONFIG_FLASH_BANK_SIZE 0x1000 /* TODO */
#define CONFIG_FLASH_ERASE_SIZE 0x0400 /* TODO erase bank size */
diff --git a/chip/stm32/config_chip.h b/chip/stm32/config_chip.h
index be115b5cf9..b2fdecdc2f 100644
--- a/chip/stm32/config_chip.h
+++ b/chip/stm32/config_chip.h
@@ -43,6 +43,8 @@
#error "Unsupported chip variant"
#endif
+#define CONFIG_PROGRAM_MEMORY_BASE 0x08000000
+
#include "config_std_internal_flash.h"
/* System stack size */
diff --git a/chip/stm32/flash-f.c b/chip/stm32/flash-f.c
index a1d148a104..c57f072fc2 100644
--- a/chip/stm32/flash-f.c
+++ b/chip/stm32/flash-f.c
@@ -205,7 +205,7 @@ static int write_optb(int byte, uint8_t value)
int flash_physical_write(int offset, int size, const char *data)
{
- uint16_t *address = (uint16_t *)(CONFIG_FLASH_BASE + offset);
+ uint16_t *address = (uint16_t *)(CONFIG_PROGRAM_MEMORY_BASE + offset);
int res = EC_SUCCESS;
int i;
@@ -285,7 +285,7 @@ int flash_physical_erase(int offset, int size)
continue;
/* select page to erase */
- STM32_FLASH_AR = CONFIG_FLASH_BASE + offset;
+ STM32_FLASH_AR = CONFIG_PROGRAM_MEMORY_BASE + offset;
/* set STRT bit : start erase */
STM32_FLASH_CR |= STRT;
diff --git a/chip/stm32/flash-stm32l.c b/chip/stm32/flash-stm32l.c
index 5a84d31f46..ce292bb58d 100644
--- a/chip/stm32/flash-stm32l.c
+++ b/chip/stm32/flash-stm32l.c
@@ -161,7 +161,7 @@ void __attribute__((section(".iram.text")))
int flash_physical_write(int offset, int size, const char *data)
{
uint32_t *data32 = (uint32_t *)data;
- uint32_t *address = (uint32_t *)(CONFIG_FLASH_BASE + offset);
+ uint32_t *address = (uint32_t *)(CONFIG_PROGRAM_MEMORY_BASE + offset);
int res = EC_SUCCESS;
int word_mode = 0;
int i;
@@ -255,13 +255,14 @@ int flash_physical_erase(int offset, int size)
/* Set PROG and ERASE bits */
STM32_FLASH_PECR |= STM32_FLASH_PECR_PROG | STM32_FLASH_PECR_ERASE;
- for (address = (uint32_t *)(CONFIG_FLASH_BASE + offset);
+ for (address = (uint32_t *)(CONFIG_PROGRAM_MEMORY_BASE + offset);
size > 0; size -= CONFIG_FLASH_ERASE_SIZE,
address += CONFIG_FLASH_ERASE_SIZE / sizeof(uint32_t)) {
timestamp_t deadline;
/* Do nothing if already erased */
- if (flash_is_erased((uint32_t)address - CONFIG_FLASH_BASE,
+ if (flash_is_erased((uint32_t)address -
+ CONFIG_PROGRAM_MEMORY_BASE,
CONFIG_FLASH_ERASE_SIZE))
continue;
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