4 files changed, 9 insertions, 28 deletions
diff --git a/chip/lm4/chip_temp_sensor.c b/chip/lm4/chip_temp_sensor.c
index 89cac21765..657f582275 100644
--- a/chip/lm4/chip_temp_sensor.c
+++ b/chip/lm4/chip_temp_sensor.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
@@ -22,8 +22,3 @@ int chip_temp_sensor_get_val(int idx)
 {
 	return last_val;
 }
-
-int chip_temp_sensor_init(void)
-{
-	return EC_SUCCESS;
-}
diff --git a/chip/lm4/lpc.c b/chip/lm4/lpc.c
index 18fac5b7ac..647ed67e7d 100644
--- a/chip/lm4/lpc.c
+++ b/chip/lm4/lpc.c
@@ -195,6 +195,9 @@ int lpc_init(void)
 	/* Enable LPC interrupt */
 	task_enable_irq(LM4_IRQ_LPC);
 
+	/* Enable COMx UART */
+	uart_comx_enable();
+
 	return EC_SUCCESS;
 }
 
diff --git a/chip/lm4/system.c b/chip/lm4/system.c
index 56d0525c0a..f3bcf85a62 100644
--- a/chip/lm4/system.c
+++ b/chip/lm4/system.c
@@ -29,8 +29,9 @@ static void check_reset_cause(void)
 	enum system_reset_cause_t reset_cause = SYSTEM_RESET_UNKNOWN;
 	uint32_t raw_reset_cause;
 
-	/* Read the raw reset cause */
+	/* Read and clear the raw reset cause */
 	raw_reset_cause = LM4_SYSTEM_RESC;
+	LM4_SYSTEM_RESC = 0;
 
 	if (hib_status & 0x0d) {
 		/* the hibernation module wakes up the system */
@@ -132,16 +133,6 @@ int system_pre_init(void)
 }
 
 
-int system_init(void)
-{
-	/* Clear the hardware reset cause, now that we've committed to running
-	 * this image. */
-	LM4_SYSTEM_RESC = 0;
-
-	return EC_SUCCESS;
-}
-
-
 int system_reset(int is_cold)
 {
 	/* TODO: (crosbug.com/p/7470) support cold boot; this is a
diff --git a/chip/stm32l/system.c b/chip/stm32l/system.c
index aaa05253bd..e045114ee1 100644
--- a/chip/stm32l/system.c
+++ b/chip/stm32l/system.c
@@ -16,6 +16,9 @@ static void check_reset_cause(void)
 	enum system_reset_cause_t reset_cause = SYSTEM_RESET_UNKNOWN;
 	uint32_t raw_cause = STM32L_RCC_CSR;
 
+	/* Clear the hardware reset cause by setting the RMVF bit */
+	STM32L_RCC_CSR |= 1 << 24;
+
 	if (copy == SYSTEM_IMAGE_RW_A || copy == SYSTEM_IMAGE_RW_B) {
 		/* If we're in image A or B, the only way we can get there is
 		 * via a warm reset. */
@@ -72,17 +75,6 @@ int system_pre_init(void)
 }
 
 
-int system_init(void)
-{
-	/* Clear the hardware reset cause by setting the RMVF bit,
-	 * now that we've committed to running this image.
-	 */
-	STM32L_RCC_CSR |= 1 << 24;
-
-	return EC_SUCCESS;
-}
-
-
 int system_reset(int is_cold)
 {
 	/* TODO: (crosbug.com/p/7470) support cold boot; this is a