diff options
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/lm4/lpc.c | 22 | ||||
| -rw-r--r-- | chip/stm32/clock-stm32f.c | 5 |
2 files changed, 8 insertions, 19 deletions
diff --git a/chip/lm4/lpc.c b/chip/lm4/lpc.c index 8f24bb2ed2..587c79c22a 100644 --- a/chip/lm4/lpc.c +++ b/chip/lm4/lpc.c @@ -208,17 +208,10 @@ static void lpc_send_response(struct host_cmd_handler_args *args) if (size > EC_PROTO2_MAX_PARAM_SIZE) args->result = EC_RES_INVALID_RESPONSE; - /* - * Write result to the data byte. This sets the TOH bit in the - * status byte and triggers an IRQ on the host so the host can read - * the result. - * - * TODO: (crosbug.com/p/7496) or it would, if we actually set up host - * IRQs - */ + /* Write result to the data byte. This sets the TOH status bit. */ LPC_POOL_CMD[1] = args->result; - /* Clear the busy bit */ + /* Clear the busy bit, so the host knows the EC is done. */ task_disable_irq(LM4_IRQ_LPC); LM4_LPC_ST(LPC_CH_CMD) &= ~LM4_LPC_ST_BUSY; task_enable_irq(LM4_IRQ_LPC); @@ -230,17 +223,10 @@ static void lpc_send_response_packet(struct host_packet *pkt) if (pkt->driver_result == EC_RES_IN_PROGRESS) return; - /* - * Write result to the data byte. This sets the TOH bit in the - * status byte and triggers an IRQ on the host so the host can read - * the result. - * - * TODO: (crosbug.com/p/7496) or it would, if we actually set up host - * IRQs - */ + /* Write result to the data byte. This sets the TOH status bit. */ LPC_POOL_CMD[1] = pkt->driver_result; - /* Clear the busy bit */ + /* Clear the busy bit, so the host knows the EC is done. */ task_disable_irq(LM4_IRQ_LPC); LM4_LPC_ST(LPC_CH_CMD) &= ~LM4_LPC_ST_BUSY; task_enable_irq(LM4_IRQ_LPC); diff --git a/chip/stm32/clock-stm32f.c b/chip/stm32/clock-stm32f.c index 11b426a42f..96218f115f 100644 --- a/chip/stm32/clock-stm32f.c +++ b/chip/stm32/clock-stm32f.c @@ -30,7 +30,10 @@ /* * RTC clock frequency (connected to LSI clock) * - * TODO: crosbug.com/p/12281 calibrate LSI frequency + * TODO(crosbug.com/p/12281): Calibrate LSI frequency on a per-chip basis. The + * LSI on any given chip can be between 30 kHz to 60 kHz. Without calibration, + * LSI frequency may be off by as much as 50%. Fortunately, we don't do any + * high-precision delays based solely on LSI. */ #define RTC_FREQ 40000 /* Hz */ #define US_PER_RTC_TICK (1000000 / RTC_FREQ) |