diff options
Diffstat (limited to 'core/cortex-m/cpu.c')
| -rw-r--r-- | core/cortex-m/cpu.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/core/cortex-m/cpu.c b/core/cortex-m/cpu.c index 2571a4a17c..ea6cf5c4a5 100644 --- a/core/cortex-m/cpu.c +++ b/core/cortex-m/cpu.c @@ -5,7 +5,9 @@ * Set up the Cortex-M core */ +#include "common.h" #include "cpu.h" +#include "hooks.h" void cpu_init(void) { @@ -16,3 +18,39 @@ void cpu_init(void) CPU_NVIC_SHCSR |= CPU_NVIC_SHCSR_MEMFAULTENA | CPU_NVIC_SHCSR_BUSFAULTENA | CPU_NVIC_SHCSR_USGFAULTENA; } + +#ifdef CONFIG_ARMV7M_CACHE +static void cpu_invalidate_icache(void) +{ + /* + * Invalidates the entire instruction cache to the point of + * unification. + */ + CPU_SCB_ICIALLU = 0; + asm volatile("dsb; isb"); +} + +void cpu_enable_icache(void) +{ + /* Check whether the I-cache is already enabled */ + if (!(CPU_NVIC_CCR & CPU_NVIC_CCR_ICACHE)) { + /* Invalidate the I-cache first */ + cpu_invalidate_icache(); + /* Turn on the caching */ + CPU_NVIC_CCR |= CPU_NVIC_CCR_ICACHE; + asm volatile("dsb; isb"); + } +} + +static void cpu_sysjump_cache(void) +{ + /* + * Disable the I-cache + * so we will invalidate it after the sysjump if needed + * (e.g after a flash update). + */ + CPU_NVIC_CCR &= ~CPU_NVIC_CCR_ICACHE; + asm volatile("dsb; isb"); +} +DECLARE_HOOK(HOOK_SYSJUMP, cpu_sysjump_cache, HOOK_PRIO_LAST); +#endif /* CONFIG_ARMV7M_CACHE */ |