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Diffstat (limited to 'core/riscv-rv32i/task.c')
-rw-r--r-- | core/riscv-rv32i/task.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/core/riscv-rv32i/task.c b/core/riscv-rv32i/task.c index cb9532f6dd..558177e969 100644 --- a/core/riscv-rv32i/task.c +++ b/core/riscv-rv32i/task.c @@ -199,6 +199,16 @@ void __ram_code interrupt_enable(void) asm volatile ("csrs mie, t0"); } +inline int is_interrupt_enabled(void) +{ + int mie = 0; + + asm volatile ("csrr %0, mie" : "=r"(mie)); + + /* Check if MEIE bit is set in MIE register */ + return !!(mie & 0x800); +} + inline int in_interrupt_context(void) { return in_interrupt; |