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-rw-r--r--core/cortex-m/config_core.h6
-rw-r--r--core/cortex-m/cpu.h6
-rw-r--r--core/cortex-m/include/math.h6
-rw-r--r--core/cortex-m/irq_handler.h6
-rw-r--r--core/cortex-m0/config_core.h6
-rw-r--r--core/cortex-m0/cpu.h6
-rw-r--r--core/cortex-m0/irq_handler.h6
-rw-r--r--core/host/cpu.h6
-rw-r--r--core/host/irq_handler.h6
-rw-r--r--core/nds32/config_core.h6
-rw-r--r--core/nds32/cpu.h6
-rw-r--r--core/nds32/irq_chip.h6
-rw-r--r--core/nds32/irq_handler.h6
13 files changed, 39 insertions, 39 deletions
diff --git a/core/cortex-m/config_core.h b/core/cortex-m/config_core.h
index e72f4e58bb..b7a75db960 100644
--- a/core/cortex-m/config_core.h
+++ b/core/cortex-m/config_core.h
@@ -3,8 +3,8 @@
* found in the LICENSE file.
*/
-#ifndef __CONFIG_CORE_H
-#define __CONFIG_CORE_H
+#ifndef __CROS_EC_CONFIG_CORE_H
+#define __CROS_EC_CONFIG_CORE_H
/* Linker binary architecture and format */
#define BFD_ARCH arm
@@ -12,4 +12,4 @@
#define CONFIG_SOFTWARE_PANIC
-#endif /* __CONFIG_CORE_H */
+#endif /* __CROS_EC_CONFIG_CORE_H */
diff --git a/core/cortex-m/cpu.h b/core/cortex-m/cpu.h
index 5b1046b42f..e170d42782 100644
--- a/core/cortex-m/cpu.h
+++ b/core/cortex-m/cpu.h
@@ -5,8 +5,8 @@
* Registers map and defintions for Cortex-MLM4x processor
*/
-#ifndef __CPU_H
-#define __CPU_H
+#ifndef __CROS_EC_CPU_H
+#define __CROS_EC_CPU_H
#include <stdint.h>
@@ -50,4 +50,4 @@ enum {
/* Set up the cpu to detect faults */
void cpu_init(void);
-#endif /* __CPU_H */
+#endif /* __CROS_EC_CPU_H */
diff --git a/core/cortex-m/include/math.h b/core/cortex-m/include/math.h
index 485f28ba23..fbcd06e233 100644
--- a/core/cortex-m/include/math.h
+++ b/core/cortex-m/include/math.h
@@ -5,8 +5,8 @@
/* Math utility functions for ARMv7 */
-#ifndef __EC_MATH_H
-#define __EC_MATH_H
+#ifndef __CROS_EC_MATH_H
+#define __CROS_EC_MATH_H
#ifdef CONFIG_FPU
static inline float sqrtf(float v)
@@ -21,4 +21,4 @@ static inline float sqrtf(float v)
}
#endif /* CONFIG_FPU */
-#endif /* __EC_MATH_H */
+#endif /* __CROS_EC_MATH_H */
diff --git a/core/cortex-m/irq_handler.h b/core/cortex-m/irq_handler.h
index 602c3245e4..0d659b0610 100644
--- a/core/cortex-m/irq_handler.h
+++ b/core/cortex-m/irq_handler.h
@@ -5,8 +5,8 @@
/* Helper to declare IRQ handling routines */
-#ifndef __IRQ_HANDLER_H
-#define __IRQ_HANDLER_H
+#ifndef __CROS_EC_IRQ_HANDLER_H
+#define __CROS_EC_IRQ_HANDLER_H
#ifdef CONFIG_TASK_PROFILING
#define bl_task_start_irq_handler "bl task_start_irq_handler\n"
@@ -38,4 +38,4 @@
const struct irq_priority IRQ_PRIORITY(irq) \
__attribute__((section(".rodata.irqprio"))) \
= {irq, priority}
-#endif /* __IRQ_HANDLER_H */
+#endif /* __CROS_EC_IRQ_HANDLER_H */
diff --git a/core/cortex-m0/config_core.h b/core/cortex-m0/config_core.h
index 9c04d467e3..e58b481704 100644
--- a/core/cortex-m0/config_core.h
+++ b/core/cortex-m0/config_core.h
@@ -3,8 +3,8 @@
* found in the LICENSE file.
*/
-#ifndef __CONFIG_CORE_H
-#define __CONFIG_CORE_H
+#ifndef __CROS_EC_CONFIG_CORE_H
+#define __CROS_EC_CONFIG_CORE_H
/* Linker binary architecture and format */
#define BFD_ARCH arm
@@ -14,4 +14,4 @@
#define CONFIG_SOFTWARE_CLZ
#define CONFIG_SOFTWARE_PANIC
-#endif /* __CONFIG_CORE_H */
+#endif /* __CROS_EC_CONFIG_CORE_H */
diff --git a/core/cortex-m0/cpu.h b/core/cortex-m0/cpu.h
index 18686dee1c..8df6fa5d27 100644
--- a/core/cortex-m0/cpu.h
+++ b/core/cortex-m0/cpu.h
@@ -5,8 +5,8 @@
* Registers map and definitions for Cortex-M0 processor
*/
-#ifndef __CPU_H
-#define __CPU_H
+#ifndef __CROS_EC_CPU_H
+#define __CROS_EC_CPU_H
#include <stdint.h>
@@ -36,4 +36,4 @@
/* Set up the cpu to detect faults */
void cpu_init(void);
-#endif /* __CPU_H */
+#endif /* __CROS_EC_CPU_H */
diff --git a/core/cortex-m0/irq_handler.h b/core/cortex-m0/irq_handler.h
index f6742f5c82..7acf640c02 100644
--- a/core/cortex-m0/irq_handler.h
+++ b/core/cortex-m0/irq_handler.h
@@ -5,8 +5,8 @@
/* Helper to declare IRQ handling routines */
-#ifndef __IRQ_HANDLER_H
-#define __IRQ_HANDLER_H
+#ifndef __CROS_EC_IRQ_HANDLER_H
+#define __CROS_EC_IRQ_HANDLER_H
#include "cpu.h"
@@ -39,4 +39,4 @@
__attribute__((section(".rodata.irqprio"))) \
= {irq, priority}
#endif /* CONFIG_TASK_PROFILING */
-#endif /* __IRQ_HANDLER_H */
+#endif /* __CROS_EC_IRQ_HANDLER_H */
diff --git a/core/host/cpu.h b/core/host/cpu.h
index 4e43da623f..cb4ee7239a 100644
--- a/core/host/cpu.h
+++ b/core/host/cpu.h
@@ -5,9 +5,9 @@
/* CPU specific header file */
-#ifndef __CPU_H
-#define __CPU_H
+#ifndef __CROS_EC_CPU_H
+#define __CROS_EC_CPU_H
static inline void cpu_init(void) { }
-#endif /* __CPU_H */
+#endif /* __CROS_EC_CPU_H */
diff --git a/core/host/irq_handler.h b/core/host/irq_handler.h
index d778ccf253..738d28cbeb 100644
--- a/core/host/irq_handler.h
+++ b/core/host/irq_handler.h
@@ -5,8 +5,8 @@
/* Helper to declare IRQ handling routines */
-#ifndef __IRQ_HANDLER_H
-#define __IRQ_HANDLER_H
+#ifndef __CROS_EC_IRQ_HANDLER_H
+#define __CROS_EC_IRQ_HANDLER_H
/* Helper macros to build the IRQ handler and priority struct names */
#define IRQ_HANDLER(irqname) CONCAT3(irq_, irqname, _handler)
@@ -26,4 +26,4 @@
const struct irq_priority IRQ_PRIORITY(irq) \
__attribute__((section(".rodata.irqprio"))) \
= {irq, priority}
-#endif /* __IRQ_HANDLER_H */
+#endif /* __CROS_EC_IRQ_HANDLER_H */
diff --git a/core/nds32/config_core.h b/core/nds32/config_core.h
index 750d47b016..f2e16eaf79 100644
--- a/core/nds32/config_core.h
+++ b/core/nds32/config_core.h
@@ -3,8 +3,8 @@
* found in the LICENSE file.
*/
-#ifndef __CONFIG_CORE_H
-#define __CONFIG_CORE_H
+#ifndef __CROS_EC_CONFIG_CORE_H
+#define __CROS_EC_CONFIG_CORE_H
/* Linker binary architecture and format */
#define BFD_ARCH nds32
@@ -29,4 +29,4 @@
((typeof(var))(*__ptr_val)); \
})
-#endif /* __CONFIG_CORE_H */
+#endif /* __CROS_EC_CONFIG_CORE_H */
diff --git a/core/nds32/cpu.h b/core/nds32/cpu.h
index b22ad62cbf..ada87cf716 100644
--- a/core/nds32/cpu.h
+++ b/core/nds32/cpu.h
@@ -5,8 +5,8 @@
* Registers map and defintions for Andes cores
*/
-#ifndef __CPU_H
-#define __CPU_H
+#ifndef __CROS_EC_CPU_H
+#define __CROS_EC_CPU_H
#include <stdint.h>
@@ -54,4 +54,4 @@ static inline uint32_t get_itype(void)
/* Generic CPU core initialization */
void cpu_init(void);
-#endif /* __CPU_H */
+#endif /* __CROS_EC_CPU_H */
diff --git a/core/nds32/irq_chip.h b/core/nds32/irq_chip.h
index fb3bf1b21b..e7b67317a8 100644
--- a/core/nds32/irq_chip.h
+++ b/core/nds32/irq_chip.h
@@ -5,8 +5,8 @@
* Chip-specific part of the IRQ handling.
*/
-#ifndef __IRQ_CHIP_H
-#define __IRQ_CHIP_H
+#ifndef __CROS_EC_IRQ_CHIP_H
+#define __CROS_EC_IRQ_CHIP_H
/**
* Enable an IRQ in the chip interrupt controller.
@@ -51,4 +51,4 @@ int chip_trigger_irq(int irq);
*/
void chip_init_irqs(void);
-#endif /* __IRQ_CHIP_H */
+#endif /* __CROS_EC_IRQ_CHIP_H */
diff --git a/core/nds32/irq_handler.h b/core/nds32/irq_handler.h
index c3d22cc177..2cf10256a0 100644
--- a/core/nds32/irq_handler.h
+++ b/core/nds32/irq_handler.h
@@ -5,8 +5,8 @@
/* Helper to declare IRQ handling routines */
-#ifndef __IRQ_HANDLER_H
-#define __IRQ_HANDLER_H
+#ifndef __CROS_EC_IRQ_HANDLER_H
+#define __CROS_EC_IRQ_HANDLER_H
/* Helper macros to build the IRQ handler and priority struct names */
#define IRQ_HANDLER(irqname) CONCAT3(irq_, irqname, _handler)
@@ -22,4 +22,4 @@
__attribute__((section(".rodata.irqprio"))) \
= {CPU_INT(irq), priority}
-#endif /* __IRQ_HANDLER_H */
+#endif /* __CROS_EC_IRQ_HANDLER_H */
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