diff options
Diffstat (limited to 'core')
| -rw-r--r-- | core/riscv-rv32i/cpu.h | 4 | ||||
| -rw-r--r-- | core/riscv-rv32i/panic.c | 19 |
2 files changed, 16 insertions, 7 deletions
diff --git a/core/riscv-rv32i/cpu.h b/core/riscv-rv32i/cpu.h index e46b893ad6..94d6db4e81 100644 --- a/core/riscv-rv32i/cpu.h +++ b/core/riscv-rv32i/cpu.h @@ -21,6 +21,7 @@ #ifndef __ASSEMBLER__ #include <stdint.h> +#include <stdnoreturn.h> /* write Exception Program Counter register */ static inline void set_mepc(uint32_t val) @@ -46,6 +47,9 @@ static inline uint32_t get_mcause(void) return ret; } +/* Trigger a panic. */ +noreturn void exception_panic(uint32_t reason, uint32_t info); + /* Generic CPU core initialization */ void cpu_init(void); extern uint32_t ec_reset_lp; diff --git a/core/riscv-rv32i/panic.c b/core/riscv-rv32i/panic.c index 3d8cec1b06..cc95eb19a4 100644 --- a/core/riscv-rv32i/panic.c +++ b/core/riscv-rv32i/panic.c @@ -33,13 +33,7 @@ static const char * const exc_type[16] = { }; #endif /* CONFIG_DEBUG_EXCEPTIONS */ -#ifdef CONFIG_SOFTWARE_PANIC -/* General purpose register (s0) for saving software panic reason */ -#define SOFT_PANIC_GPR_REASON 11 -/* General purpose register (s1) for saving software panic information */ -#define SOFT_PANIC_GPR_INFO 10 - -void software_panic(uint32_t reason, uint32_t info) +void exception_panic(uint32_t reason, uint32_t info) { asm volatile ("mv s0, %0" : : "r"(reason)); asm volatile ("mv s1, %0" : : "r"(info)); @@ -50,6 +44,17 @@ void software_panic(uint32_t reason, uint32_t info) __builtin_unreachable(); } +#ifdef CONFIG_SOFTWARE_PANIC +/* General purpose register (s0) for saving software panic reason */ +#define SOFT_PANIC_GPR_REASON 11 +/* General purpose register (s1) for saving software panic information */ +#define SOFT_PANIC_GPR_INFO 10 + +void software_panic(uint32_t reason, uint32_t info) +{ + exception_panic(reason, info); +} + void panic_set_reason(uint32_t reason, uint32_t info, uint8_t exception) { /* |