9 files changed, 21 insertions, 10 deletions

diff --git a/core/cortex-m/build.mk b/core/cortex-m/build.mk
index 522f6dedeb..5724a9ba39 100644
--- a/core/cortex-m/build.mk
+++ b/core/cortex-m/build.mk
@@ -17,6 +17,11 @@ CFLAGS_CPU+=-mthumb -Os -mno-sched-prolog
 CFLAGS_CPU+=-mno-unaligned-access
 CFLAGS_CPU+=$(CFLAGS_FPU-y)
 
+ifneq ($(CONFIG_LTO),)
+CFLAGS_CPU+=-flto
+LDFLAGS_EXTRA+=-flto
+endif
+
 core-y=cpu.o init.o ldivmod.o uldivmod.o
 core-$(CONFIG_COMMON_PANIC_OUTPUT)+=panic.o
 core-$(CONFIG_COMMON_RUNTIME)+=switch.o task.o
diff --git a/core/cortex-m/irq_handler.h b/core/cortex-m/irq_handler.h
index 2b49de15e1..602c3245e4 100644
--- a/core/cortex-m/irq_handler.h
+++ b/core/cortex-m/irq_handler.h
@@ -24,6 +24,7 @@
 #define DECLARE_IRQ(irq, routine, priority) DECLARE_IRQ_(irq, routine, priority)
 #define DECLARE_IRQ_(irq, routine, priority)                    \
 	void IRQ_HANDLER(irq)(void) __attribute__((naked));	\
+	void __keep routine(void);				\
 	void IRQ_HANDLER(irq)(void)				\
 	{							\
 		asm volatile("mov r0, lr\n"			\
diff --git a/core/cortex-m/panic.c b/core/cortex-m/panic.c
index 6b81e8c484..0d484bf1d0 100644
--- a/core/cortex-m/panic.c
+++ b/core/cortex-m/panic.c
@@ -302,7 +302,7 @@ void panic_data_print(const struct panic_data *pdata)
 #endif
 }
 
-void report_panic(void)
+void __keep report_panic(void)
 {
 	struct panic_data *pdata = pdata_ptr;
 	uint32_t sp;
@@ -352,7 +352,7 @@ void report_panic(void)
  *
  * Declare this as a naked call so we can extract raw LR and IPSR values.
  */
-void exception_panic(void) __attribute__((naked));
+void __keep exception_panic(void) __attribute__((naked));
 void exception_panic(void)
 {
 	/* Save registers and branch directly to panic handler */
diff --git a/core/cortex-m/task.c b/core/cortex-m/task.c
index 69b92d5de8..342fcdcf39 100644
--- a/core/cortex-m/task.c
+++ b/core/cortex-m/task.c
@@ -284,7 +284,7 @@ void __schedule(int desched, int resched)
 }
 
 #ifdef CONFIG_TASK_PROFILING
-void task_start_irq_handler(void *excep_return)
+void __keep task_start_irq_handler(void *excep_return)
 {
 	/*
 	 * Get time before checking depth, in case this handler is
@@ -312,7 +312,7 @@ void task_start_irq_handler(void *excep_return)
 }
 #endif
 
-void task_resched_if_needed(void *excep_return)
+void __keep task_resched_if_needed(void *excep_return)
 {
 	/*
 	 * Continue iff a rescheduling event happened or profiling is active,
@@ -414,7 +414,7 @@ void task_enable_irq(int irq)
 	CPU_NVIC_EN(irq / 32) = 1 << (irq % 32);
 }
 
-void task_disable_irq(int irq)
+void __keep task_disable_irq(int irq)
 {
 	CPU_NVIC_DIS(irq / 32) = 1 << (irq % 32);
 }
diff --git a/core/cortex-m/watchdog.c b/core/cortex-m/watchdog.c
index 8366f48d0a..229009330e 100644
--- a/core/cortex-m/watchdog.c
+++ b/core/cortex-m/watchdog.c
@@ -12,7 +12,7 @@
 #include "uart.h"
 #include "watchdog.h"
 
-void watchdog_trace(uint32_t excep_lr, uint32_t excep_sp)
+void __keep watchdog_trace(uint32_t excep_lr, uint32_t excep_sp)
 {
 	uint32_t psp;
 	uint32_t *stack;
diff --git a/core/cortex-m0/atomic.h b/core/cortex-m0/atomic.h
index 8ba1b66739..62bc2ff370 100644
--- a/core/cortex-m0/atomic.h
+++ b/core/cortex-m0/atomic.h
@@ -23,7 +23,7 @@
 			     #asm_op" %0, %0, %2\n"		\
 			     "   str  %0, [%1]\n"		\
 			     "   cpsie i\n"			\
-			     : "=&r" (reg0)			\
+			     : "=&b" (reg0)			\
 			     : "b" (a), "r" (v) : "cc");	\
 } while (0)
 
diff --git a/core/cortex-m0/build.mk b/core/cortex-m0/build.mk
index c87df856e0..5f2bc32eb5 100644
--- a/core/cortex-m0/build.mk
+++ b/core/cortex-m0/build.mk
@@ -13,6 +13,11 @@ CROSS_COMPILE?=arm-none-eabi-
 CFLAGS_CPU+=-mthumb -Os -mno-sched-prolog
 CFLAGS_CPU+=-mno-unaligned-access
 
+ifneq ($(CONFIG_LTO),)
+CFLAGS_CPU+=-flto
+LDFLAGS_EXTRA+=-flto
+endif
+
 core-y=cpu.o init.o thumb_case.o div.o lmul.o ldivmod.o uldivmod.o
 core-$(CONFIG_COMMON_PANIC_OUTPUT)+=panic.o
 core-$(CONFIG_COMMON_RUNTIME)+=switch.o task.o
diff --git a/core/cortex-m0/panic.c b/core/cortex-m0/panic.c
index 2ba22c6998..cb347054ea 100644
--- a/core/cortex-m0/panic.c
+++ b/core/cortex-m0/panic.c
@@ -104,7 +104,7 @@ void panic_data_print(const struct panic_data *pdata)
 	print_reg(15, sregs, 6);
 }
 
-void report_panic(void)
+void __keep report_panic(void)
 {
 	struct panic_data *pdata = pdata_ptr;
 	uint32_t sp;
@@ -139,7 +139,7 @@ void report_panic(void)
  *
  * Declare this as a naked call so we can extract raw LR and IPSR values.
  */
-void exception_panic(void) __attribute__((naked));
+__keep void exception_panic(void) __attribute__((naked));
 void exception_panic(void)
 {
 	/* Save registers and branch directly to panic handler */
diff --git a/core/cortex-m0/task.c b/core/cortex-m0/task.c
index ffdbe49595..d26a82b6d2 100644
--- a/core/cortex-m0/task.c
+++ b/core/cortex-m0/task.c
@@ -181,7 +181,7 @@ int task_start_called(void)
 /**
  * Scheduling system call
  */
-task_ *__svc_handler(int desched, task_id_t resched)
+task_  __attribute__((noinline)) *__svc_handler(int desched, task_id_t resched)
 {
 	task_ *current, *next;
 #ifdef CONFIG_TASK_PROFILING