diff options
Diffstat (limited to 'driver/charger/bd9995x.h')
| -rw-r--r-- | driver/charger/bd9995x.h | 110 |
1 files changed, 55 insertions, 55 deletions
diff --git a/driver/charger/bd9995x.h b/driver/charger/bd9995x.h index f9fb092b24..6719fd8661 100644 --- a/driver/charger/bd9995x.h +++ b/driver/charger/bd9995x.h @@ -71,13 +71,13 @@ enum bd9995x_charge_port { #define BD9995X_CMD_CHGSTM_STATUS 0x00 #define BD9995X_CMD_VBAT_VSYS_STATUS 0x01 #define BD9995X_CMD_VBUS_VCC_STATUS 0x02 -#define BD9995X_CMD_VBUS_VCC_STATUS_VCC_DETECT (1 << 8) -#define BD9995X_CMD_VBUS_VCC_STATUS_VBUS_DETECT (1 << 0) +#define BD9995X_CMD_VBUS_VCC_STATUS_VCC_DETECT BIT(8) +#define BD9995X_CMD_VBUS_VCC_STATUS_VBUS_DETECT BIT(0) #define BD9995X_CMD_CHGOP_STATUS 0x03 -#define BD9995X_CMD_CHGOP_STATUS_BATTEMP2 (1 << 10) -#define BD9995X_CMD_CHGOP_STATUS_BATTEMP1 (1 << 9) -#define BD9995X_CMD_CHGOP_STATUS_BATTEMP0 (1 << 8) +#define BD9995X_CMD_CHGOP_STATUS_BATTEMP2 BIT(10) +#define BD9995X_CMD_CHGOP_STATUS_BATTEMP1 BIT(9) +#define BD9995X_CMD_CHGOP_STATUS_BATTEMP0 BIT(8) #define BD9995X_BATTTEMP_MASK 0x700 #define BD9995X_CMD_CHGOP_STATUS_BATTEMP_ROOMTEMP 0 #define BD9995X_CMD_CHGOP_STATUS_BATTEMP_HOT1 1 @@ -87,7 +87,7 @@ enum bd9995x_charge_port { #define BD9995X_CMD_CHGOP_STATUS_BATTEMP_COLD2 5 #define BD9995X_CMD_CHGOP_STATUS_BATTEMP_DISABLE 6 #define BD9995X_CMD_CHGOP_STATUS_BATTEMP_BATOPEN 7 -#define BD9995X_CMD_CHGOP_STATUS_RBOOST_UV (1 << 1) +#define BD9995X_CMD_CHGOP_STATUS_RBOOST_UV BIT(1) #define BD9995X_CMD_WDT_STATUS 0x04 #define BD9995X_CMD_CUR_ILIM_VAL 0x05 @@ -96,29 +96,29 @@ enum bd9995x_charge_port { #define BD9995X_CMD_EXT_ICC_LIM_SET 0x08 #define BD9995X_CMD_IOTG_LIM_SET 0x09 #define BD9995X_CMD_VIN_CTRL_SET 0x0A -#define BD9995X_CMD_VIN_CTRL_SET_VSYS_PRIORITY (1 << 4) +#define BD9995X_CMD_VIN_CTRL_SET_VSYS_PRIORITY BIT(4) -#define BD9995X_CMD_VIN_CTRL_SET_PP_BOTH_THRU (1 << 11) -#define BD9995X_CMD_VIN_CTRL_SET_VBUS_PRIORITY (1 << 7) -#define BD9995X_CMD_VIN_CTRL_SET_VBUS_EN (1 << 6) -#define BD9995X_CMD_VIN_CTRL_SET_VCC_EN (1 << 5) +#define BD9995X_CMD_VIN_CTRL_SET_PP_BOTH_THRU BIT(11) +#define BD9995X_CMD_VIN_CTRL_SET_VBUS_PRIORITY BIT(7) +#define BD9995X_CMD_VIN_CTRL_SET_VBUS_EN BIT(6) +#define BD9995X_CMD_VIN_CTRL_SET_VCC_EN BIT(5) #define BD9995X_CMD_CHGOP_SET1 0x0B -#define BD9995X_CMD_CHGOP_SET1_DCP_2500_SEL (1 << 15) -#define BD9995X_CMD_CHGOP_SET1_SDP_500_SEL (1 << 14) -#define BD9995X_CMD_CHGOP_SET1_ILIM_AUTO_DISEN (1 << 13) -#define BD9995X_CMD_CHGOP_SET1_VCC_BC_DISEN (1 << 11) -#define BD9995X_CMD_CHGOP_SET1_VBUS_BC_DISEN (1 << 10) -#define BD9995X_CMD_CHGOP_SET1_SDP_CHG_TRIG_EN (1 << 9) -#define BD9995X_CMD_CHGOP_SET1_SDP_CHG_TRIG (1 << 8) +#define BD9995X_CMD_CHGOP_SET1_DCP_2500_SEL BIT(15) +#define BD9995X_CMD_CHGOP_SET1_SDP_500_SEL BIT(14) +#define BD9995X_CMD_CHGOP_SET1_ILIM_AUTO_DISEN BIT(13) +#define BD9995X_CMD_CHGOP_SET1_VCC_BC_DISEN BIT(11) +#define BD9995X_CMD_CHGOP_SET1_VBUS_BC_DISEN BIT(10) +#define BD9995X_CMD_CHGOP_SET1_SDP_CHG_TRIG_EN BIT(9) +#define BD9995X_CMD_CHGOP_SET1_SDP_CHG_TRIG BIT(8) #define BD9995X_CMD_CHGOP_SET2 0x0C -#define BD9995X_CMD_CHGOP_SET2_BATT_LEARN (1 << 8) -#define BD9995X_CMD_CHGOP_SET2_CHG_EN (1 << 7) -#define BD9995X_CMD_CHGOP_SET2_USB_SUS (1 << 6) +#define BD9995X_CMD_CHGOP_SET2_BATT_LEARN BIT(8) +#define BD9995X_CMD_CHGOP_SET2_CHG_EN BIT(7) +#define BD9995X_CMD_CHGOP_SET2_USB_SUS BIT(6) #define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL (3 << 2) #define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_600 (0 << 2) -#define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_857 (1 << 2) +#define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_857 BIT(2) #define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_1000 (2 << 2) #define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_1200 (3 << 2) @@ -145,27 +145,27 @@ enum bd9995x_charge_port { #define BD9995X_CMD_VBATOVP_SET 0x1E #define BD9995X_CMD_IBATSHORT_SET 0x1F #define BD9995X_CMD_PROCHOT_CTRL_SET 0x20 -#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN4 (1 << 4) -#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN3 (1 << 3) -#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN2 (1 << 2) -#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN1 (1 << 1) -#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN0 (1 << 0) +#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN4 BIT(4) +#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN3 BIT(3) +#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN2 BIT(2) +#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN1 BIT(1) +#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN0 BIT(0) #define BD9995X_CMD_PROCHOT_ICRIT_SET 0x21 #define BD9995X_CMD_PROCHOT_INORM_SET 0x22 #define BD9995X_CMD_PROCHOT_IDCHG_SET 0x23 #define BD9995X_CMD_PROCHOT_VSYS_SET 0x24 #define BD9995X_CMD_PMON_IOUT_CTRL_SET 0x25 -#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IMON_INSEL (1 << 9) -#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_INSEL (1 << 8) -#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_OUT_EN (1 << 7) -#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_SOURCE_SEL (1 << 6) +#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IMON_INSEL BIT(9) +#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_INSEL BIT(8) +#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_OUT_EN BIT(7) +#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_SOURCE_SEL BIT(6) #define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_MASK 0x30 #define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_40V 0x03 #define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_20V 0x02 #define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_10V 0x01 #define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_05V 0x00 -#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_OUT_EN (1 << 3) +#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_OUT_EN BIT(3) #define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_MASK 0x07 #define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_64UAW 0x06 #define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_32UAW 0x05 @@ -181,21 +181,21 @@ enum bd9995x_charge_port { #define BD9995X_CMD_VCC_UCD_SET 0x28 /* Bits for both VCC_UCD_SET and VBUS_UCD_SET regs */ /* Retry BC1.2 detection on set */ -#define BD9995X_CMD_UCD_SET_BCSRETRY (1 << 12) +#define BD9995X_CMD_UCD_SET_BCSRETRY BIT(12) /* Enable BC1.2 detection, will automatically occur on VBUS detect */ -#define BD9995X_CMD_UCD_SET_USBDETEN (1 << 7) +#define BD9995X_CMD_UCD_SET_USBDETEN BIT(7) /* USB switch state auto-control */ -#define BD9995X_CMD_UCD_SET_USB_SW_EN (1 << 1) +#define BD9995X_CMD_UCD_SET_USB_SW_EN BIT(1) /* USB switch state, 1 = ON, only meaningful when USB_SW_EN = 0 */ -#define BD9995X_CMD_UCD_SET_USB_SW (1 << 0) +#define BD9995X_CMD_UCD_SET_USB_SW BIT(0) #define BD9995X_CMD_VCC_UCD_STATUS 0x29 /* Bits for both VCC_UCD_STATUS and VBUS_UCD_STATUS regs */ -#define BD9995X_CMD_UCD_STATUS_DCDFAIL (1 << 15) -#define BD9995X_CMD_UCD_STATUS_CHGPORT1 (1 << 13) -#define BD9995X_CMD_UCD_STATUS_CHGPORT0 (1 << 12) -#define BD9995X_CMD_UCD_STATUS_PUPDET (1 << 11) -#define BD9995X_CMD_UCD_STATUS_CHGDET (1 << 6) +#define BD9995X_CMD_UCD_STATUS_DCDFAIL BIT(15) +#define BD9995X_CMD_UCD_STATUS_CHGPORT1 BIT(13) +#define BD9995X_CMD_UCD_STATUS_CHGPORT0 BIT(12) +#define BD9995X_CMD_UCD_STATUS_PUPDET BIT(11) +#define BD9995X_CMD_UCD_STATUS_CHGDET BIT(6) #define BD9995X_TYPE_MASK (BD9995X_CMD_UCD_STATUS_DCDFAIL | \ BD9995X_CMD_UCD_STATUS_CHGPORT1 | \ BD9995X_CMD_UCD_STATUS_CHGPORT0 | \ @@ -235,17 +235,17 @@ enum bd9995x_charge_port { #define BD9995X_CMD_IC_SET1 0x3A #define BD9995X_CMD_IC_SET2 0x3B #define BD9995X_CMD_SYSTEM_STATUS 0x3C -#define BD9995X_CMD_SYSTEM_STATUS_OTPLD_STATE (1 << 1) -#define BD9995X_CMD_SYSTEM_STATUS_ALLRST_STATE (1 << 0) +#define BD9995X_CMD_SYSTEM_STATUS_OTPLD_STATE BIT(1) +#define BD9995X_CMD_SYSTEM_STATUS_ALLRST_STATE BIT(0) #define BD9995X_CMD_SYSTEM_CTRL_SET 0x3D -#define BD9995X_CMD_SYSTEM_CTRL_SET_OTPLD (1 << 1) -#define BD9995X_CMD_SYSTEM_CTRL_SET_ALLRST (1 << 0) +#define BD9995X_CMD_SYSTEM_CTRL_SET_OTPLD BIT(1) +#define BD9995X_CMD_SYSTEM_CTRL_SET_ALLRST BIT(0) #define BD9995X_CMD_EXT_PROTECT_SET 0x3E #define BD9995X_CMD_EXT_MAP_SET 0x3F #define BD9995X_CMD_VM_CTRL_SET 0x40 -#define BD9995X_CMD_VM_CTRL_SET_EXTIADPEN (1 << 9) +#define BD9995X_CMD_VM_CTRL_SET_EXTIADPEN BIT(9) #define BD9995X_CMD_THERM_WINDOW_SET1 0x41 #define BD9995X_CMD_THERM_WINDOW_SET2 0x42 #define BD9995X_CMD_THERM_WINDOW_SET3 0x43 @@ -287,16 +287,16 @@ enum bd9995x_charge_port { #define BD9995X_CMD_EXTIADP_AVE_VAL 0x63 #define BD9995X_CMD_VACPCLPS_TH_SET 0x64 #define BD9995X_CMD_INT0_SET 0x68 -#define BD9995X_CMD_INT0_SET_INT2_EN (1 << 2) -#define BD9995X_CMD_INT0_SET_INT1_EN (1 << 1) -#define BD9995X_CMD_INT0_SET_INT0_EN (1 << 0) +#define BD9995X_CMD_INT0_SET_INT2_EN BIT(2) +#define BD9995X_CMD_INT0_SET_INT1_EN BIT(1) +#define BD9995X_CMD_INT0_SET_INT0_EN BIT(0) #define BD9995X_CMD_INT1_SET 0x69 /* Bits for both INT1 & INT2 reg */ -#define BD9995X_CMD_INT_SET_TH_DET (1 << 9) -#define BD9995X_CMD_INT_SET_TH_RES (1 << 8) -#define BD9995X_CMD_INT_SET_DET (1 << 1) -#define BD9995X_CMD_INT_SET_RES (1 << 0) +#define BD9995X_CMD_INT_SET_TH_DET BIT(9) +#define BD9995X_CMD_INT_SET_TH_RES BIT(8) +#define BD9995X_CMD_INT_SET_DET BIT(1) +#define BD9995X_CMD_INT_SET_RES BIT(0) #define BD9995X_CMD_INT_VBUS_DET (BD9995X_CMD_INT_SET_RES | \ BD9995X_CMD_INT_SET_DET) #define BD9995X_CMD_INT_VBUS_TH (BD9995X_CMD_INT_SET_TH_RES | \ @@ -311,8 +311,8 @@ enum bd9995x_charge_port { #define BD9995X_CMD_INT0_STATUS 0x70 #define BD9995X_CMD_INT1_STATUS 0x71 /* Bits for both INT1_STATUS & INT2_STATUS reg */ -#define BD9995X_CMD_INT_STATUS_DET (1 << 1) -#define BD9995X_CMD_INT_STATUS_RES (1 << 0) +#define BD9995X_CMD_INT_STATUS_DET BIT(1) +#define BD9995X_CMD_INT_STATUS_RES BIT(0) #define BD9995X_CMD_INT2_STATUS 0x72 #define BD9995X_CMD_INT3_STATUS 0x73 |