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-rw-r--r--driver/charger/bd9995x.h110
-rw-r--r--driver/charger/bq24192.c2
-rw-r--r--driver/charger/bq24707a.h18
-rw-r--r--driver/charger/bq24715.h112
-rw-r--r--driver/charger/bq24725.h20
-rw-r--r--driver/charger/bq24735.h34
-rw-r--r--driver/charger/bq24738.h34
-rw-r--r--driver/charger/bq24773.h8
-rw-r--r--driver/charger/bq25703.h16
-rw-r--r--driver/charger/bq25710.h20
-rw-r--r--driver/charger/bq2589x.h6
-rw-r--r--driver/charger/isl923x.h78
-rw-r--r--driver/charger/sy21612.h42
13 files changed, 250 insertions, 250 deletions
diff --git a/driver/charger/bd9995x.h b/driver/charger/bd9995x.h
index f9fb092b24..6719fd8661 100644
--- a/driver/charger/bd9995x.h
+++ b/driver/charger/bd9995x.h
@@ -71,13 +71,13 @@ enum bd9995x_charge_port {
#define BD9995X_CMD_CHGSTM_STATUS 0x00
#define BD9995X_CMD_VBAT_VSYS_STATUS 0x01
#define BD9995X_CMD_VBUS_VCC_STATUS 0x02
-#define BD9995X_CMD_VBUS_VCC_STATUS_VCC_DETECT (1 << 8)
-#define BD9995X_CMD_VBUS_VCC_STATUS_VBUS_DETECT (1 << 0)
+#define BD9995X_CMD_VBUS_VCC_STATUS_VCC_DETECT BIT(8)
+#define BD9995X_CMD_VBUS_VCC_STATUS_VBUS_DETECT BIT(0)
#define BD9995X_CMD_CHGOP_STATUS 0x03
-#define BD9995X_CMD_CHGOP_STATUS_BATTEMP2 (1 << 10)
-#define BD9995X_CMD_CHGOP_STATUS_BATTEMP1 (1 << 9)
-#define BD9995X_CMD_CHGOP_STATUS_BATTEMP0 (1 << 8)
+#define BD9995X_CMD_CHGOP_STATUS_BATTEMP2 BIT(10)
+#define BD9995X_CMD_CHGOP_STATUS_BATTEMP1 BIT(9)
+#define BD9995X_CMD_CHGOP_STATUS_BATTEMP0 BIT(8)
#define BD9995X_BATTTEMP_MASK 0x700
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP_ROOMTEMP 0
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP_HOT1 1
@@ -87,7 +87,7 @@ enum bd9995x_charge_port {
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP_COLD2 5
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP_DISABLE 6
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP_BATOPEN 7
-#define BD9995X_CMD_CHGOP_STATUS_RBOOST_UV (1 << 1)
+#define BD9995X_CMD_CHGOP_STATUS_RBOOST_UV BIT(1)
#define BD9995X_CMD_WDT_STATUS 0x04
#define BD9995X_CMD_CUR_ILIM_VAL 0x05
@@ -96,29 +96,29 @@ enum bd9995x_charge_port {
#define BD9995X_CMD_EXT_ICC_LIM_SET 0x08
#define BD9995X_CMD_IOTG_LIM_SET 0x09
#define BD9995X_CMD_VIN_CTRL_SET 0x0A
-#define BD9995X_CMD_VIN_CTRL_SET_VSYS_PRIORITY (1 << 4)
+#define BD9995X_CMD_VIN_CTRL_SET_VSYS_PRIORITY BIT(4)
-#define BD9995X_CMD_VIN_CTRL_SET_PP_BOTH_THRU (1 << 11)
-#define BD9995X_CMD_VIN_CTRL_SET_VBUS_PRIORITY (1 << 7)
-#define BD9995X_CMD_VIN_CTRL_SET_VBUS_EN (1 << 6)
-#define BD9995X_CMD_VIN_CTRL_SET_VCC_EN (1 << 5)
+#define BD9995X_CMD_VIN_CTRL_SET_PP_BOTH_THRU BIT(11)
+#define BD9995X_CMD_VIN_CTRL_SET_VBUS_PRIORITY BIT(7)
+#define BD9995X_CMD_VIN_CTRL_SET_VBUS_EN BIT(6)
+#define BD9995X_CMD_VIN_CTRL_SET_VCC_EN BIT(5)
#define BD9995X_CMD_CHGOP_SET1 0x0B
-#define BD9995X_CMD_CHGOP_SET1_DCP_2500_SEL (1 << 15)
-#define BD9995X_CMD_CHGOP_SET1_SDP_500_SEL (1 << 14)
-#define BD9995X_CMD_CHGOP_SET1_ILIM_AUTO_DISEN (1 << 13)
-#define BD9995X_CMD_CHGOP_SET1_VCC_BC_DISEN (1 << 11)
-#define BD9995X_CMD_CHGOP_SET1_VBUS_BC_DISEN (1 << 10)
-#define BD9995X_CMD_CHGOP_SET1_SDP_CHG_TRIG_EN (1 << 9)
-#define BD9995X_CMD_CHGOP_SET1_SDP_CHG_TRIG (1 << 8)
+#define BD9995X_CMD_CHGOP_SET1_DCP_2500_SEL BIT(15)
+#define BD9995X_CMD_CHGOP_SET1_SDP_500_SEL BIT(14)
+#define BD9995X_CMD_CHGOP_SET1_ILIM_AUTO_DISEN BIT(13)
+#define BD9995X_CMD_CHGOP_SET1_VCC_BC_DISEN BIT(11)
+#define BD9995X_CMD_CHGOP_SET1_VBUS_BC_DISEN BIT(10)
+#define BD9995X_CMD_CHGOP_SET1_SDP_CHG_TRIG_EN BIT(9)
+#define BD9995X_CMD_CHGOP_SET1_SDP_CHG_TRIG BIT(8)
#define BD9995X_CMD_CHGOP_SET2 0x0C
-#define BD9995X_CMD_CHGOP_SET2_BATT_LEARN (1 << 8)
-#define BD9995X_CMD_CHGOP_SET2_CHG_EN (1 << 7)
-#define BD9995X_CMD_CHGOP_SET2_USB_SUS (1 << 6)
+#define BD9995X_CMD_CHGOP_SET2_BATT_LEARN BIT(8)
+#define BD9995X_CMD_CHGOP_SET2_CHG_EN BIT(7)
+#define BD9995X_CMD_CHGOP_SET2_USB_SUS BIT(6)
#define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL (3 << 2)
#define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_600 (0 << 2)
-#define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_857 (1 << 2)
+#define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_857 BIT(2)
#define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_1000 (2 << 2)
#define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_1200 (3 << 2)
@@ -145,27 +145,27 @@ enum bd9995x_charge_port {
#define BD9995X_CMD_VBATOVP_SET 0x1E
#define BD9995X_CMD_IBATSHORT_SET 0x1F
#define BD9995X_CMD_PROCHOT_CTRL_SET 0x20
-#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN4 (1 << 4)
-#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN3 (1 << 3)
-#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN2 (1 << 2)
-#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN1 (1 << 1)
-#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN0 (1 << 0)
+#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN4 BIT(4)
+#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN3 BIT(3)
+#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN2 BIT(2)
+#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN1 BIT(1)
+#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN0 BIT(0)
#define BD9995X_CMD_PROCHOT_ICRIT_SET 0x21
#define BD9995X_CMD_PROCHOT_INORM_SET 0x22
#define BD9995X_CMD_PROCHOT_IDCHG_SET 0x23
#define BD9995X_CMD_PROCHOT_VSYS_SET 0x24
#define BD9995X_CMD_PMON_IOUT_CTRL_SET 0x25
-#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IMON_INSEL (1 << 9)
-#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_INSEL (1 << 8)
-#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_OUT_EN (1 << 7)
-#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_SOURCE_SEL (1 << 6)
+#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IMON_INSEL BIT(9)
+#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_INSEL BIT(8)
+#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_OUT_EN BIT(7)
+#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_SOURCE_SEL BIT(6)
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_MASK 0x30
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_40V 0x03
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_20V 0x02
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_10V 0x01
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_05V 0x00
-#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_OUT_EN (1 << 3)
+#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_OUT_EN BIT(3)
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_MASK 0x07
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_64UAW 0x06
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_32UAW 0x05
@@ -181,21 +181,21 @@ enum bd9995x_charge_port {
#define BD9995X_CMD_VCC_UCD_SET 0x28
/* Bits for both VCC_UCD_SET and VBUS_UCD_SET regs */
/* Retry BC1.2 detection on set */
-#define BD9995X_CMD_UCD_SET_BCSRETRY (1 << 12)
+#define BD9995X_CMD_UCD_SET_BCSRETRY BIT(12)
/* Enable BC1.2 detection, will automatically occur on VBUS detect */
-#define BD9995X_CMD_UCD_SET_USBDETEN (1 << 7)
+#define BD9995X_CMD_UCD_SET_USBDETEN BIT(7)
/* USB switch state auto-control */
-#define BD9995X_CMD_UCD_SET_USB_SW_EN (1 << 1)
+#define BD9995X_CMD_UCD_SET_USB_SW_EN BIT(1)
/* USB switch state, 1 = ON, only meaningful when USB_SW_EN = 0 */
-#define BD9995X_CMD_UCD_SET_USB_SW (1 << 0)
+#define BD9995X_CMD_UCD_SET_USB_SW BIT(0)
#define BD9995X_CMD_VCC_UCD_STATUS 0x29
/* Bits for both VCC_UCD_STATUS and VBUS_UCD_STATUS regs */
-#define BD9995X_CMD_UCD_STATUS_DCDFAIL (1 << 15)
-#define BD9995X_CMD_UCD_STATUS_CHGPORT1 (1 << 13)
-#define BD9995X_CMD_UCD_STATUS_CHGPORT0 (1 << 12)
-#define BD9995X_CMD_UCD_STATUS_PUPDET (1 << 11)
-#define BD9995X_CMD_UCD_STATUS_CHGDET (1 << 6)
+#define BD9995X_CMD_UCD_STATUS_DCDFAIL BIT(15)
+#define BD9995X_CMD_UCD_STATUS_CHGPORT1 BIT(13)
+#define BD9995X_CMD_UCD_STATUS_CHGPORT0 BIT(12)
+#define BD9995X_CMD_UCD_STATUS_PUPDET BIT(11)
+#define BD9995X_CMD_UCD_STATUS_CHGDET BIT(6)
#define BD9995X_TYPE_MASK (BD9995X_CMD_UCD_STATUS_DCDFAIL | \
BD9995X_CMD_UCD_STATUS_CHGPORT1 | \
BD9995X_CMD_UCD_STATUS_CHGPORT0 | \
@@ -235,17 +235,17 @@ enum bd9995x_charge_port {
#define BD9995X_CMD_IC_SET1 0x3A
#define BD9995X_CMD_IC_SET2 0x3B
#define BD9995X_CMD_SYSTEM_STATUS 0x3C
-#define BD9995X_CMD_SYSTEM_STATUS_OTPLD_STATE (1 << 1)
-#define BD9995X_CMD_SYSTEM_STATUS_ALLRST_STATE (1 << 0)
+#define BD9995X_CMD_SYSTEM_STATUS_OTPLD_STATE BIT(1)
+#define BD9995X_CMD_SYSTEM_STATUS_ALLRST_STATE BIT(0)
#define BD9995X_CMD_SYSTEM_CTRL_SET 0x3D
-#define BD9995X_CMD_SYSTEM_CTRL_SET_OTPLD (1 << 1)
-#define BD9995X_CMD_SYSTEM_CTRL_SET_ALLRST (1 << 0)
+#define BD9995X_CMD_SYSTEM_CTRL_SET_OTPLD BIT(1)
+#define BD9995X_CMD_SYSTEM_CTRL_SET_ALLRST BIT(0)
#define BD9995X_CMD_EXT_PROTECT_SET 0x3E
#define BD9995X_CMD_EXT_MAP_SET 0x3F
#define BD9995X_CMD_VM_CTRL_SET 0x40
-#define BD9995X_CMD_VM_CTRL_SET_EXTIADPEN (1 << 9)
+#define BD9995X_CMD_VM_CTRL_SET_EXTIADPEN BIT(9)
#define BD9995X_CMD_THERM_WINDOW_SET1 0x41
#define BD9995X_CMD_THERM_WINDOW_SET2 0x42
#define BD9995X_CMD_THERM_WINDOW_SET3 0x43
@@ -287,16 +287,16 @@ enum bd9995x_charge_port {
#define BD9995X_CMD_EXTIADP_AVE_VAL 0x63
#define BD9995X_CMD_VACPCLPS_TH_SET 0x64
#define BD9995X_CMD_INT0_SET 0x68
-#define BD9995X_CMD_INT0_SET_INT2_EN (1 << 2)
-#define BD9995X_CMD_INT0_SET_INT1_EN (1 << 1)
-#define BD9995X_CMD_INT0_SET_INT0_EN (1 << 0)
+#define BD9995X_CMD_INT0_SET_INT2_EN BIT(2)
+#define BD9995X_CMD_INT0_SET_INT1_EN BIT(1)
+#define BD9995X_CMD_INT0_SET_INT0_EN BIT(0)
#define BD9995X_CMD_INT1_SET 0x69
/* Bits for both INT1 & INT2 reg */
-#define BD9995X_CMD_INT_SET_TH_DET (1 << 9)
-#define BD9995X_CMD_INT_SET_TH_RES (1 << 8)
-#define BD9995X_CMD_INT_SET_DET (1 << 1)
-#define BD9995X_CMD_INT_SET_RES (1 << 0)
+#define BD9995X_CMD_INT_SET_TH_DET BIT(9)
+#define BD9995X_CMD_INT_SET_TH_RES BIT(8)
+#define BD9995X_CMD_INT_SET_DET BIT(1)
+#define BD9995X_CMD_INT_SET_RES BIT(0)
#define BD9995X_CMD_INT_VBUS_DET (BD9995X_CMD_INT_SET_RES | \
BD9995X_CMD_INT_SET_DET)
#define BD9995X_CMD_INT_VBUS_TH (BD9995X_CMD_INT_SET_TH_RES | \
@@ -311,8 +311,8 @@ enum bd9995x_charge_port {
#define BD9995X_CMD_INT0_STATUS 0x70
#define BD9995X_CMD_INT1_STATUS 0x71
/* Bits for both INT1_STATUS & INT2_STATUS reg */
-#define BD9995X_CMD_INT_STATUS_DET (1 << 1)
-#define BD9995X_CMD_INT_STATUS_RES (1 << 0)
+#define BD9995X_CMD_INT_STATUS_DET BIT(1)
+#define BD9995X_CMD_INT_STATUS_RES BIT(0)
#define BD9995X_CMD_INT2_STATUS 0x72
#define BD9995X_CMD_INT3_STATUS 0x73
diff --git a/driver/charger/bq24192.c b/driver/charger/bq24192.c
index 8c82b84475..5d7ca58862 100644
--- a/driver/charger/bq24192.c
+++ b/driver/charger/bq24192.c
@@ -53,7 +53,7 @@ static int bq24192_watchdog_reset(void)
rv = bq24192_read(BQ24192_REG_POWER_ON_CFG, &val);
if (rv)
return rv;
- val |= (1 << 6);
+ val |= BIT(6);
return bq24192_write(BQ24192_REG_POWER_ON_CFG, val) ||
bq24192_write(BQ24192_REG_POWER_ON_CFG, val);
}
diff --git a/driver/charger/bq24707a.h b/driver/charger/bq24707a.h
index 14e89ed136..ac3293e04d 100644
--- a/driver/charger/bq24707a.h
+++ b/driver/charger/bq24707a.h
@@ -15,28 +15,28 @@
#define BQ24707_DEVICE_ID 0xff
/* ChargeOption 0x12 */
-#define OPTION_CHARGE_INHIBIT (1 << 0)
+#define OPTION_CHARGE_INHIBIT BIT(0)
#define OPTION_ACOC_THRESHOLD (3 << 1)
-#define OPTION_COMPARATOR_THRESHOLD (1 << 4)
-#define OPTION_IOUT_SELECTION (1 << 5)
+#define OPTION_COMPARATOR_THRESHOLD BIT(4)
+#define OPTION_IOUT_SELECTION BIT(5)
#define OPTION_IFAULT_HI_THRESHOLD (3 << 7)
-#define OPTION_EMI_FREQ_ENABLE (1 << 9)
-#define OPTION_EMI_FREQ_ADJ (1 << 10)
+#define OPTION_EMI_FREQ_ENABLE BIT(9)
+#define OPTION_EMI_FREQ_ADJ BIT(10)
#define OPTION_WATCHDOG_TIMER (3 << 13)
-#define OPTION_AOC_DELITCH_TIME (1 << 15)
+#define OPTION_AOC_DELITCH_TIME BIT(15)
/* OPTION_ACOC_THRESHOLD */
#define ACOC_THRESHOLD_DISABLE (0 << 1)
-#define ACOC_THRESHOLD_133X (1 << 1)
+#define ACOC_THRESHOLD_133X BIT(1)
#define ACOC_THRESHOLD_166X_DEFAULT (2 << 1)
#define ACOC_THRESHOLD_222X (3 << 1)
/* OPTION_IFAULT_HI_THRESHOLD */
#define IFAULT_THRESHOLD_300MV (0 << 7)
-#define IFAULT_THRESHOLD_500MV (1 << 7)
+#define IFAULT_THRESHOLD_500MV BIT(7)
#define IFAULT_THRESHOLD_700MV_DEFAULT (2 << 7)
#define IFAULT_THRESHOLD_900MV (3 << 7)
/* OPTION_WATCHDOG_TIMER */
#define CHARGE_WATCHDOG_DISABLE (0 << 13)
-#define CHARGE_WATCHDOG_44SEC (1 << 13)
+#define CHARGE_WATCHDOG_44SEC BIT(13)
#define CHARGE_WATCHDOG_88SEC (2 << 13)
#define CHARGE_WATCHDOG_175SEC_DEFAULT (3 << 13)
diff --git a/driver/charger/bq24715.h b/driver/charger/bq24715.h
index bb5deec902..669dc542ed 100644
--- a/driver/charger/bq24715.h
+++ b/driver/charger/bq24715.h
@@ -23,63 +23,63 @@
#define BQ24715_DEVICE_ID 0xff
/* ChargeOption Register - 0x12 */
-#define OPT_LOWPOWER_MASK (1 << 15)
+#define OPT_LOWPOWER_MASK BIT(15)
#define OPT_LOWPOWER_DSCHRG_I_MON_ON (0 << 15)
-#define OPT_LOWPOWER_DSCHRG_I_MON_OFF (1 << 15)
+#define OPT_LOWPOWER_DSCHRG_I_MON_OFF BIT(15)
#define OPT_WATCHDOG_MASK (3 << 13)
#define OPT_WATCHDOG_DISABLE (0 << 13)
-#define OPT_WATCHDOG_44SEC (1 << 13)
+#define OPT_WATCHDOG_44SEC BIT(13)
#define OPT_WATCHDOG_88SEC (2 << 13)
#define OPT_WATCHDOG_175SEC (3 << 13)
-#define OPT_SYSOVP_MASK (1 << 12)
+#define OPT_SYSOVP_MASK BIT(12)
#define OPT_SYSOVP_15P1_3SEC_10P1_2SEC (0 << 12)
-#define OPT_SYSOVP_17P0_3SEC_11P3_2SEC (1 << 12)
-#define OPT_SYSOVP_STATUS_MASK (1 << 11)
-#define OPT_SYSOVP_STATUS (1 << 11)
-#define OPT_AUDIO_FREQ_LIMIT_MASK (1 << 10)
+#define OPT_SYSOVP_17P0_3SEC_11P3_2SEC BIT(12)
+#define OPT_SYSOVP_STATUS_MASK BIT(11)
+#define OPT_SYSOVP_STATUS BIT(11)
+#define OPT_AUDIO_FREQ_LIMIT_MASK BIT(10)
#define OPT_AUDIO_FREQ_NO_LIMIT (0 << 10)
-#define OPT_AUDIO_FREQ_40KHZ_LIMIT (1 << 10)
+#define OPT_AUDIO_FREQ_40KHZ_LIMIT BIT(10)
#define OPT_SWITCH_FREQ_MASK (3 << 8)
#define OPT_SWITCH_FREQ_600KHZ (0 << 8)
-#define OPT_SWITCH_FREQ_800KHZ (1 << 8)
+#define OPT_SWITCH_FREQ_800KHZ BIT(8)
#define OPT_SWITCH_FREQ_1MHZ (2 << 8)
#define OPT_SWITCH_FREQ_800KHZ_DUP (3 << 8)
-#define OPT_ACOC_MASK (1 << 7)
+#define OPT_ACOC_MASK BIT(7)
#define OPT_ACOC_DISABLED (0 << 7)
-#define OPT_ACOC_333PCT_IPDM (1 << 7)
-#define OPT_LSFET_OCP_MASK (1 << 6)
+#define OPT_ACOC_333PCT_IPDM BIT(7)
+#define OPT_LSFET_OCP_MASK BIT(6)
#define OPT_LSFET_OCP_250MV (0 << 6)
-#define OPT_LSFET_OCP_350MV (1 << 6)
-#define OPT_LEARN_MASK (1 << 5)
+#define OPT_LSFET_OCP_350MV BIT(6)
+#define OPT_LEARN_MASK BIT(5)
#define OPT_LEARN_DISABLE (0 << 5)
-#define OPT_LEARN_ENABLE (1 << 5)
-#define OPT_IOUT_MASK (1 << 4)
+#define OPT_LEARN_ENABLE BIT(5)
+#define OPT_IOUT_MASK BIT(4)
#define OPT_IOUT_40X (0 << 4)
-#define OPT_IOUT_16X (1 << 4)
-#define OPT_FIX_IOUT_MASK (1 << 3)
+#define OPT_IOUT_16X BIT(4)
+#define OPT_FIX_IOUT_MASK BIT(3)
#define OPT_FIX_IOUT_IDPM_EN (0 << 3)
-#define OPT_FIX_IOUT_ALWAYS (1 << 3)
-#define OPT_LDO_MODE_MASK (1 << 2)
+#define OPT_FIX_IOUT_ALWAYS BIT(3)
+#define OPT_LDO_MODE_MASK BIT(2)
#define OPT_LDO_DISABLE (0 << 2)
-#define OPT_LDO_ENABLE (1 << 2)
-#define OPT_IDPM_MASK (1 << 1)
+#define OPT_LDO_ENABLE BIT(2)
+#define OPT_IDPM_MASK BIT(1)
#define OPT_IDPM_DISABLE (0 << 1)
-#define OPT_IDPM_ENABLE (1 << 1)
-#define OPT_CHARGE_INHIBIT_MASK (1 << 0)
+#define OPT_IDPM_ENABLE BIT(1)
+#define OPT_CHARGE_INHIBIT_MASK BIT(0)
#define OPT_CHARGE_ENABLE (0 << 0)
-#define OPT_CHARGE_DISABLE (1 << 0)
+#define OPT_CHARGE_DISABLE BIT(0)
/* ChargeCurrent Register - 0x14
* The ChargeCurrent register controls a DAC. Therefore
* the below definitions are cummulative. */
-#define CHARGE_I_64MA (1 << 6)
-#define CHARGE_I_128MA (1 << 7)
-#define CHARGE_I_256MA (1 << 8)
-#define CHARGE_I_512MA (1 << 9)
-#define CHARGE_I_1024MA (1 << 10)
-#define CHARGE_I_2048MA (1 << 11)
-#define CHARGE_I_4096MA (1 << 12)
+#define CHARGE_I_64MA BIT(6)
+#define CHARGE_I_128MA BIT(7)
+#define CHARGE_I_256MA BIT(8)
+#define CHARGE_I_512MA BIT(9)
+#define CHARGE_I_1024MA BIT(10)
+#define CHARGE_I_2048MA BIT(11)
+#define CHARGE_I_4096MA BIT(12)
#define CHARGE_I_OFF (0)
#define CHARGE_I_MIN (128)
#define CHARGE_I_MAX (8128)
@@ -88,16 +88,16 @@
/* MaxChargeVoltage Register - 0x15
* The MaxChargeVoltage register controls a DAC. Therefore
* the below definitions are cummulative. */
-#define CHARGE_V_16MV (1 << 4)
-#define CHARGE_V_32MV (1 << 5)
-#define CHARGE_V_64MV (1 << 6)
-#define CHARGE_V_128MV (1 << 7)
-#define CHARGE_V_256MV (1 << 8)
-#define CHARGE_V_512MV (1 << 9)
-#define CHARGE_V_1024MV (1 << 10)
-#define CHARGE_V_2048MV (1 << 11)
-#define CHARGE_V_4096MV (1 << 12)
-#define CHARGE_V_8192MV (1 << 13)
+#define CHARGE_V_16MV BIT(4)
+#define CHARGE_V_32MV BIT(5)
+#define CHARGE_V_64MV BIT(6)
+#define CHARGE_V_128MV BIT(7)
+#define CHARGE_V_256MV BIT(8)
+#define CHARGE_V_512MV BIT(9)
+#define CHARGE_V_1024MV BIT(10)
+#define CHARGE_V_2048MV BIT(11)
+#define CHARGE_V_4096MV BIT(12)
+#define CHARGE_V_8192MV BIT(13)
#define CHARGE_V_MIN (4096)
#define CHARGE_V_MAX (0x3ff0)
#define CHARGE_V_STEP (16)
@@ -105,24 +105,24 @@
/* MinSystemVoltage Register - 0x3e
* The MinSystemVoltage register controls a DAC. Therefore
* the below definitions are cummulative. */
-#define MIN_SYS_V_256MV (1 << 8)
-#define MIN_SYS_V_512MV (1 << 9)
-#define MIN_SYS_V_1024MV (1 << 10)
-#define MIN_SYS_V_2048MV (1 << 11)
-#define MIN_SYS_V_4096MV (1 << 12)
-#define MIN_SYS_V_8192MV (1 << 13)
+#define MIN_SYS_V_256MV BIT(8)
+#define MIN_SYS_V_512MV BIT(9)
+#define MIN_SYS_V_1024MV BIT(10)
+#define MIN_SYS_V_2048MV BIT(11)
+#define MIN_SYS_V_4096MV BIT(12)
+#define MIN_SYS_V_8192MV BIT(13)
#define MIN_SYS_V_MIN (4096)
/* InputCurrent Register - 0x3f
* The InputCurrent register controls a DAC. Therefore
* the below definitions are cummulative. */
-#define INPUT_I_64MA (1 << 6)
-#define INPUT_I_128MA (1 << 7)
-#define INPUT_I_256MA (1 << 8)
-#define INPUT_I_512MA (1 << 9)
-#define INPUT_I_1024MA (1 << 10)
-#define INPUT_I_2048MA (1 << 11)
-#define INPUT_I_4096MA (1 << 12)
+#define INPUT_I_64MA BIT(6)
+#define INPUT_I_128MA BIT(7)
+#define INPUT_I_256MA BIT(8)
+#define INPUT_I_512MA BIT(9)
+#define INPUT_I_1024MA BIT(10)
+#define INPUT_I_2048MA BIT(11)
+#define INPUT_I_4096MA BIT(12)
#define INPUT_I_MIN (128)
#define INPUT_I_MAX (8064)
#define INPUT_I_STEP (64)
diff --git a/driver/charger/bq24725.h b/driver/charger/bq24725.h
index b935501a20..c53019a2aa 100644
--- a/driver/charger/bq24725.h
+++ b/driver/charger/bq24725.h
@@ -15,34 +15,34 @@
#define BQ24725_DEVICE_ID 0xff
/* ChargeOption 0x12 */
-#define OPTION_CHARGE_INHIBIT (1 << 0)
+#define OPTION_CHARGE_INHIBIT BIT(0)
#define OPTION_ACOC_THRESHOLD (3 << 1)
-#define OPTION_IOUT_SELECTION (1 << 5)
-#define OPTION_LEARN_ENABLE (1 << 6)
+#define OPTION_IOUT_SELECTION BIT(5)
+#define OPTION_LEARN_ENABLE BIT(6)
#define OPTION_IFAULT_HI_THRESHOLD (3 << 7)
-#define OPTION_EMI_FREQ_ENABLE (1 << 9)
-#define OPTION_EMI_FREQ_ADJ (1 << 10)
+#define OPTION_EMI_FREQ_ENABLE BIT(9)
+#define OPTION_EMI_FREQ_ADJ BIT(10)
#define OPTION_BAT_DEPLETION_THRESHOLD (3 << 11)
#define OPTION_WATCHDOG_TIMER (3 << 13)
-#define OPTION_AOC_DELITCH_TIME (1 << 15)
+#define OPTION_AOC_DELITCH_TIME BIT(15)
/* OPTION_ACOC_THRESHOLD */
#define ACOC_THRESHOLD_DISABLE (0 << 1)
-#define ACOC_THRESHOLD_133X (1 << 1)
+#define ACOC_THRESHOLD_133X BIT(1)
#define ACOC_THRESHOLD_166X_DEFAULT (2 << 1)
#define ACOC_THRESHOLD_222X (3 << 1)
/* OPTION_IFAULT_HI_THRESHOLD */
#define IFAULT_THRESHOLD_300MV (0 << 7)
-#define IFAULT_THRESHOLD_500MV (1 << 7)
+#define IFAULT_THRESHOLD_500MV BIT(7)
#define IFAULT_THRESHOLD_700MV_DEFAULT (2 << 7)
#define IFAULT_THRESHOLD_900MV (3 << 7)
/* OPTION_BAT_DEPLETION_THRESHOLD */
#define FALLING_THRESHOLD_5919 (0 << 11)
-#define FALLING_THRESHOLD_6265 (1 << 11)
+#define FALLING_THRESHOLD_6265 BIT(11)
#define FALLING_THRESHOLD_6655 (2 << 11)
#define FALLING_THRESHOLD_7097_DEFAULT (3 << 11)
/* OPTION_WATCHDOG_TIMER */
#define CHARGE_WATCHDOG_DISABLE (0 << 13)
-#define CHARGE_WATCHDOG_44SEC (1 << 13)
+#define CHARGE_WATCHDOG_44SEC BIT(13)
#define CHARGE_WATCHDOG_88SEC (2 << 13)
#define CHARGE_WATCHDOG_175SEC_DEFAULT (3 << 13)
diff --git a/driver/charger/bq24735.h b/driver/charger/bq24735.h
index 05336cb41c..e29b9aa692 100644
--- a/driver/charger/bq24735.h
+++ b/driver/charger/bq24735.h
@@ -15,43 +15,43 @@
#define BQ24735_DEVICE_ID 0xff
/* ChargeOption 0x12 */
-#define OPTION_CHARGE_INHIBIT (1 << 0)
-#define OPTION_ACOC_THRESHOLD (1 << 1)
-#define OPTION_BOOST_MODE_STATE (1 << 2)
-#define OPTION_BOOST_MODE_ENABLE (1 << 3)
-#define OPTION_ACDET_STATE (1 << 4)
-#define OPTION_IOUT_SELECTION (1 << 5)
-#define OPTION_LEARN_ENABLE (1 << 6)
-#define OPTION_IFAULT_LOW_THRESHOLD (1 << 7)
-#define OPTION_IFAULT_HI_ENABLE (1 << 8)
-#define OPTION_EMI_FREQ_ENABLE (1 << 9)
-#define OPTION_EMI_FREQ_ADJ (1 << 10)
+#define OPTION_CHARGE_INHIBIT BIT(0)
+#define OPTION_ACOC_THRESHOLD BIT(1)
+#define OPTION_BOOST_MODE_STATE BIT(2)
+#define OPTION_BOOST_MODE_ENABLE BIT(3)
+#define OPTION_ACDET_STATE BIT(4)
+#define OPTION_IOUT_SELECTION BIT(5)
+#define OPTION_LEARN_ENABLE BIT(6)
+#define OPTION_IFAULT_LOW_THRESHOLD BIT(7)
+#define OPTION_IFAULT_HI_ENABLE BIT(8)
+#define OPTION_EMI_FREQ_ENABLE BIT(9)
+#define OPTION_EMI_FREQ_ADJ BIT(10)
#define OPTION_BAT_DEPLETION_THRESHOLD (3 << 11)
#define OPTION_WATCHDOG_TIMER (3 << 13)
-#define OPTION_ACPRES_DEGLITCH_TIME (1 << 15)
+#define OPTION_ACPRES_DEGLITCH_TIME BIT(15)
/* OPTION_ACOC_THRESHOLD */
#define ACOC_THRESHOLD_DISABLE (0 << 1)
-#define ACOC_THRESHOLD_133X (1 << 1)
+#define ACOC_THRESHOLD_133X BIT(1)
/* OPTION_IFAULT_LOW_THRESHOLD */
#define IFAULT_LOW_135MV_DEFAULT (0 << 7)
-#define IFAULT_LOW_230MV (1 << 7)
+#define IFAULT_LOW_230MV BIT(7)
/* OPTION_BAT_DEPLETION_THRESHOLD */
#define FALLING_THRESHOLD_5919 (0 << 11)
-#define FALLING_THRESHOLD_6265 (1 << 11)
+#define FALLING_THRESHOLD_6265 BIT(11)
#define FALLING_THRESHOLD_6655 (2 << 11)
#define FALLING_THRESHOLD_7097_DEFAULT (3 << 11)
/* OPTION_WATCHDOG_TIMER */
#define CHARGE_WATCHDOG_DISABLE (0 << 13)
-#define CHARGE_WATCHDOG_44SEC (1 << 13)
+#define CHARGE_WATCHDOG_44SEC BIT(13)
#define CHARGE_WATCHDOG_88SEC (2 << 13)
#define CHARGE_WATCHDOG_175SEC_DEFAULT (3 << 13)
/* OPTION_ACPRES_DEGLITCH_TIME */
#define ACPRES_DEGLITCH_150MS (0 << 15)
-#define ACPRES_DEGLITCH_1300MS_DEFAULT (1 << 15)
+#define ACPRES_DEGLITCH_1300MS_DEFAULT BIT(15)
#endif /* __CROS_EC_BQ24735_H */
diff --git a/driver/charger/bq24738.h b/driver/charger/bq24738.h
index a40a9e193f..194a2941c0 100644
--- a/driver/charger/bq24738.h
+++ b/driver/charger/bq24738.h
@@ -15,43 +15,43 @@
#define BQ24738_DEVICE_ID 0xff
/* ChargeOption 0x12 */
-#define OPTION_CHARGE_INHIBIT (1 << 0)
-#define OPTION_ACOC_THRESHOLD (1 << 1)
-#define OPTION_BOOST_MODE_STATE (1 << 2)
-#define OPTION_BOOST_MODE_ENABLE (1 << 3)
-#define OPTION_ACDET_STATE (1 << 4)
-#define OPTION_IOUT_SELECTION (1 << 5)
-#define OPTION_LEARN_ENABLE (1 << 6)
-#define OPTION_IFAULT_LOW_THRESHOLD (1 << 7)
-#define OPTION_IFAULT_HI_ENABLE (1 << 8)
-#define OPTION_EMI_FREQ_ENABLE (1 << 9)
-#define OPTION_EMI_FREQ_ADJ (1 << 10)
+#define OPTION_CHARGE_INHIBIT BIT(0)
+#define OPTION_ACOC_THRESHOLD BIT(1)
+#define OPTION_BOOST_MODE_STATE BIT(2)
+#define OPTION_BOOST_MODE_ENABLE BIT(3)
+#define OPTION_ACDET_STATE BIT(4)
+#define OPTION_IOUT_SELECTION BIT(5)
+#define OPTION_LEARN_ENABLE BIT(6)
+#define OPTION_IFAULT_LOW_THRESHOLD BIT(7)
+#define OPTION_IFAULT_HI_ENABLE BIT(8)
+#define OPTION_EMI_FREQ_ENABLE BIT(9)
+#define OPTION_EMI_FREQ_ADJ BIT(10)
#define OPTION_BAT_DEPLETION_THRESHOLD (3 << 11)
#define OPTION_WATCHDOG_TIMER (3 << 13)
-#define OPTION_ACPRES_DEGLITCH_TIME (1 << 15)
+#define OPTION_ACPRES_DEGLITCH_TIME BIT(15)
/* OPTION_ACOC_THRESHOLD */
#define ACOC_THRESHOLD_DISABLE (0 << 1)
-#define ACOC_THRESHOLD_133X (1 << 1)
+#define ACOC_THRESHOLD_133X BIT(1)
/* OPTION_IFAULT_LOW_THRESHOLD */
#define IFAULT_LOW_135MV_DEFAULT (0 << 7)
-#define IFAULT_LOW_230MV (1 << 7)
+#define IFAULT_LOW_230MV BIT(7)
/* OPTION_BAT_DEPLETION_THRESHOLD */
#define FALLING_THRESHOLD_5919 (0 << 11)
-#define FALLING_THRESHOLD_6265 (1 << 11)
+#define FALLING_THRESHOLD_6265 BIT(11)
#define FALLING_THRESHOLD_6655 (2 << 11)
#define FALLING_THRESHOLD_7097_DEFAULT (3 << 11)
/* OPTION_WATCHDOG_TIMER */
#define CHARGE_WATCHDOG_DISABLE (0 << 13)
-#define CHARGE_WATCHDOG_44SEC (1 << 13)
+#define CHARGE_WATCHDOG_44SEC BIT(13)
#define CHARGE_WATCHDOG_88SEC (2 << 13)
#define CHARGE_WATCHDOG_175SEC_DEFAULT (3 << 13)
/* OPTION_ACPRES_DEGLITCH_TIME */
#define ACPRES_DEGLITCH_150MS (0 << 15)
-#define ACPRES_DEGLITCH_1300MS_DEFAULT (1 << 15)
+#define ACPRES_DEGLITCH_1300MS_DEFAULT BIT(15)
#endif /* __CROS_EC_BQ24738_H */
diff --git a/driver/charger/bq24773.h b/driver/charger/bq24773.h
index 216e3d4c77..2f1a7ffad2 100644
--- a/driver/charger/bq24773.h
+++ b/driver/charger/bq24773.h
@@ -41,15 +41,15 @@
#define BQ24773_CHARGE_OPTION2 0x10
/* Option bits */
-#define OPTION0_CHARGE_INHIBIT (1 << 0)
-#define OPTION0_LEARN_ENABLE (1 << 5)
+#define OPTION0_CHARGE_INHIBIT BIT(0)
+#define OPTION0_LEARN_ENABLE BIT(5)
#define OPTION0_SWITCHING_FREQ_MASK (3 << 8)
#define OPTION0_SWITCHING_FREQ_600KHZ (0 << 8)
-#define OPTION0_SWITCHING_FREQ_800KHZ (1 << 8)
+#define OPTION0_SWITCHING_FREQ_800KHZ BIT(8)
#define OPTION0_SWITCHING_FREQ_1000KHZ (2 << 8)
#define OPTION0_SWITCHING_FREQ_1200KHZ (3 << 8)
-#define OPTION2_EN_EXTILIM (1 << 7)
+#define OPTION2_EN_EXTILIM BIT(7)
/* Prochot Option bits */
#define PROCHOT_OPTION1_SELECTOR_MASK 0x7f /* [6:0] PROCHOT SELECTOR */
diff --git a/driver/charger/bq25703.h b/driver/charger/bq25703.h
index db2c246658..54d64a81c7 100644
--- a/driver/charger/bq25703.h
+++ b/driver/charger/bq25703.h
@@ -24,9 +24,9 @@
/* ChargeOption0 Register */
#define BQ25703_REG_CHARGE_OPTION_0 0x00
-#define BQ25703_CHARGE_OPTION_0_LOW_POWER_MODE (1 << 15)
-#define BQ25703_CHARGE_OPTION_0_EN_LEARN (1 << 5)
-#define BQ25703_CHARGE_OPTION_0_CHRG_INHIBIT (1 << 0)
+#define BQ25703_CHARGE_OPTION_0_LOW_POWER_MODE BIT(15)
+#define BQ25703_CHARGE_OPTION_0_EN_LEARN BIT(5)
+#define BQ25703_CHARGE_OPTION_0_CHRG_INHIBIT BIT(0)
#define BQ25703_REG_CHARGE_CURRENT 0x02
#define BQ25703_REG_MAX_CHARGE_VOLTAGE 0x04
@@ -34,23 +34,23 @@
/* ChargeOption2 Register */
#define BQ25703_REG_CHARGE_OPTION_2 0x32
-#define BQ25703_CHARGE_OPTION_2_EN_EXTILIM (1 << 7)
+#define BQ25703_CHARGE_OPTION_2_EN_EXTILIM BIT(7)
/* ChargeOption3 Register */
#define BQ25703_REG_CHARGE_OPTION_3 0x34
-#define BQ25703_CHARGE_OPTION_3_EN_ICO_MODE (1 << 11)
+#define BQ25703_CHARGE_OPTION_3_EN_ICO_MODE BIT(11)
#define BQ25703_REG_PROCHOT_OPTION_0 0x36
#define BQ25703_REG_PROCHOT_OPTION_1 0x38
/* ADCOption Register */
#define BQ25703_REG_ADC_OPTION 0x3A
-#define BQ25703_ADC_OPTION_ADC_START (1 << 14)
-#define BQ25703_ADC_OPTION_EN_ADC_IIN (1 << 4)
+#define BQ25703_ADC_OPTION_ADC_START BIT(14)
+#define BQ25703_ADC_OPTION_EN_ADC_IIN BIT(4)
/* ChargeStatus Register */
#define BQ25703_REG_CHARGER_STATUS 0x20
-#define BQ25703_CHARGE_STATUS_ICO_DONE (1 << 14)
+#define BQ25703_CHARGE_STATUS_ICO_DONE BIT(14)
#define BQ25703_REG_PROCHOT_STATUS 0x22
#define BQ25703_REG_IIN_DPM 0x25
diff --git a/driver/charger/bq25710.h b/driver/charger/bq25710.h
index 086bf13edb..73d7545c06 100644
--- a/driver/charger/bq25710.h
+++ b/driver/charger/bq25710.h
@@ -40,27 +40,27 @@
#define BQ25710_REG_DEVICE_ADDRESS 0xFF
/* ChargeOption0 Register */
-#define BQ25710_CHARGE_OPTION_0_LOW_POWER_MODE (1 << 15)
-#define BQ25710_CHARGE_OPTION_0_EN_LEARN (1 << 5)
-#define BQ25710_CHARGE_OPTION_0_CHRG_INHIBIT (1 << 0)
+#define BQ25710_CHARGE_OPTION_0_LOW_POWER_MODE BIT(15)
+#define BQ25710_CHARGE_OPTION_0_EN_LEARN BIT(5)
+#define BQ25710_CHARGE_OPTION_0_CHRG_INHIBIT BIT(0)
/* ChargeOption2 Register */
-#define BQ25710_CHARGE_OPTION_2_EN_EXTILIM (1 << 7)
+#define BQ25710_CHARGE_OPTION_2_EN_EXTILIM BIT(7)
/* ChargeOption3 Register */
-#define BQ25710_CHARGE_OPTION_3_EN_ICO_MODE (1 << 11)
+#define BQ25710_CHARGE_OPTION_3_EN_ICO_MODE BIT(11)
/* ChargeStatus Register */
-#define BQ25710_CHARGE_STATUS_ICO_DONE (1 << 14)
+#define BQ25710_CHARGE_STATUS_ICO_DONE BIT(14)
/* IIN_DPM Register */
#define BQ25710_CHARGE_IIN_BIT_0FFSET 8
#define BQ25710_CHARGE_MA_PER_STEP 50
/* ADCOption Register */
-#define BQ25710_ADC_OPTION_ADC_START (1 << 14)
-#define BQ25710_ADC_OPTION_EN_ADC_VBUS (1 << 6)
-#define BQ25710_ADC_OPTION_EN_ADC_IIN (1 << 4)
+#define BQ25710_ADC_OPTION_ADC_START BIT(14)
+#define BQ25710_ADC_OPTION_EN_ADC_VBUS BIT(6)
+#define BQ25710_ADC_OPTION_EN_ADC_IIN BIT(4)
#define BQ25710_ADC_OPTION_EN_ADC_ALL 0xFF
/* ADCVBUS/PSYS Register */
@@ -73,6 +73,6 @@
#define BQ25710_ADC_IIN_STEP_BIT_OFFSET 8
/* ProchotOption1 Register */
-#define BQ25710_PROCHOT_PROFILE_VDPM (1 << 7)
+#define BQ25710_PROCHOT_PROFILE_VDPM BIT(7)
#endif /* __CROS_EC_BQ25710_H */
diff --git a/driver/charger/bq2589x.h b/driver/charger/bq2589x.h
index ed49aeb661..c13d34ec7d 100644
--- a/driver/charger/bq2589x.h
+++ b/driver/charger/bq2589x.h
@@ -52,7 +52,7 @@
#define BQ2589X_IR_BAT_COMP_80MOHM (4 << 5)
#define BQ2589X_IR_BAT_COMP_60MOHM (3 << 5)
#define BQ2589X_IR_BAT_COMP_40MOHM (2 << 5)
-#define BQ2589X_IR_BAT_COMP_20MOHM (1 << 5)
+#define BQ2589X_IR_BAT_COMP_20MOHM BIT(5)
#define BQ2589X_IR_BAT_COMP_0MOHM (0 << 5)
#define BQ2589X_IR_VCLAMP_224MV (7 << 2)
#define BQ2589X_IR_VCLAMP_192MV (6 << 2)
@@ -60,11 +60,11 @@
#define BQ2589X_IR_VCLAMP_128MV (4 << 2)
#define BQ2589X_IR_VCLAMP_96MV (3 << 2)
#define BQ2589X_IR_VCLAMP_64MV (2 << 2)
-#define BQ2589X_IR_VCLAMP_32MV (1 << 2)
+#define BQ2589X_IR_VCLAMP_32MV BIT(2)
#define BQ2589X_IR_VCLAMP_0MV (0 << 2)
#define BQ2589X_IR_TREG_120C (3 << 0)
#define BQ2589X_IR_TREG_100C (2 << 0)
-#define BQ2589X_IR_TREG_80C (1 << 0)
+#define BQ2589X_IR_TREG_80C BIT(0)
#define BQ2589X_IR_TREG_60C (0 << 0)
#define BQ2589X_IR_COMP_DEFAULT (BQ2589X_IR_TREG_120C | BQ2589X_IR_VCLAMP_0MV |\
diff --git a/driver/charger/isl923x.h b/driver/charger/isl923x.h
index 118f22b77d..7947ce07bb 100644
--- a/driver/charger/isl923x.h
+++ b/driver/charger/isl923x.h
@@ -63,7 +63,7 @@
/* PROCHOT# debounce time and duration time in micro seconds */
#define ISL923X_PROCHOT_DURATION_10000 (0 << 6)
-#define ISL923X_PROCHOT_DURATION_20000 (1 << 6)
+#define ISL923X_PROCHOT_DURATION_20000 BIT(6)
#define ISL923X_PROCHOT_DURATION_15000 (2 << 6)
#define ISL923X_PROCHOT_DURATION_5000 (3 << 6)
#define ISL923X_PROCHOT_DURATION_1000 (4 << 6)
@@ -73,7 +73,7 @@
#define ISL923X_PROCHOT_DURATION_MASK (7 << 6)
#define ISL923X_PROCHOT_DEBOUNCE_10 (0 << 9)
-#define ISL923X_PROCHOT_DEBOUNCE_100 (1 << 9)
+#define ISL923X_PROCHOT_DEBOUNCE_100 BIT(9)
#define ISL923X_PROCHOT_DEBOUNCE_500 (2 << 9)
#define ISL923X_PROCHOT_DEBOUNCE_1000 (3 << 9)
#define ISL923X_PROCHOT_DEBOUNCE_MASK (3 << 9)
@@ -90,35 +90,35 @@
#define ISL9237_C0_VREG_REF_MASK 0x03
/* Control0: disable adapter voltaqe regulation */
-#define ISL923X_C0_DISABLE_VREG (1 << 2)
+#define ISL923X_C0_DISABLE_VREG BIT(2)
/* Control0: battery DCHOT reference for RS2 == 20mOhm */
#define ISL923X_C0_DCHOT_6A (0 << 3)
-#define ISL923X_C0_DCHOT_5A (1 << 3)
+#define ISL923X_C0_DCHOT_5A BIT(3)
#define ISL923X_C0_DCHOT_4A (2 << 3)
#define ISL923X_C0_DCHOT_3A (3 << 3)
#define ISL923X_C0_DCHOT_MASK (3 << 3)
/* Control1: general purpose comparator debounce time in micro second */
#define ISL923X_C1_GP_DEBOUNCE_2 (0 << 14)
-#define ISL923X_C1_GP_DEBOUNCE_12 (1 << 14)
+#define ISL923X_C1_GP_DEBOUNCE_12 BIT(14)
#define ISL923X_C1_GP_DEBOUNCE_2000 (2 << 14)
#define ISL923X_C1_GP_DEBOUNCE_5000000 (3 << 14)
#define ISL923X_C1_GP_DEBOUNCE_MASK (3 << 14)
/* Control1: learn mode */
-#define ISL923X_C1_LEARN_MODE_AUTOEXIT (1 << 13)
-#define ISL923X_C1_LEARN_MODE_ENABLE (1 << 12)
+#define ISL923X_C1_LEARN_MODE_AUTOEXIT BIT(13)
+#define ISL923X_C1_LEARN_MODE_ENABLE BIT(12)
/* Control1: OTG enable */
-#define ISL923X_C1_OTG (1 << 11)
+#define ISL923X_C1_OTG BIT(11)
/* Control1: audio filter */
-#define ISL923X_C1_AUDIO_FILTER (1 << 10)
+#define ISL923X_C1_AUDIO_FILTER BIT(10)
/* Control1: switch frequency, ISL9238 defines bit 7 as unused */
#define ISL923X_C1_SWITCH_FREQ_PROG (0 << 7) /* 1000kHz or PROG */
-#define ISL9237_C1_SWITCH_FREQ_913K (1 << 7)
+#define ISL9237_C1_SWITCH_FREQ_913K BIT(7)
#define ISL923X_C1_SWITCH_FREQ_839K (2 << 7)
#define ISL9237_C1_SWITCH_FREQ_777K (3 << 7)
#define ISL923X_C1_SWITCH_FREQ_723K (4 << 7)
@@ -128,15 +128,15 @@
#define ISL923X_C1_SWITCH_FREQ_MASK (7 << 7)
/* Control1: turbo mode */
-#define ISL923X_C1_TURBO_MODE (1 << 6)
+#define ISL923X_C1_TURBO_MODE BIT(6)
/* Control1: AMON & BMON */
-#define ISL923X_C1_DISABLE_MON (1 << 5)
-#define ISL923X_C1_SELECT_BMON (1 << 4)
+#define ISL923X_C1_DISABLE_MON BIT(5)
+#define ISL923X_C1_SELECT_BMON BIT(4)
/* Control1: PSYS, VSYS, VSYSLO */
-#define ISL923X_C1_ENABLE_PSYS (1 << 3)
-#define ISL923X_C1_ENABLE_VSYS (1 << 2)
+#define ISL923X_C1_ENABLE_PSYS BIT(3)
+#define ISL923X_C1_ENABLE_VSYS BIT(2)
#define ISL923X_C1_VSYSLO_REF_6000 0
#define ISL923X_C1_VSYSLO_REF_6300 1
#define ISL923X_C1_VSYSLO_REF_6600 2
@@ -145,35 +145,35 @@
/* Control2: trickle charging current in mA */
#define ISL923X_C2_TRICKLE_256 (0 << 14)
-#define ISL923X_C2_TRICKLE_128 (1 << 14)
+#define ISL923X_C2_TRICKLE_128 BIT(14)
#define ISL923X_C2_TRICKLE_64 (2 << 14)
#define ISL923X_C2_TRICKLE_512 (3 << 14)
#define ISL923X_C2_TRICKLE_MASK (3 << 14)
/* Control2: OTGEN debounce time in ms */
#define ISL923X_C2_OTG_DEBOUNCE_1300 (0 << 13)
-#define ISL923X_C2_OTG_DEBOUNCE_150 (1 << 13)
-#define ISL923X_C2_OTG_DEBOUNCE_MASK (1 << 13)
+#define ISL923X_C2_OTG_DEBOUNCE_150 BIT(13)
+#define ISL923X_C2_OTG_DEBOUNCE_MASK BIT(13)
/* Control2: 2-level adapter over current */
-#define ISL923X_C2_2LVL_OVERCURRENT (1 << 12)
+#define ISL923X_C2_2LVL_OVERCURRENT BIT(12)
/* Control2: adapter insertion debounce time in ms */
#define ISL923X_C2_ADAPTER_DEBOUNCE_1300 (0 << 11)
-#define ISL923X_C2_ADAPTER_DEBOUNCE_150 (1 << 11)
-#define ISL923X_C2_ADAPTER_DEBOUNCE_MASK (1 << 11)
+#define ISL923X_C2_ADAPTER_DEBOUNCE_150 BIT(11)
+#define ISL923X_C2_ADAPTER_DEBOUNCE_MASK BIT(11)
/* Control2: PROCHOT debounce time in uS */
#define ISL9238_C2_PROCHOT_DEBOUNCE_7 (0 << 9)
#define ISL9237_C2_PROCHOT_DEBOUNCE_10 (0 << 9)
-#define ISL923X_C2_PROCHOT_DEBOUNCE_100 (1 << 9)
+#define ISL923X_C2_PROCHOT_DEBOUNCE_100 BIT(9)
#define ISL923X_C2_PROCHOT_DEBOUNCE_500 (2 << 9)
#define ISL923X_C2_PROCHOT_DEBOUNCE_1000 (3 << 9)
#define ISL923X_C2_PROCHOT_DEBOUNCE_MASK (3 << 9)
/* Control2: min PROCHOT duration in uS */
#define ISL923X_C2_PROCHOT_DURATION_10000 (0 << 6)
-#define ISL923X_C2_PROCHOT_DURATION_20000 (1 << 6)
+#define ISL923X_C2_PROCHOT_DURATION_20000 BIT(6)
#define ISL923X_C2_PROCHOT_DURATION_15000 (2 << 6)
#define ISL923X_C2_PROCHOT_DURATION_5000 (3 << 6)
#define ISL923X_C2_PROCHOT_DURATION_1000 (4 << 6)
@@ -183,35 +183,35 @@
#define ISL923X_C2_PROCHOT_DURATION_MASK (7 << 6)
/* Control2: turn off ASGATE in OTG mode */
-#define ISL923X_C2_ASGATE_OFF (1 << 5)
+#define ISL923X_C2_ASGATE_OFF BIT(5)
/* Control2: CMIN, general purpose comparator reference in mV */
#define ISL923X_C2_CMIN_2000 (0 << 4)
-#define ISL923X_C2_CMIN_1200 (1 << 4)
+#define ISL923X_C2_CMIN_1200 BIT(4)
/* Control2: general purpose comparator enable */
-#define ISL923X_C2_COMPARATOR (1 << 3)
+#define ISL923X_C2_COMPARATOR BIT(3)
/* Control2: invert CMOUT, general purpose comparator output, polarity */
-#define ISL923X_C2_INVERT_CMOUT (1 << 2)
+#define ISL923X_C2_INVERT_CMOUT BIT(2)
/* Control2: disable WOC, way over current */
-#define ISL923X_C2_WOC_OFF (1 << 1)
+#define ISL923X_C2_WOC_OFF BIT(1)
/* Control2: PSYS gain in uA/W (ISL9237 only) */
-#define ISL9237_C2_PSYS_GAIN (1 << 0)
+#define ISL9237_C2_PSYS_GAIN BIT(0)
/*
* Control3: Buck-Boost switching period
* 0: x1 frequency, 1: half frequency.
*/
-#define ISL9238_C3_BB_SWITCHING_PERIOD (1 << 1)
+#define ISL9238_C3_BB_SWITCHING_PERIOD BIT(1)
/*
* Control3: AMON/BMON direction.
* 0: adapter/charging, 1:OTG/discharging (ISL9238 only)
*/
-#define ISL9238_C3_AMON_BMON_DIRECTION (1 << 3)
+#define ISL9238_C3_AMON_BMON_DIRECTION BIT(3)
/*
* Control3: Disables Autonomous Charing
@@ -219,16 +219,16 @@
* Note: This is disabled automatically when ever we set the current limit
* manually (which we always do).
*/
-#define ISL9238_C3_DISABLE_AUTO_CHARING (1 << 7)
+#define ISL9238_C3_DISABLE_AUTO_CHARING BIT(7)
/* Control3: PSYS gain in uA/W (ISL9238 only) */
-#define ISL9238_C3_PSYS_GAIN (1 << 9)
+#define ISL9238_C3_PSYS_GAIN BIT(9)
/* Control3: Don't reload ACLIM on ACIN. */
-#define ISL9238_C3_NO_RELOAD_ACLIM_ON_ACIN (1 << 14)
+#define ISL9238_C3_NO_RELOAD_ACLIM_ON_ACIN BIT(14)
/* Control3: Don't reread PROG pin. */
-#define ISL9238_C3_NO_REREAD_PROG_PIN (1 << 15)
+#define ISL9238_C3_NO_REREAD_PROG_PIN BIT(15)
/* OTG voltage limit in mV, current limit in mA */
#define ISL9237_OTG_VOLTAGE_MIN 4864
@@ -247,7 +247,7 @@
/* Info register fields */
#define ISL9237_INFO_PROG_RESISTOR_MASK 0xf
-#define ISL923X_INFO_TRICKLE_ACTIVE_MASK (1 << 4)
+#define ISL923X_INFO_TRICKLE_ACTIVE_MASK BIT(4)
#define ISL9237_INFO_PSTATE_SHIFT 5
#define ISL9237_INFO_PSTATE_MASK 3
@@ -272,9 +272,9 @@ enum isl9237_fsm_state {
FSM_OTG
};
-#define ISL923X_INFO_VSYSLO (1 << 10)
-#define ISL923X_INFO_DCHOT (1 << 11)
-#define ISL9237_INFO_ACHOT (1 << 12)
+#define ISL923X_INFO_VSYSLO BIT(10)
+#define ISL923X_INFO_DCHOT BIT(11)
+#define ISL9237_INFO_ACHOT BIT(12)
#if defined(CONFIG_CHARGER_ISL9237)
#define CHARGER_NAME "isl9237"
diff --git a/driver/charger/sy21612.h b/driver/charger/sy21612.h
index 9d531a1ee2..d685406fcf 100644
--- a/driver/charger/sy21612.h
+++ b/driver/charger/sy21612.h
@@ -41,25 +41,25 @@ enum sy21612_vbus_adj {
};
#define SY21612_CTRL1 0x00
-#define SY21612_CTRL1_REG_EN (1 << 7)
+#define SY21612_CTRL1_REG_EN BIT(7)
#define SY21612_CTRL1_LOW_BAT_MASK (7 << 4)
#define SY21612_CTRL1_LOW_BAT_10_2V (0 << 4)
-#define SY21612_CTRL1_LOW_BAT_10_7V (1 << 4)
+#define SY21612_CTRL1_LOW_BAT_10_7V BIT(4)
#define SY21612_CTRL1_LOW_BAT_11_2V (2 << 4)
#define SY21612_CTRL1_LOW_BAT_11_7V (3 << 4)
#define SY21612_CTRL1_LOW_BAT_22_0V (4 << 4)
#define SY21612_CTRL1_LOW_BAT_22_5V (5 << 4)
#define SY21612_CTRL1_LOW_BAT_23_0V (6 << 4)
#define SY21612_CTRL1_LOW_BAT_23_5V (7 << 4)
-#define SY21612_CTRL1_ADC_EN (1 << 3)
-#define SY21612_CTRL1_ADC_AUTO_MODE (1 << 2)
-#define SY21612_CTRL1_VBUS_NDISCHG (1 << 1)
+#define SY21612_CTRL1_ADC_EN BIT(3)
+#define SY21612_CTRL1_ADC_AUTO_MODE BIT(2)
+#define SY21612_CTRL1_VBUS_NDISCHG BIT(1)
#define SY21612_CTRL2 0x01
#define SY21612_CTRL2_FREQ_MASK (3 << 6)
#define SY21612_CTRL2_FREQ_SHIFT 6
#define SY21612_CTRL2_FREQ_250K (0 << 6)
-#define SY21612_CTRL2_FREQ_500K (1 << 6)
+#define SY21612_CTRL2_FREQ_500K BIT(6)
#define SY21612_CTRL2_FREQ_750K (2 << 6)
#define SY21612_CTRL2_FREQ_1M (3 << 6)
#define SY21612_CTRL2_VBUS_MASK (7 << 3)
@@ -83,7 +83,7 @@ enum sy21612_vbus_adj {
#define SY21612_PROT1 0x02
#define SY21612_PROT1_I_THRESH_MASK (7 << 5)
#define SY21612_PROT1_I_THRESH_18MV (0 << 5)
-#define SY21612_PROT1_I_THRESH_22MV (1 << 5)
+#define SY21612_PROT1_I_THRESH_22MV BIT(5)
#define SY21612_PROT1_I_THRESH_27MV (2 << 5)
#define SY21612_PROT1_I_THRESH_31MV (3 << 5)
#define SY21612_PROT1_I_THRESH_36MV (4 << 5)
@@ -92,12 +92,12 @@ enum sy21612_vbus_adj {
#define SY21612_PROT1_I_THRESH_64MV (7 << 5)
#define SY21612_PROT1_OVP_THRESH_MASK (3 << 3)
#define SY21612_PROT1_OVP_THRESH_110 (0 << 3)
-#define SY21612_PROT1_OVP_THRESH_115 (1 << 3)
+#define SY21612_PROT1_OVP_THRESH_115 BIT(3)
#define SY21612_PROT1_OVP_THRESH_120 (2 << 3)
#define SY21612_PROT1_OVP_THRESH_125 (3 << 3)
#define SY21612_PROT1_UVP_THRESH_MASK (3 << 1)
#define SY21612_PROT1_UVP_THRESH_50 (0 << 1)
-#define SY21612_PROT1_UVP_THRESH_60 (1 << 1)
+#define SY21612_PROT1_UVP_THRESH_60 BIT(1)
#define SY21612_PROT1_UVP_THRESH_70 (2 << 1)
#define SY21612_PROT1_UVP_THRESH_80 (3 << 1)
@@ -106,22 +106,22 @@ enum sy21612_vbus_adj {
#define SY21612_PROT2_I_LIMIT_6A (0 << 6)
#define SY21612_PROT2_I_LIMIT_8A (2 << 6)
#define SY21612_PROT2_I_LIMIT_10A (3 << 6)
-#define SY21612_PROT2_OCP_AUTORECOVER (1 << 5)
-#define SY21612_PROT2_UVP_AUTORECOVER (1 << 4)
-#define SY21612_PROT2_OTP_AUTORECOVER (1 << 3)
-#define SY21612_PROT2_SINK_MODE (1 << 2)
+#define SY21612_PROT2_OCP_AUTORECOVER BIT(5)
+#define SY21612_PROT2_UVP_AUTORECOVER BIT(4)
+#define SY21612_PROT2_OTP_AUTORECOVER BIT(3)
+#define SY21612_PROT2_SINK_MODE BIT(2)
#define SY21612_STATE 0x04
-#define SY21612_STATE_POWER_GOOD (1 << 7)
-#define SY21612_STATE_VBAT_LT_VBUS (1 << 6)
-#define SY21612_STATE_VBAT_LOW (1 << 5)
+#define SY21612_STATE_POWER_GOOD BIT(7)
+#define SY21612_STATE_VBAT_LT_VBUS BIT(6)
+#define SY21612_STATE_VBAT_LOW BIT(5)
#define SY21612_INT 0x05
-#define SY21612_INT_ADC_READY (1 << 7)
-#define SY21612_INT_VBUS_OCP (1 << 6)
-#define SY21612_INT_INDUCTOR_OCP (1 << 5)
-#define SY21612_INT_UVP (1 << 4)
-#define SY21612_INT_OTP (1 << 3)
+#define SY21612_INT_ADC_READY BIT(7)
+#define SY21612_INT_VBUS_OCP BIT(6)
+#define SY21612_INT_INDUCTOR_OCP BIT(5)
+#define SY21612_INT_UVP BIT(4)
+#define SY21612_INT_OTP BIT(3)
/* Battery voltage range: 0 ~ 25V */
#define SY21612_VBAT_VOLT 0x06
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