diff options
Diffstat (limited to 'driver/tcpm/anx74xx.h')
| -rw-r--r-- | driver/tcpm/anx74xx.h | 104 |
1 files changed, 52 insertions, 52 deletions
diff --git a/driver/tcpm/anx74xx.h b/driver/tcpm/anx74xx.h index deaebf3f1d..18708d38b4 100644 --- a/driver/tcpm/anx74xx.h +++ b/driver/tcpm/anx74xx.h @@ -30,16 +30,16 @@ #define ANX74XX_REG_INTP_VCONN_CTRL 0x33 #define ANX74XX_REG_VCONN_DISABLE 0x0f -#define ANX74XX_REG_VCONN_1_ENABLE (1 << 4) -#define ANX74XX_REG_VCONN_2_ENABLE (1 << 5) -#define ANX74XX_REG_R_INTERRUPT_OPEN_DRAIN (1 << 2) +#define ANX74XX_REG_VCONN_1_ENABLE BIT(4) +#define ANX74XX_REG_VCONN_2_ENABLE BIT(5) +#define ANX74XX_REG_R_INTERRUPT_OPEN_DRAIN BIT(2) #define ANX74XX_STANDBY_MODE (0) #define ANX74XX_NORMAL_MODE (1) #define ANX74XX_REG_TX_CTRL_1 0x81 -#define ANX74XX_REG_TX_HARD_RESET_REQ (1 << 1) -#define ANX74XX_REG_TX_CABLE_RESET_REQ (1 << 2) +#define ANX74XX_REG_TX_HARD_RESET_REQ BIT(1) +#define ANX74XX_REG_TX_CABLE_RESET_REQ BIT(2) #define ANX74XX_REG_TX_CTRL_2 0x82 #define ANX74XX_REG_TX_WR_FIFO 0x83 @@ -50,36 +50,36 @@ #define ANX74XX_REG_TX_START_ADDR_1 0xd0 #define ANX74XX_REG_CTRL_COMMAND 0xdb -#define ANX74XX_REG_TX_SEND_DATA_REQ (1 << 0) -#define ANX74XX_REG_TX_HARD_RST_REQ (1 << 1) +#define ANX74XX_REG_TX_SEND_DATA_REQ BIT(0) +#define ANX74XX_REG_TX_HARD_RST_REQ BIT(1) #define ANX74XX_REG_TX_BIST_CTRL 0x9D -#define ANX74XX_REG_TX_BIST_MODE (1 << 4) -#define ANX74XX_REG_TX_BIST_STOP (1 << 3) -#define ANX74XX_REG_TX_BIXT_FOREVER (1 << 2) -#define ANX74XX_REG_TX_BIST_ENABLE (1 << 1) -#define ANX74XX_REG_TX_BIST_START (1 << 0) +#define ANX74XX_REG_TX_BIST_MODE BIT(4) +#define ANX74XX_REG_TX_BIST_STOP BIT(3) +#define ANX74XX_REG_TX_BIXT_FOREVER BIT(2) +#define ANX74XX_REG_TX_BIST_ENABLE BIT(1) +#define ANX74XX_REG_TX_BIST_START BIT(0) #define ANX74XX_REG_PD_HEADER 0x69 #define ANX74XX_REG_PD_RX_DATA_OBJ 0x11 #define ANX74XX_REG_PD_RX_DATA_OBJ_M 0x4d #define ANX74XX_REG_ANALOG_STATUS 0x40 -#define ANX74XX_REG_VBUS_STATUS (1 << 4) +#define ANX74XX_REG_VBUS_STATUS BIT(4) #define ANX74XX_REG_CC_PULL_RD 0xfd #define ANX74XX_REG_CC_PULL_RP 0x02 #define ANX74XX_REG_TX_AUTO_GOODCRC_2 0x94 -#define ANX74XX_REG_REPLY_SOP_EN (1 << 3) -#define ANX74XX_REG_REPLY_SOP_1_EN (1 << 4) -#define ANX74XX_REG_REPLY_SOP_2_EN (1 << 5) +#define ANX74XX_REG_REPLY_SOP_EN BIT(3) +#define ANX74XX_REG_REPLY_SOP_1_EN BIT(4) +#define ANX74XX_REG_REPLY_SOP_2_EN BIT(5) #define ANX74XX_REG_TX_AUTO_GOODCRC_1 0x9c #define ANX74XX_REG_SPEC_REV_BIT_POS (3) #define ANX74XX_REG_DATA_ROLE_BIT_POS (2) #define ANX74XX_REG_PWR_ROLE_BIT_POS (1) -#define ANX74XX_REG_AUTO_GOODCRC_EN (1 << 0) +#define ANX74XX_REG_AUTO_GOODCRC_EN BIT(0) #define ANX74XX_REG_AUTO_GOODCRC_SET(drole, prole) \ ((PD_REV20 << ANX74XX_REG_SPEC_REV_BIT_POS) | \ ((drole) << ANX74XX_REG_DATA_ROLE_BIT_POS) | \ @@ -88,7 +88,7 @@ #define ANX74XX_REG_ANALOG_CTRL_0 0x41 -#define ANX74XX_REG_R_PIN_CABLE_DET (1 << 7) +#define ANX74XX_REG_R_PIN_CABLE_DET BIT(7) #define ANX74XX_REG_ANALOG_CTRL_1 0x42 #define ANX74XX_REG_ANALOG_CTRL_5 0x46 @@ -106,19 +106,19 @@ #define ANX74XX_REG_ANALOG_CTRL_11 0x4c #define ANX74XX_REG_ANALOG_CTRL_12 0x4d -#define ANX74XX_REG_MUX_ML0_RX2 (1 << 0) -#define ANX74XX_REG_MUX_ML0_RX1 (1 << 1) -#define ANX74XX_REG_MUX_ML3_RX2 (1 << 2) -#define ANX74XX_REG_MUX_ML3_RX1 (1 << 3) -#define ANX74XX_REG_MUX_SSRX_RX2 (1 << 4) -#define ANX74XX_REG_MUX_SSRX_RX1 (1 << 5) -#define ANX74XX_REG_MUX_ML1_TX2 (1 << 6) -#define ANX74XX_REG_MUX_ML1_TX1 (1 << 7) +#define ANX74XX_REG_MUX_ML0_RX2 BIT(0) +#define ANX74XX_REG_MUX_ML0_RX1 BIT(1) +#define ANX74XX_REG_MUX_ML3_RX2 BIT(2) +#define ANX74XX_REG_MUX_ML3_RX1 BIT(3) +#define ANX74XX_REG_MUX_SSRX_RX2 BIT(4) +#define ANX74XX_REG_MUX_SSRX_RX1 BIT(5) +#define ANX74XX_REG_MUX_ML1_TX2 BIT(6) +#define ANX74XX_REG_MUX_ML1_TX1 BIT(7) -#define ANX74XX_REG_MUX_ML2_TX2 (1 << 4) -#define ANX74XX_REG_MUX_ML2_TX1 (1 << 5) -#define ANX74XX_REG_MUX_SSTX_TX2 (1 << 6) -#define ANX74XX_REG_MUX_SSTX_TX1 (1 << 7) +#define ANX74XX_REG_MUX_ML2_TX2 BIT(4) +#define ANX74XX_REG_MUX_ML2_TX1 BIT(5) +#define ANX74XX_REG_MUX_SSTX_TX2 BIT(6) +#define ANX74XX_REG_MUX_SSTX_TX1 BIT(7) #define ANX74XX_REG_CC_SOFTWARE_CTRL 0x4a #define ANX74XX_REG_CC_SW_CTRL_ENABLE 0x01 @@ -133,29 +133,29 @@ #define ANX74XX_REG_IRQ_EXT_MASK_1 0x3b #define ANX74XX_REG_IRQ_EXT_MASK_2 0x3c #define ANX74XX_REG_IRQ_EXT_SOURCE_1 0x3e -#define ANX74XX_REG_EXT_SOP (1 << 6) -#define ANX74XX_REG_EXT_SOP_PRIME (1 << 7) +#define ANX74XX_REG_EXT_SOP BIT(6) +#define ANX74XX_REG_EXT_SOP_PRIME BIT(7) #define ANX74XX_REG_IRQ_EXT_SOURCE_2 0x4e -#define ANX74XX_REG_EXT_SOP_PRIME_PRIME (1 << 0) -#define ANX74XX_REG_EXT_HARD_RST (1 << 2) +#define ANX74XX_REG_EXT_SOP_PRIME_PRIME BIT(0) +#define ANX74XX_REG_EXT_HARD_RST BIT(2) #define ANX74XX_REG_IRQ_EXT_SOURCE_3 0x4f -#define ANX74XX_REG_CLEAR_SOFT_IRQ (1 << 2) +#define ANX74XX_REG_CLEAR_SOFT_IRQ BIT(2) #define ANX74XX_REG_IRQ_SOURCE_RECV_MSG 0x6b -#define ANX74XX_REG_IRQ_CC_MSG_INT (1 << 0) -#define ANX74XX_REG_IRQ_CC_STATUS_INT (1 << 1) -#define ANX74XX_REG_IRQ_GOOD_CRC_INT (1 << 2) -#define ANX74XX_REG_IRQ_TX_FAIL_INT (1 << 3) +#define ANX74XX_REG_IRQ_CC_MSG_INT BIT(0) +#define ANX74XX_REG_IRQ_CC_STATUS_INT BIT(1) +#define ANX74XX_REG_IRQ_GOOD_CRC_INT BIT(2) +#define ANX74XX_REG_IRQ_TX_FAIL_INT BIT(3) #define ANX74XX_REG_IRQ_SOURCE_RECV_MSG_MASK 0x6c #define ANX74XX_REG_CLEAR_SET_BITS 0xff -#define ANX74XX_REG_ALERT_HARD_RST_RECV (1 << 6) -#define ANX74XX_REG_ALERT_MSG_RECV (1 << 5) -#define ANX74XX_REG_ALERT_TX_MSG_ERROR (1 << 4) -#define ANX74XX_REG_ALERT_TX_ACK_RECV (1 << 3) -#define ANX74XX_REG_ALERT_TX_CABLE_RESETOK (1 << 2) -#define ANX74XX_REG_ALERT_TX_HARD_RESETOK (1 << 1) -#define ANX74XX_REG_ALERT_CC_CHANGE (1 << 0) +#define ANX74XX_REG_ALERT_HARD_RST_RECV BIT(6) +#define ANX74XX_REG_ALERT_MSG_RECV BIT(5) +#define ANX74XX_REG_ALERT_TX_MSG_ERROR BIT(4) +#define ANX74XX_REG_ALERT_TX_ACK_RECV BIT(3) +#define ANX74XX_REG_ALERT_TX_CABLE_RESETOK BIT(2) +#define ANX74XX_REG_ALERT_TX_HARD_RESETOK BIT(1) +#define ANX74XX_REG_ALERT_CC_CHANGE BIT(0) #define ANX74XX_REG_ANALOG_CTRL_2 0x43 #define ANX74XX_REG_MODE_TRANS 0x01 @@ -181,12 +181,12 @@ #define ANX74XX_REG_CTRL_FW 0x2E #define CLEAR_RX_BUFFER (1) #define ANX74XX_REG_POWER_DOWN_CTRL 0x0d -#define ANX74XX_REG_STATUS_CC1_VRD_USB (1 << 7) -#define ANX74XX_REG_STATUS_CC1_VRD_1P5 (1 << 6) -#define ANX74XX_REG_STATUS_CC1_VRD_3P0 (1 << 5) -#define ANX74XX_REG_STATUS_CC2_VRD_USB (1 << 4) -#define ANX74XX_REG_STATUS_CC2_VRD_1P5 (1 << 3) -#define ANX74XX_REG_STATUS_CC2_VRD_3P0 (1 << 2) +#define ANX74XX_REG_STATUS_CC1_VRD_USB BIT(7) +#define ANX74XX_REG_STATUS_CC1_VRD_1P5 BIT(6) +#define ANX74XX_REG_STATUS_CC1_VRD_3P0 BIT(5) +#define ANX74XX_REG_STATUS_CC2_VRD_USB BIT(4) +#define ANX74XX_REG_STATUS_CC2_VRD_1P5 BIT(3) +#define ANX74XX_REG_STATUS_CC2_VRD_3P0 BIT(2) /* defined in the inter-bock Spec: 4.2.10 CC Detect Status */ #define ANX74XX_REG_CC_STATUS_MASK 0xf |