diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/bluetooth_le.h | 2 | ||||
| -rw-r--r-- | include/button.h | 2 | ||||
| -rw-r--r-- | include/ccd_config.h | 20 | ||||
| -rw-r--r-- | include/charge_state.h | 6 | ||||
| -rw-r--r-- | include/charge_state_v1.h | 20 | ||||
| -rw-r--r-- | include/chipset.h | 2 | ||||
| -rw-r--r-- | include/clock.h | 6 | ||||
| -rw-r--r-- | include/ec_commands.h | 2 | ||||
| -rw-r--r-- | include/extension.h | 2 | ||||
| -rw-r--r-- | include/fan.h | 4 | ||||
| -rw-r--r-- | include/gpio.h | 40 | ||||
| -rw-r--r-- | include/i2c.h | 8 | ||||
| -rw-r--r-- | include/i8042_protocol.h | 12 | ||||
| -rw-r--r-- | include/keyboard_scan.h | 6 | ||||
| -rw-r--r-- | include/motion_sense.h | 2 | ||||
| -rw-r--r-- | include/panic.h | 8 | ||||
| -rw-r--r-- | include/power.h | 8 | ||||
| -rw-r--r-- | include/pwm.h | 12 | ||||
| -rw-r--r-- | include/spi_flash_reg.h | 30 | ||||
| -rw-r--r-- | include/spi_nor.h | 4 | ||||
| -rw-r--r-- | include/system.h | 88 | ||||
| -rw-r--r-- | include/task.h | 16 | ||||
| -rw-r--r-- | include/tpm_vendor_cmds.h | 12 | ||||
| -rw-r--r-- | include/usb_descriptor.h | 4 | ||||
| -rw-r--r-- | include/usb_mux.h | 2 | ||||
| -rw-r--r-- | include/usb_pd.h | 88 |
26 files changed, 203 insertions, 203 deletions
diff --git a/include/bluetooth_le.h b/include/bluetooth_le.h index 8e0422c3a7..25a360730d 100644 --- a/include/bluetooth_le.h +++ b/include/bluetooth_le.h @@ -139,7 +139,7 @@ struct ble_adv_header { /* LL SCA Values. They are shifted left 5 bits for Hop values */ #define BLE_LL_SCA_251_PPM_TO_500_PPM (0 << 5) -#define BLE_LL_SCA_151_PPM_TO_250_PPM (1 << 5) +#define BLE_LL_SCA_151_PPM_TO_250_PPM BIT(5) #define BLE_LL_SCA_101_PPM_TO_150_PPM (2 << 5) #define BLE_LL_SCA_076_PPM_TO_100_PPM (3 << 5) #define BLE_LL_SCA_051_PPM_TO_075_PPM (4 << 5) diff --git a/include/button.h b/include/button.h index 5fca2e9037..2e1749c338 100644 --- a/include/button.h +++ b/include/button.h @@ -12,7 +12,7 @@ #include "compile_time_macros.h" #include "gpio.h" -#define BUTTON_FLAG_ACTIVE_HIGH (1 << 0) +#define BUTTON_FLAG_ACTIVE_HIGH BIT(0) enum keyboard_button_type { KEYBOARD_BUTTON_POWER = 0, diff --git a/include/ccd_config.h b/include/ccd_config.h index d3ac141d49..41d81697da 100644 --- a/include/ccd_config.h +++ b/include/ccd_config.h @@ -32,31 +32,31 @@ enum ccd_flag { * Note: This is used internally by CCD config. Do NOT test this * to control other things; use capabilities for those. */ - CCD_FLAG_TEST_LAB = (1 << 0), + CCD_FLAG_TEST_LAB = BIT(0), /* * What state were we in when the password was set? * (0=opened, 1=unlocked) */ - CCD_FLAG_PASSWORD_SET_WHEN_UNLOCKED = (1 << 1), + CCD_FLAG_PASSWORD_SET_WHEN_UNLOCKED = BIT(1), /* * Factory mode state */ - CCD_FLAG_FACTORY_MODE_ENABLED = (1 << 2), + CCD_FLAG_FACTORY_MODE_ENABLED = BIT(2), /* (flags in the middle are unused) */ /* Flags that can be set via ccd_set_flags(); fill from top down */ /* Override write protect at boot */ - CCD_FLAG_OVERRIDE_WP_AT_BOOT = (1 << 22), + CCD_FLAG_OVERRIDE_WP_AT_BOOT = BIT(22), /* * If overriding WP at boot, set it to what value * (0=disabled, 1=enabled) */ - CCD_FLAG_OVERRIDE_WP_STATE_ENABLED = (1 << 23), + CCD_FLAG_OVERRIDE_WP_STATE_ENABLED = BIT(23), }; /* Capabilities */ @@ -221,10 +221,10 @@ struct ccd_info_response { enum ccd_indicator_bits { /* has_password? */ - CCD_INDICATOR_BIT_HAS_PASSWORD = (1 << 0), + CCD_INDICATOR_BIT_HAS_PASSWORD = BIT(0), /* Are CCD capabilities in CCD_CAP_STATE_DEFAULT */ - CCD_INDICATOR_BIT_ALL_CAPS_DEFAULT = (1 << 1), + CCD_INDICATOR_BIT_ALL_CAPS_DEFAULT = BIT(1), }; /** @@ -295,16 +295,16 @@ int ccd_get_factory_mode(void); /* Flags for ccd_reset_config() */ enum ccd_reset_config_flags { /* Also reset test lab flag */ - CCD_RESET_TEST_LAB = (1 << 0), + CCD_RESET_TEST_LAB = BIT(0), /* Only reset Always/UnlessLocked settings */ - CCD_RESET_UNLOCKED_ONLY = (1 << 1), + CCD_RESET_UNLOCKED_ONLY = BIT(1), /* * Do a factory reset to enable factory mode. Factory mode sets all ccd * capabilities to always and disables write protect */ - CCD_RESET_FACTORY = (1 << 2) + CCD_RESET_FACTORY = BIT(2) }; /** diff --git a/include/charge_state.h b/include/charge_state.h index e19a2a9ab1..1435621615 100644 --- a/include/charge_state.h +++ b/include/charge_state.h @@ -47,11 +47,11 @@ enum charge_state { /* Charge state flags */ /* Forcing idle state */ -#define CHARGE_FLAG_FORCE_IDLE (1 << 0) +#define CHARGE_FLAG_FORCE_IDLE BIT(0) /* External (AC) power is present */ -#define CHARGE_FLAG_EXTERNAL_POWER (1 << 1) +#define CHARGE_FLAG_EXTERNAL_POWER BIT(1) /* Battery is responsive */ -#define CHARGE_FLAG_BATT_RESPONSIVE (1 << 2) +#define CHARGE_FLAG_BATT_RESPONSIVE BIT(2) /* Debugging constants, in the same order as enum charge_state. This string * table was moved here to sync with enum above. diff --git a/include/charge_state_v1.h b/include/charge_state_v1.h index 8d0afe32a0..97b01608ff 100644 --- a/include/charge_state_v1.h +++ b/include/charge_state_v1.h @@ -13,16 +13,16 @@ #define CHARGER_UPDATE_PERIOD (SECOND * 10) /* Power state error flags */ -#define F_CHARGER_INIT (1 << 0) /* Charger initialization */ -#define F_CHARGER_VOLTAGE (1 << 1) /* Charger maximum output voltage */ -#define F_CHARGER_CURRENT (1 << 2) /* Charger maximum output current */ -#define F_BATTERY_VOLTAGE (1 << 3) /* Battery voltage */ -#define F_BATTERY_MODE (1 << 8) /* Battery mode */ -#define F_BATTERY_CAPACITY (1 << 9) /* Battery capacity */ -#define F_BATTERY_STATE_OF_CHARGE (1 << 10) /* State of charge, percentage */ -#define F_BATTERY_UNRESPONSIVE (1 << 11) /* Battery not responding */ -#define F_BATTERY_NOT_CONNECTED (1 << 12) /* Battery not connected */ -#define F_BATTERY_GET_PARAMS (1 << 13) /* Any battery parameter bad */ +#define F_CHARGER_INIT BIT(0) /* Charger initialization */ +#define F_CHARGER_VOLTAGE BIT(1) /* Charger maximum output voltage */ +#define F_CHARGER_CURRENT BIT(2) /* Charger maximum output current */ +#define F_BATTERY_VOLTAGE BIT(3) /* Battery voltage */ +#define F_BATTERY_MODE BIT(8) /* Battery mode */ +#define F_BATTERY_CAPACITY BIT(9) /* Battery capacity */ +#define F_BATTERY_STATE_OF_CHARGE BIT(10) /* State of charge, percentage */ +#define F_BATTERY_UNRESPONSIVE BIT(11) /* Battery not responding */ +#define F_BATTERY_NOT_CONNECTED BIT(12) /* Battery not connected */ +#define F_BATTERY_GET_PARAMS BIT(13) /* Any battery parameter bad */ #define F_BATTERY_MASK (F_BATTERY_VOLTAGE | \ F_BATTERY_MODE | \ diff --git a/include/chipset.h b/include/chipset.h index 8e834680e7..77695c8303 100644 --- a/include/chipset.h +++ b/include/chipset.h @@ -80,7 +80,7 @@ enum chipset_reset_reason { * Hard shutdowns are logged on the same path as resets. */ enum chipset_shutdown_reason { - CHIPSET_SHUTDOWN_BEGIN = 1 << 15, + CHIPSET_SHUTDOWN_BEGIN = BIT(15), CHIPSET_SHUTDOWN_POWERFAIL = CHIPSET_SHUTDOWN_BEGIN, /* Forcing a shutdown as part of EC initialization */ CHIPSET_SHUTDOWN_INIT, diff --git a/include/clock.h b/include/clock.h index 7702ca85eb..e794d65206 100644 --- a/include/clock.h +++ b/include/clock.h @@ -71,9 +71,9 @@ enum bus_type { void clock_wait_bus_cycles(enum bus_type bus, uint32_t cycles); /* Clock gate control modes for clock_enable_peripheral() */ -#define CGC_MODE_RUN (1 << 0) -#define CGC_MODE_SLEEP (1 << 1) -#define CGC_MODE_DSLEEP (1 << 2) +#define CGC_MODE_RUN BIT(0) +#define CGC_MODE_SLEEP BIT(1) +#define CGC_MODE_DSLEEP BIT(2) #define CGC_MODE_ALL (CGC_MODE_RUN | CGC_MODE_SLEEP | CGC_MODE_DSLEEP) /** diff --git a/include/ec_commands.h b/include/ec_commands.h index dca16805d1..eb0e05afd5 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -2651,7 +2651,7 @@ struct ec_params_motion_sense { /* * Scale for calibration: * By default scale is 1, it is encoded on 16bits: - * 1 = BIT(1)5 + * 1 = BIT(15) * ~2 = 0xFFFF * ~0 = 0. */ diff --git a/include/extension.h b/include/extension.h index b984c583b0..5ce0410f57 100644 --- a/include/extension.h +++ b/include/extension.h @@ -19,7 +19,7 @@ enum vendor_cmd_flags { * command endpoint or the console). If this flag is not present, * the command is coming from the AP. */ - VENDOR_CMD_FROM_USB = (1 << 0), + VENDOR_CMD_FROM_USB = BIT(0), }; /* Parameters for vendor commands */ diff --git a/include/fan.h b/include/fan.h index 2facf83d9f..a92d35fccb 100644 --- a/include/fan.h +++ b/include/fan.h @@ -33,9 +33,9 @@ struct fan_t { /* Values for .flags field */ /* Enable automatic RPM control using tach input */ -#define FAN_USE_RPM_MODE (1 << 0) +#define FAN_USE_RPM_MODE BIT(0) /* Require a higher duty cycle to start up than to keep running */ -#define FAN_USE_FAST_START (1 << 1) +#define FAN_USE_FAST_START BIT(1) /* The list of fans is instantiated in board.c. */ extern struct fan_t fans[]; diff --git a/include/gpio.h b/include/gpio.h index 1c80f7e32d..f01cd5147e 100644 --- a/include/gpio.h +++ b/include/gpio.h @@ -12,29 +12,29 @@ /* Flag definitions for gpio_info and gpio_alt_func */ /* The following are valid for both gpio_info and gpio_alt_func: */ -#define GPIO_OPEN_DRAIN (1 << 0) /* Output type is open-drain */ -#define GPIO_PULL_UP (1 << 1) /* Enable on-chip pullup */ -#define GPIO_PULL_DOWN (1 << 2) /* Enable on-chip pulldown */ +#define GPIO_OPEN_DRAIN BIT(0) /* Output type is open-drain */ +#define GPIO_PULL_UP BIT(1) /* Enable on-chip pullup */ +#define GPIO_PULL_DOWN BIT(2) /* Enable on-chip pulldown */ /* The following are valid for gpio_alt_func only */ -#define GPIO_ANALOG (1 << 3) /* Set pin to analog-mode */ +#define GPIO_ANALOG BIT(3) /* Set pin to analog-mode */ /* The following are valid for gpio_info only */ -#define GPIO_INPUT (1 << 4) /* Input */ -#define GPIO_OUTPUT (1 << 5) /* Output */ -#define GPIO_LOW (1 << 6) /* If GPIO_OUTPUT, set level low */ -#define GPIO_HIGH (1 << 7) /* If GPIO_OUTPUT, set level high */ -#define GPIO_INT_F_RISING (1 << 8) /* Interrupt on rising edge */ -#define GPIO_INT_F_FALLING (1 << 9) /* Interrupt on falling edge */ -#define GPIO_INT_F_LOW (1 << 11) /* Interrupt on low level */ -#define GPIO_INT_F_HIGH (1 << 12) /* Interrupt on high level */ -#define GPIO_DEFAULT (1 << 13) /* Don't set up on boot */ -#define GPIO_INT_DSLEEP (1 << 14) /* Interrupt in deep sleep */ -#define GPIO_INT_SHARED (1 << 15) /* Shared among multiple pins */ -#define GPIO_SEL_1P8V (1 << 16) /* Support 1.8v */ -#define GPIO_ALTERNATE (1 << 17) /* GPIO used for alternate function. */ -#define GPIO_LOCKED (1 << 18) /* Lock GPIO output and configuration */ -#define GPIO_HIB_WAKE_HIGH (1 << 19) /* Hibernate wake on high level */ +#define GPIO_INPUT BIT(4) /* Input */ +#define GPIO_OUTPUT BIT(5) /* Output */ +#define GPIO_LOW BIT(6) /* If GPIO_OUTPUT, set level low */ +#define GPIO_HIGH BIT(7) /* If GPIO_OUTPUT, set level high */ +#define GPIO_INT_F_RISING BIT(8) /* Interrupt on rising edge */ +#define GPIO_INT_F_FALLING BIT(9) /* Interrupt on falling edge */ +#define GPIO_INT_F_LOW BIT(11) /* Interrupt on low level */ +#define GPIO_INT_F_HIGH BIT(12) /* Interrupt on high level */ +#define GPIO_DEFAULT BIT(13) /* Don't set up on boot */ +#define GPIO_INT_DSLEEP BIT(14) /* Interrupt in deep sleep */ +#define GPIO_INT_SHARED BIT(15) /* Shared among multiple pins */ +#define GPIO_SEL_1P8V BIT(16) /* Support 1.8v */ +#define GPIO_ALTERNATE BIT(17) /* GPIO used for alternate function. */ +#define GPIO_LOCKED BIT(18) /* Lock GPIO output and configuration */ +#define GPIO_HIB_WAKE_HIGH BIT(19) /* Hibernate wake on high level */ #ifdef CONFIG_GPIO_POWER_DOWN -#define GPIO_POWER_DOWN (1 << 20) /* Pin and pad is powered off */ +#define GPIO_POWER_DOWN BIT(20) /* Pin and pad is powered off */ #endif /* Common flag combinations */ diff --git a/include/i2c.h b/include/i2c.h index 66e2e82029..a43a2223d3 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -84,8 +84,8 @@ extern const int i2c_test_dev_used; #endif /* Flags for i2c_xfer_unlocked() */ -#define I2C_XFER_START (1 << 0) /* Start smbus session from idle state */ -#define I2C_XFER_STOP (1 << 1) /* Terminate smbus session with stop bit */ +#define I2C_XFER_START BIT(0) /* Start smbus session from idle state */ +#define I2C_XFER_STOP BIT(1) /* Terminate smbus session with stop bit */ #define I2C_XFER_SINGLE (I2C_XFER_START | I2C_XFER_STOP) /* One transaction */ /** @@ -115,8 +115,8 @@ int i2c_xfer_unlocked(int port, int slave_addr, const uint8_t *out, int out_size, uint8_t *in, int in_size, int flags); -#define I2C_LINE_SCL_HIGH (1 << 0) -#define I2C_LINE_SDA_HIGH (1 << 1) +#define I2C_LINE_SCL_HIGH BIT(0) +#define I2C_LINE_SDA_HIGH BIT(1) #define I2C_LINE_IDLE (I2C_LINE_SCL_HIGH | I2C_LINE_SDA_HIGH) /** diff --git a/include/i8042_protocol.h b/include/i8042_protocol.h index eecdafc476..8844cd658d 100644 --- a/include/i8042_protocol.h +++ b/include/i8042_protocol.h @@ -80,11 +80,11 @@ #define I8042_RET_ERR 0xff /* port 64 - command byte bits */ -#define I8042_XLATE (1 << 6) -#define I8042_AUX_DIS (1 << 5) -#define I8042_KBD_DIS (1 << 4) -#define I8042_SYS_FLAG (1 << 2) -#define I8042_ENIRQ12 (1 << 1) -#define I8042_ENIRQ1 (1 << 0) +#define I8042_XLATE BIT(6) +#define I8042_AUX_DIS BIT(5) +#define I8042_KBD_DIS BIT(4) +#define I8042_SYS_FLAG BIT(2) +#define I8042_ENIRQ12 BIT(1) +#define I8042_ENIRQ1 BIT(0) #endif /* __CROS_EC_I8042_PROTOCOL_H */ diff --git a/include/keyboard_scan.h b/include/keyboard_scan.h index 9d1b506f9d..814e4d954c 100644 --- a/include/keyboard_scan.h +++ b/include/keyboard_scan.h @@ -52,9 +52,9 @@ extern struct keyboard_scan_config keyscan_config; enum boot_key { /* No keys other than keyboard-controlled reset keys */ BOOT_KEY_NONE = 0, - BOOT_KEY_ESC = (1 << 0), - BOOT_KEY_DOWN_ARROW = (1 << 1), - BOOT_KEY_LEFT_SHIFT = (1 << 2), + BOOT_KEY_ESC = BIT(0), + BOOT_KEY_DOWN_ARROW = BIT(1), + BOOT_KEY_LEFT_SHIFT = BIT(2), }; #if defined(HAS_TASK_KEYSCAN) && defined(CONFIG_KEYBOARD_BOOT_KEYS) diff --git a/include/motion_sense.h b/include/motion_sense.h index 0e6f7aa342..65512c733b 100644 --- a/include/motion_sense.h +++ b/include/motion_sense.h @@ -70,7 +70,7 @@ enum sensor_config { 1 << (TASK_EVENT_MOTION_FIRST_SW_EVENT + (_activity_id)))) -#define ROUND_UP_FLAG (1 << 31) +#define ROUND_UP_FLAG BIT(31) #define BASE_ODR(_odr) ((_odr) & ~ROUND_UP_FLAG) #define BASE_RANGE(_range) ((_range) & ~ROUND_UP_FLAG) diff --git a/include/panic.h b/include/panic.h index aeaa8f8024..45fc31583d 100644 --- a/include/panic.h +++ b/include/panic.h @@ -99,13 +99,13 @@ enum panic_arch { /* Flags for panic_data.flags */ /* panic_data.frame is valid */ -#define PANIC_DATA_FLAG_FRAME_VALID (1 << 0) +#define PANIC_DATA_FLAG_FRAME_VALID BIT(0) /* Already printed at console */ -#define PANIC_DATA_FLAG_OLD_CONSOLE (1 << 1) +#define PANIC_DATA_FLAG_OLD_CONSOLE BIT(1) /* Already returned via host command */ -#define PANIC_DATA_FLAG_OLD_HOSTCMD (1 << 2) +#define PANIC_DATA_FLAG_OLD_HOSTCMD BIT(2) /* Already reported via host event */ -#define PANIC_DATA_FLAG_OLD_HOSTEVENT (1 << 3) +#define PANIC_DATA_FLAG_OLD_HOSTEVENT BIT(3) /** * Write a string to the panic reporting device diff --git a/include/power.h b/include/power.h index 5d506a7646..3bf598b182 100644 --- a/include/power.h +++ b/include/power.h @@ -51,12 +51,12 @@ enum power_state { * +-----------------+------------------------------------+ */ -#define POWER_SIGNAL_ACTIVE_STATE (1 << 0) +#define POWER_SIGNAL_ACTIVE_STATE BIT(0) #define POWER_SIGNAL_ACTIVE_LOW (0 << 0) -#define POWER_SIGNAL_ACTIVE_HIGH (1 << 0) +#define POWER_SIGNAL_ACTIVE_HIGH BIT(0) -#define POWER_SIGNAL_INTR_STATE (1 << 1) -#define POWER_SIGNAL_DISABLE_AT_BOOT (1 << 1) +#define POWER_SIGNAL_INTR_STATE BIT(1) +#define POWER_SIGNAL_DISABLE_AT_BOOT BIT(1) /* Information on an power signal */ struct power_signal_info { diff --git a/include/pwm.h b/include/pwm.h index 15413c537c..8c0c248e75 100644 --- a/include/pwm.h +++ b/include/pwm.h @@ -45,28 +45,28 @@ int pwm_get_duty(enum pwm_channel ch); /** * PWM output signal is inverted, so 100% duty means always low */ -#define PWM_CONFIG_ACTIVE_LOW (1 << 0) +#define PWM_CONFIG_ACTIVE_LOW BIT(0) /** * PWM channel has a fan controller with a tach input and can auto-adjust * its duty cycle to produce a given fan RPM. */ -#define PWM_CONFIG_HAS_RPM_MODE (1 << 1) +#define PWM_CONFIG_HAS_RPM_MODE BIT(1) /** * PWM clock select alternate source. The actual clock and alternate * source are chip dependent. */ -#define PWM_CONFIG_ALT_CLOCK (1 << 2) +#define PWM_CONFIG_ALT_CLOCK BIT(2) /** * PWM channel has a complementary output signal which should be enabled in * addition to the primary output. */ -#define PWM_CONFIG_COMPLEMENTARY_OUTPUT (1 << 3) +#define PWM_CONFIG_COMPLEMENTARY_OUTPUT BIT(3) /** * PWM channel must stay active in low-power idle, if enabled. */ -#define PWM_CONFIG_DSLEEP (1 << 4) +#define PWM_CONFIG_DSLEEP BIT(4) /** * PWM channel's IO type is open-drain, if enabled. (default IO is push-pull.) */ -#define PWM_CONFIG_OPEN_DRAIN (1 << 5) +#define PWM_CONFIG_OPEN_DRAIN BIT(5) #endif /* __CROS_EC_PWM_H */ diff --git a/include/spi_flash_reg.h b/include/spi_flash_reg.h index 2d564e6b50..a0ffefc721 100644 --- a/include/spi_flash_reg.h +++ b/include/spi_flash_reg.h @@ -15,21 +15,21 @@ * Common register bits for SPI flash. All registers / bits may not be valid * for all parts. */ -#define SPI_FLASH_SR2_SUS (1 << 7) -#define SPI_FLASH_SR2_CMP (1 << 6) -#define SPI_FLASH_SR2_LB3 (1 << 5) -#define SPI_FLASH_SR2_LB2 (1 << 4) -#define SPI_FLASH_SR2_LB1 (1 << 3) -#define SPI_FLASH_SR2_QE (1 << 1) -#define SPI_FLASH_SR2_SRP1 (1 << 0) -#define SPI_FLASH_SR1_SRP0 (1 << 7) -#define SPI_FLASH_SR1_SEC (1 << 6) -#define SPI_FLASH_SR1_TB (1 << 5) -#define SPI_FLASH_SR1_BP2 (1 << 4) -#define SPI_FLASH_SR1_BP1 (1 << 3) -#define SPI_FLASH_SR1_BP0 (1 << 2) -#define SPI_FLASH_SR1_WEL (1 << 1) -#define SPI_FLASH_SR1_BUSY (1 << 0) +#define SPI_FLASH_SR2_SUS BIT(7) +#define SPI_FLASH_SR2_CMP BIT(6) +#define SPI_FLASH_SR2_LB3 BIT(5) +#define SPI_FLASH_SR2_LB2 BIT(4) +#define SPI_FLASH_SR2_LB1 BIT(3) +#define SPI_FLASH_SR2_QE BIT(1) +#define SPI_FLASH_SR2_SRP1 BIT(0) +#define SPI_FLASH_SR1_SRP0 BIT(7) +#define SPI_FLASH_SR1_SEC BIT(6) +#define SPI_FLASH_SR1_TB BIT(5) +#define SPI_FLASH_SR1_BP2 BIT(4) +#define SPI_FLASH_SR1_BP1 BIT(3) +#define SPI_FLASH_SR1_BP0 BIT(2) +#define SPI_FLASH_SR1_WEL BIT(1) +#define SPI_FLASH_SR1_BUSY BIT(0) /* SR2 register existence based upon chip */ #ifdef CONFIG_SPI_FLASH_W25X40 diff --git a/include/spi_nor.h b/include/spi_nor.h index 07be853520..4bf8d853f2 100644 --- a/include/spi_nor.h +++ b/include/spi_nor.h @@ -73,8 +73,8 @@ extern const unsigned int spi_nor_devices_used; #define SPI_NOR_OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */ /* Flags for SPI_NOR_OPCODE_READ_STATUS */ -#define SPI_NOR_STATUS_REGISTER_WIP (1 << 0) /* Write in progres */ -#define SPI_NOR_STATUS_REGISTER_WEL (1 << 1) /* Write enabled latch */ +#define SPI_NOR_STATUS_REGISTER_WIP BIT(0) /* Write in progres */ +#define SPI_NOR_STATUS_REGISTER_WEL BIT(1) /* Write enabled latch */ /* If needed in the future this driver can be extended to discover SFDP * advertised erase sizes and opcodes for SFDP v1.0+. */ diff --git a/include/system.h b/include/system.h index f1c2d33cbf..0411ab71eb 100644 --- a/include/system.h +++ b/include/system.h @@ -15,26 +15,26 @@ #include "timer.h" /* Reset causes */ -#define RESET_FLAG_OTHER (1 << 0) /* Other known reason */ -#define RESET_FLAG_RESET_PIN (1 << 1) /* Reset pin asserted */ -#define RESET_FLAG_BROWNOUT (1 << 2) /* Brownout */ -#define RESET_FLAG_POWER_ON (1 << 3) /* Power-on reset */ -#define RESET_FLAG_WATCHDOG (1 << 4) /* Watchdog timer reset */ -#define RESET_FLAG_SOFT (1 << 5) /* Soft reset trigger by core */ -#define RESET_FLAG_HIBERNATE (1 << 6) /* Wake from hibernate */ -#define RESET_FLAG_RTC_ALARM (1 << 7) /* RTC alarm wake */ -#define RESET_FLAG_WAKE_PIN (1 << 8) /* Wake pin triggered wake */ -#define RESET_FLAG_LOW_BATTERY (1 << 9) /* Low battery triggered wake */ -#define RESET_FLAG_SYSJUMP (1 << 10) /* Jumped directly to this image */ -#define RESET_FLAG_HARD (1 << 11) /* Hard reset from software */ -#define RESET_FLAG_AP_OFF (1 << 12) /* Do not power on AP */ -#define RESET_FLAG_PRESERVED (1 << 13) /* Some reset flags preserved from +#define RESET_FLAG_OTHER BIT(0) /* Other known reason */ +#define RESET_FLAG_RESET_PIN BIT(1) /* Reset pin asserted */ +#define RESET_FLAG_BROWNOUT BIT(2) /* Brownout */ +#define RESET_FLAG_POWER_ON BIT(3) /* Power-on reset */ +#define RESET_FLAG_WATCHDOG BIT(4) /* Watchdog timer reset */ +#define RESET_FLAG_SOFT BIT(5) /* Soft reset trigger by core */ +#define RESET_FLAG_HIBERNATE BIT(6) /* Wake from hibernate */ +#define RESET_FLAG_RTC_ALARM BIT(7) /* RTC alarm wake */ +#define RESET_FLAG_WAKE_PIN BIT(8) /* Wake pin triggered wake */ +#define RESET_FLAG_LOW_BATTERY BIT(9) /* Low battery triggered wake */ +#define RESET_FLAG_SYSJUMP BIT(10) /* Jumped directly to this image */ +#define RESET_FLAG_HARD BIT(11) /* Hard reset from software */ +#define RESET_FLAG_AP_OFF BIT(12) /* Do not power on AP */ +#define RESET_FLAG_PRESERVED BIT(13) /* Some reset flags preserved from * previous boot */ -#define RESET_FLAG_USB_RESUME (1 << 14) /* USB resume triggered wake */ -#define RESET_FLAG_RDD (1 << 15) /* USB Type-C debug cable */ -#define RESET_FLAG_RBOX (1 << 16) /* Fixed Reset Functionality */ -#define RESET_FLAG_SECURITY (1 << 17) /* Security threat */ -#define RESET_FLAG_AP_WATCHDOG (1 << 18) /* AP experienced a watchdog reset */ +#define RESET_FLAG_USB_RESUME BIT(14) /* USB resume triggered wake */ +#define RESET_FLAG_RDD BIT(15) /* USB Type-C debug cable */ +#define RESET_FLAG_RBOX BIT(16) /* Fixed Reset Functionality */ +#define RESET_FLAG_SECURITY BIT(17) /* Security threat */ +#define RESET_FLAG_AP_WATCHDOG BIT(18) /* AP experienced a watchdog reset */ /* Per chip implementation to save/read raw RESET_FLAG_ flags. */ void chip_save_reset_flags(int flags); @@ -257,29 +257,29 @@ const char *system_get_build_info(void); * Hard reset. Cuts power to the entire system. If not present, does a soft * reset which just resets the core and on-chip peripherals. */ -#define SYSTEM_RESET_HARD (1 << 0) +#define SYSTEM_RESET_HARD BIT(0) /* * Preserve existing reset flags. Used by flash pre-init when it discovers it * needs to do a hard reset to clear write protect registers. */ -#define SYSTEM_RESET_PRESERVE_FLAGS (1 << 1) +#define SYSTEM_RESET_PRESERVE_FLAGS BIT(1) /* * Leave AP off on next reboot, instead of powering it on to do EC software * sync. */ -#define SYSTEM_RESET_LEAVE_AP_OFF (1 << 2) +#define SYSTEM_RESET_LEAVE_AP_OFF BIT(2) /* * Indicate that this was a manually triggered reset. */ -#define SYSTEM_RESET_MANUALLY_TRIGGERED (1 << 3) +#define SYSTEM_RESET_MANUALLY_TRIGGERED BIT(3) /* * Wait for reset pin to be driven, rather that resetting ourselves. */ -#define SYSTEM_RESET_WAIT_EXT (1 << 4) +#define SYSTEM_RESET_WAIT_EXT BIT(4) /* * Indicate that this reset was triggered by an AP watchdog */ -#define SYSTEM_RESET_AP_WATCHDOG (1 << 5) +#define SYSTEM_RESET_AP_WATCHDOG BIT(5) /** * Reset the system. @@ -423,32 +423,32 @@ enum { /* * Sleep masks to prevent going in to deep sleep. */ - SLEEP_MASK_AP_RUN = (1 << 0), /* the main CPU is running */ - SLEEP_MASK_UART = (1 << 1), /* UART communication ongoing */ - SLEEP_MASK_I2C_MASTER = (1 << 2), /* I2C master communication ongoing */ - SLEEP_MASK_CHARGING = (1 << 3), /* Charging loop ongoing */ - SLEEP_MASK_USB_PWR = (1 << 4), /* USB power loop ongoing */ - SLEEP_MASK_USB_PD = (1 << 5), /* USB PD device connected */ - SLEEP_MASK_SPI = (1 << 6), /* SPI communications ongoing */ - SLEEP_MASK_I2C_SLAVE = (1 << 7), /* I2C slave communication ongoing */ - SLEEP_MASK_FAN = (1 << 8), /* Fan control loop ongoing */ - SLEEP_MASK_USB_DEVICE = (1 << 9), /* Generic USB device in use */ - SLEEP_MASK_PWM = (1 << 10), /* PWM output is enabled */ - SLEEP_MASK_PHYSICAL_PRESENCE = (1 << 11), /* Physical presence + SLEEP_MASK_AP_RUN = BIT(0), /* the main CPU is running */ + SLEEP_MASK_UART = BIT(1), /* UART communication ongoing */ + SLEEP_MASK_I2C_MASTER = BIT(2), /* I2C master communication ongoing */ + SLEEP_MASK_CHARGING = BIT(3), /* Charging loop ongoing */ + SLEEP_MASK_USB_PWR = BIT(4), /* USB power loop ongoing */ + SLEEP_MASK_USB_PD = BIT(5), /* USB PD device connected */ + SLEEP_MASK_SPI = BIT(6), /* SPI communications ongoing */ + SLEEP_MASK_I2C_SLAVE = BIT(7), /* I2C slave communication ongoing */ + SLEEP_MASK_FAN = BIT(8), /* Fan control loop ongoing */ + SLEEP_MASK_USB_DEVICE = BIT(9), /* Generic USB device in use */ + SLEEP_MASK_PWM = BIT(10), /* PWM output is enabled */ + SLEEP_MASK_PHYSICAL_PRESENCE = BIT(11), /* Physical presence * detection ongoing */ - SLEEP_MASK_PLL = (1 << 12), /* High-speed PLL in-use */ - SLEEP_MASK_ADC = (1 << 13), /* ADC conversion ongoing */ - SLEEP_MASK_EMMC = (1 << 14), /* eMMC emulation ongoing */ - SLEEP_MASK_FORCE_NO_DSLEEP = (1 << 15), /* Force disable. */ + SLEEP_MASK_PLL = BIT(12), /* High-speed PLL in-use */ + SLEEP_MASK_ADC = BIT(13), /* ADC conversion ongoing */ + SLEEP_MASK_EMMC = BIT(14), /* eMMC emulation ongoing */ + SLEEP_MASK_FORCE_NO_DSLEEP = BIT(15), /* Force disable. */ /* * Sleep masks to prevent using slow speed clock in deep sleep. */ - SLEEP_MASK_JTAG = (1 << 16), /* JTAG is in use. */ - SLEEP_MASK_CONSOLE = (1 << 17), /* Console is in use. */ + SLEEP_MASK_JTAG = BIT(16), /* JTAG is in use. */ + SLEEP_MASK_CONSOLE = BIT(17), /* Console is in use. */ - SLEEP_MASK_FORCE_NO_LOW_SPEED = (1 << 31) /* Force disable. */ + SLEEP_MASK_FORCE_NO_LOW_SPEED = BIT(31) /* Force disable. */ }; /* diff --git a/include/task.h b/include/task.h index 014531721c..74bb7efe64 100644 --- a/include/task.h +++ b/include/task.h @@ -16,10 +16,10 @@ /* Tasks may use the bits in TASK_EVENT_CUSTOM for their own events */ #define TASK_EVENT_CUSTOM(x) (x & 0x0003ffff) -#define TASK_EVENT_PD_AWAKE (1 << 18) +#define TASK_EVENT_PD_AWAKE BIT(18) /* npcx peci event */ -#define TASK_EVENT_PECI_DONE (1 << 19) +#define TASK_EVENT_PECI_DONE BIT(19) /* I2C tx/rx interrupt handler completion event. */ #ifdef CHIP_STM32 @@ -33,19 +33,19 @@ #endif #endif #else -#define TASK_EVENT_I2C_IDLE (1 << 20) +#define TASK_EVENT_I2C_IDLE BIT(20) #endif /* DMA transmit complete event */ -#define TASK_EVENT_DMA_TC (1 << 26) +#define TASK_EVENT_DMA_TC BIT(26) /* ADC interrupt handler event */ -#define TASK_EVENT_ADC_DONE (1 << 27) +#define TASK_EVENT_ADC_DONE BIT(27) /* task_reset() that was requested has been completed */ -#define TASK_EVENT_RESET_DONE (1 << 28) +#define TASK_EVENT_RESET_DONE BIT(28) /* task_wake() called on task */ -#define TASK_EVENT_WAKE (1 << 29) +#define TASK_EVENT_WAKE BIT(29) /* Mutex unlocking */ -#define TASK_EVENT_MUTEX (1 << 30) +#define TASK_EVENT_MUTEX BIT(30) /* * Timer expired. For example, task_wait_event() timed out before receiving * another event. diff --git a/include/tpm_vendor_cmds.h b/include/tpm_vendor_cmds.h index c17929f96d..9c344d6f55 100644 --- a/include/tpm_vendor_cmds.h +++ b/include/tpm_vendor_cmds.h @@ -206,7 +206,7 @@ enum vendor_cc_spi_hash_request_subcmd { enum vendor_cc_spi_hash_request_flags { /* EC uses gang programmer mode */ - SPI_HASH_FLAG_EC_GANG = (1 << 0), + SPI_HASH_FLAG_EC_GANG = BIT(0), }; /* Structure for VENDOR_CC_SPI_HASH request which follows tpm_header */ @@ -224,10 +224,10 @@ struct vendor_cc_spi_hash_request { /* * Subcommand code, used to set write protect. */ -#define WPV_UPDATE (1 << 0) -#define WPV_ENABLE (1 << 1) -#define WPV_FORCE (1 << 2) -#define WPV_ATBOOT_SET (1 << 3) -#define WPV_ATBOOT_ENABLE (1 << 4) +#define WPV_UPDATE BIT(0) +#define WPV_ENABLE BIT(1) +#define WPV_FORCE BIT(2) +#define WPV_ATBOOT_SET BIT(3) +#define WPV_ATBOOT_ENABLE BIT(4) #endif /* __INCLUDE_TPM_VENDOR_CMDS_H */ diff --git a/include/usb_descriptor.h b/include/usb_descriptor.h index aadb5dc80a..f4b3014ecf 100644 --- a/include/usb_descriptor.h +++ b/include/usb_descriptor.h @@ -232,8 +232,8 @@ struct usb_endpoint_descriptor { /* Standard requests for bRequest field in a SETUP packet. */ #define USB_REQ_GET_STATUS 0x00 -#define USB_REQ_GET_STATUS_SELF_POWERED (1 << 0) -#define USB_REQ_GET_STATUS_REMOTE_WAKEUP (1 << 1) +#define USB_REQ_GET_STATUS_SELF_POWERED BIT(0) +#define USB_REQ_GET_STATUS_REMOTE_WAKEUP BIT(1) #define USB_REQ_CLEAR_FEATURE 0x01 #define USB_REQ_SET_FEATURE 0x03 #define USB_REQ_FEATURE_ENDPOINT_HALT 0x0000 diff --git a/include/usb_mux.h b/include/usb_mux.h index e483954733..808c767465 100644 --- a/include/usb_mux.h +++ b/include/usb_mux.h @@ -87,7 +87,7 @@ struct usb_mux_driver { }; /* Flags used for usb_mux.flags */ -#define USB_MUX_FLAG_NOT_TCPC (1 << 0) /* TCPC/MUX device used only as MUX */ +#define USB_MUX_FLAG_NOT_TCPC BIT(0) /* TCPC/MUX device used only as MUX */ /* Describes a USB mux present in the system */ struct usb_mux { diff --git a/include/usb_pd.h b/include/usb_pd.h index 435b2c6e3f..406dd93ce1 100644 --- a/include/usb_pd.h +++ b/include/usb_pd.h @@ -74,16 +74,16 @@ enum pd_rx_errors { * above by examining bits <29:28> to determine the additional PDO function. */ #define PDO_TYPE_FIXED (0 << 30) -#define PDO_TYPE_BATTERY (1 << 30) +#define PDO_TYPE_BATTERY BIT(30) #define PDO_TYPE_VARIABLE (2 << 30) #define PDO_TYPE_AUGMENTED (3 << 30) #define PDO_TYPE_MASK (3 << 30) -#define PDO_FIXED_DUAL_ROLE (1 << 29) /* Dual role device */ -#define PDO_FIXED_SUSPEND (1 << 28) /* USB Suspend supported */ -#define PDO_FIXED_EXTERNAL (1 << 27) /* Externally powered */ -#define PDO_FIXED_COMM_CAP (1 << 26) /* USB Communications Capable */ -#define PDO_FIXED_DATA_SWAP (1 << 25) /* Data role swap command supported */ +#define PDO_FIXED_DUAL_ROLE BIT(29) /* Dual role device */ +#define PDO_FIXED_SUSPEND BIT(28) /* USB Suspend supported */ +#define PDO_FIXED_EXTERNAL BIT(27) /* Externally powered */ +#define PDO_FIXED_COMM_CAP BIT(26) /* USB Communications Capable */ +#define PDO_FIXED_DATA_SWAP BIT(25) /* Data role swap command supported */ #define PDO_FIXED_PEAK_CURR () /* [21..20] Peak current */ #define PDO_FIXED_VOLT(mv) (((mv)/50) << 10) /* Voltage in 50mV units */ #define PDO_FIXED_CURR(ma) (((ma)/10) << 0) /* Max current in 10mA units */ @@ -114,10 +114,10 @@ enum pd_rx_errors { /* RDO : Request Data Object */ #define RDO_OBJ_POS(n) (((n) & 0x7) << 28) #define RDO_POS(rdo) (((rdo) >> 28) & 0x7) -#define RDO_GIVE_BACK (1 << 27) -#define RDO_CAP_MISMATCH (1 << 26) -#define RDO_COMM_CAP (1 << 25) -#define RDO_NO_SUSPEND (1 << 24) +#define RDO_GIVE_BACK BIT(27) +#define RDO_CAP_MISMATCH BIT(26) +#define RDO_COMM_CAP BIT(25) +#define RDO_NO_SUSPEND BIT(24) #define RDO_FIXED_VAR_OP_CURR(ma) ((((ma) / 10) & 0x3FF) << 10) #define RDO_FIXED_VAR_MAX_CURR(ma) ((((ma) / 10) & 0x3FF) << 0) @@ -137,7 +137,7 @@ enum pd_rx_errors { /* BDO : BIST Data Object */ #define BDO_MODE_RECV (0 << 28) -#define BDO_MODE_TRANSMIT (1 << 28) +#define BDO_MODE_TRANSMIT BIT(28) #define BDO_MODE_COUNTERS (2 << 28) #define BDO_MODE_CARRIER0 (3 << 28) #define BDO_MODE_CARRIER1 (4 << 28) @@ -252,8 +252,8 @@ enum hpd_event { }; /* DisplayPort flags */ -#define DP_FLAGS_DP_ON (1 << 0) /* Display port mode is on */ -#define DP_FLAGS_HPD_HI_PENDING (1 << 1) /* Pending HPD_HI */ +#define DP_FLAGS_DP_ON BIT(0) /* Display port mode is on */ +#define DP_FLAGS_HPD_HI_PENDING BIT(1) /* Pending HPD_HI */ /* supported alternate modes */ enum pd_alternate_modes { @@ -306,7 +306,7 @@ struct pd_policy { ((type) << 15) | \ ((custom) & 0x7FFF)) -#define VDO_SVDM_TYPE (1 << 15) +#define VDO_SVDM_TYPE BIT(15) #define VDO_SVDM_VERS(x) (x << 13) #define VDO_OPOS(x) (x << 8) #define VDO_CMDT(x) (x << 6) @@ -321,7 +321,7 @@ struct pd_policy { /* reserved for SVDM ... for Google UVDM */ #define VDO_SRC_INITIATOR (0 << 5) -#define VDO_SRC_RESPONDER (1 << 5) +#define VDO_SRC_RESPONDER BIT(5) #define CMD_DISCOVER_IDENT 1 #define CMD_DISCOVER_SVID 2 @@ -698,23 +698,23 @@ enum pd_states { PD_STATE_COUNT, }; -#define PD_FLAGS_PING_ENABLED (1 << 0) /* SRC_READY pings enabled */ -#define PD_FLAGS_PARTNER_DR_POWER (1 << 1) /* port partner is dualrole power */ -#define PD_FLAGS_PARTNER_DR_DATA (1 << 2) /* port partner is dualrole data */ -#define PD_FLAGS_CHECK_IDENTITY (1 << 3) /* discover identity in READY */ -#define PD_FLAGS_SNK_CAP_RECVD (1 << 4) /* sink capabilities received */ -#define PD_FLAGS_TCPC_DRP_TOGGLE (1 << 5) /* TCPC-controlled DRP toggling */ -#define PD_FLAGS_EXPLICIT_CONTRACT (1 << 6) /* explicit pwr contract in place */ -#define PD_FLAGS_VBUS_NEVER_LOW (1 << 7) /* VBUS input has never been low */ -#define PD_FLAGS_PREVIOUS_PD_CONN (1 << 8) /* previously PD connected */ -#define PD_FLAGS_CHECK_PR_ROLE (1 << 9) /* check power role in READY */ -#define PD_FLAGS_CHECK_DR_ROLE (1 << 10)/* check data role in READY */ -#define PD_FLAGS_PARTNER_EXTPOWER (1 << 11)/* port partner has external pwr */ -#define PD_FLAGS_VCONN_ON (1 << 12)/* vconn is being sourced */ -#define PD_FLAGS_TRY_SRC (1 << 13)/* Try.SRC states are active */ -#define PD_FLAGS_PARTNER_USB_COMM (1 << 14)/* port partner is USB comms */ -#define PD_FLAGS_UPDATE_SRC_CAPS (1 << 15)/* send new source capabilities */ -#define PD_FLAGS_TS_DTS_PARTNER (1 << 16)/* partner has rp/rp or rd/rd */ +#define PD_FLAGS_PING_ENABLED BIT(0) /* SRC_READY pings enabled */ +#define PD_FLAGS_PARTNER_DR_POWER BIT(1) /* port partner is dualrole power */ +#define PD_FLAGS_PARTNER_DR_DATA BIT(2) /* port partner is dualrole data */ +#define PD_FLAGS_CHECK_IDENTITY BIT(3) /* discover identity in READY */ +#define PD_FLAGS_SNK_CAP_RECVD BIT(4) /* sink capabilities received */ +#define PD_FLAGS_TCPC_DRP_TOGGLE BIT(5) /* TCPC-controlled DRP toggling */ +#define PD_FLAGS_EXPLICIT_CONTRACT BIT(6) /* explicit pwr contract in place */ +#define PD_FLAGS_VBUS_NEVER_LOW BIT(7) /* VBUS input has never been low */ +#define PD_FLAGS_PREVIOUS_PD_CONN BIT(8) /* previously PD connected */ +#define PD_FLAGS_CHECK_PR_ROLE BIT(9) /* check power role in READY */ +#define PD_FLAGS_CHECK_DR_ROLE BIT(10)/* check data role in READY */ +#define PD_FLAGS_PARTNER_EXTPOWER BIT(11)/* port partner has external pwr */ +#define PD_FLAGS_VCONN_ON BIT(12)/* vconn is being sourced */ +#define PD_FLAGS_TRY_SRC BIT(13)/* Try.SRC states are active */ +#define PD_FLAGS_PARTNER_USB_COMM BIT(14)/* port partner is USB comms */ +#define PD_FLAGS_UPDATE_SRC_CAPS BIT(15)/* send new source capabilities */ +#define PD_FLAGS_TS_DTS_PARTNER BIT(16)/* partner has rp/rp or rd/rd */ /* * These PD_FLAGS_LPM* flags track the software state (PD_LPM_FLAGS_REQUESTED) * and hardware state (PD_LPM_FLAGS_ENGAGED) of the TCPC low power mode. @@ -722,9 +722,9 @@ enum pd_states { * low power (when PD_LPM_FLAGS_ENGAGED is changing). */ #ifdef CONFIG_USB_PD_TCPC_LOW_POWER -#define PD_FLAGS_LPM_REQUESTED (1 << 17)/* Tracks SW LPM state */ -#define PD_FLAGS_LPM_ENGAGED (1 << 18)/* Tracks HW LPM state */ -#define PD_FLAGS_LPM_TRANSITION (1 << 19)/* Tracks HW LPM transition */ +#define PD_FLAGS_LPM_REQUESTED BIT(17)/* Tracks SW LPM state */ +#define PD_FLAGS_LPM_ENGAGED BIT(18)/* Tracks HW LPM state */ +#define PD_FLAGS_LPM_TRANSITION BIT(19)/* Tracks HW LPM transition */ #endif /* Flags to clear on a disconnect */ #define PD_FLAGS_RESET_ON_DISCONNECT_MASK (PD_FLAGS_PARTNER_DR_POWER | \ @@ -744,9 +744,9 @@ enum pd_states { PD_FLAGS_TS_DTS_PARTNER) /* Per-port battery backed RAM flags */ -#define PD_BBRMFLG_EXPLICIT_CONTRACT (1 << 0) -#define PD_BBRMFLG_POWER_ROLE (1 << 1) -#define PD_BBRMFLG_DATA_ROLE (1 << 2) +#define PD_BBRMFLG_EXPLICIT_CONTRACT BIT(0) +#define PD_BBRMFLG_POWER_ROLE BIT(1) +#define PD_BBRMFLG_DATA_ROLE BIT(2) enum pd_cc_states { PD_CC_NONE, @@ -830,10 +830,10 @@ enum pd_ctrl_msg_type { /* Battery Status Data Object fields for REV 3.0 */ #define BSDO_CAP_UNKNOWN 0xffff #define BSDO_CAP(n) (((n) & 0xffff) << 16) -#define BSDO_INVALID (1 << 8) -#define BSDO_PRESENT (1 << 9) -#define BSDO_DISCHARGING (1 << 10) -#define BSDO_IDLE (1 << 11) +#define BSDO_INVALID BIT(8) +#define BSDO_PRESENT BIT(9) +#define BSDO_DISCHARGING BIT(10) +#define BSDO_IDLE BIT(11) /* Get Battery Cap Message fields for REV 3.0 */ #define BATT_CAP_REF(n) (((n) >> 16) & 0xff) @@ -918,7 +918,7 @@ enum pd_data_msg_type { /* build extended message header */ /* All extended messages are chunked, so set bit 15 */ #define PD_EXT_HEADER(cnum, rchk, dsize) \ - ((1 << 15) | ((cnum) << 11) | \ + (BIT(15) | ((cnum) << 11) | \ ((rchk) << 10) | (dsize)) /* build message header */ @@ -1213,7 +1213,7 @@ void pd_update_contract(int port); /* Encode DTS status of port partner in current limit parameter */ typedef uint32_t typec_current_t; -#define TYPEC_CURRENT_DTS_MASK (1 << 31) +#define TYPEC_CURRENT_DTS_MASK BIT(31) #define TYPEC_CURRENT_ILIM_MASK (~TYPEC_CURRENT_DTS_MASK) /** |