diff options
Diffstat (limited to 'zephyr/boards/arm')
4 files changed, 308 insertions, 0 deletions
diff --git a/zephyr/boards/arm/herobrine_npcx9/Kconfig.board b/zephyr/boards/arm/herobrine_npcx9/Kconfig.board new file mode 100644 index 0000000000..d9e7faf3af --- /dev/null +++ b/zephyr/boards/arm/herobrine_npcx9/Kconfig.board @@ -0,0 +1,15 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# "BOARD" below refers to a Zephyr board, which does not have a 1:1 +# mapping with the Chrome OS concept of a board. By Zephyr's +# conventions, we'll still call it "BOARD_*" to make this more +# applicable to be upstreamed, even though this code is shared by all +# projects using Herobrine-NPCX9 baseboard. +config BOARD_HEROBRINE_NPCX9 + bool "Google Herobrine-NPCX9 Baseboard" + depends on SOC_NPCX9M3F + # NPCX doesn't actually have enough ram for coverage, but this will + # allow generating initial 0 line coverage. + select HAS_COVERAGE_SUPPORT diff --git a/zephyr/boards/arm/herobrine_npcx9/Kconfig.defconfig b/zephyr/boards/arm/herobrine_npcx9/Kconfig.defconfig new file mode 100644 index 0000000000..65f3225d91 --- /dev/null +++ b/zephyr/boards/arm/herobrine_npcx9/Kconfig.defconfig @@ -0,0 +1,10 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +if BOARD_HEROBRINE_NPCX9 + +config BOARD + default "herobrine_npcx9" + +endif # BOARD_HEROBRINE_NPCX9 diff --git a/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9.dts b/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9.dts new file mode 100644 index 0000000000..deb902c97f --- /dev/null +++ b/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9.dts @@ -0,0 +1,247 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/dts-v1/; + +#include <cros/nuvoton/npcx9.dtsi> +#include <dt-bindings/adc/adc.h> +#include <dt-bindings/gpio_defines.h> +#include <dt-bindings/wake_mask_event_defines.h> +#include <nuvoton/npcx9m3f.dtsi> + +/ { + model = "Google Herobrine-NPCX9 Baseboard"; + + aliases { + i2c-0 = &i2c0_0; + i2c-1 = &i2c1_0; + i2c-2 = &i2c2_0; + i2c-3 = &i2c3_0; + i2c-5 = &i2c5_0; + i2c-7 = &i2c7_0; + }; + + chosen { + zephyr,sram = &sram0; + zephyr,console = &uart1; + zephyr,shell-uart = &uart1; + zephyr,flash = &flash0; + cros,rtc = &mtc; + }; + + ec-console { + compatible = "ec-console"; + + disabled = "hostcmd"; + }; + + ec-mkbp-host-event-wakeup-mask { + compatible = "ec-wake-mask-event"; + wakeup-mask = <(HOST_EVENT_LID_OPEN | \ + HOST_EVENT_POWER_BUTTON | \ + HOST_EVENT_AC_CONNECTED | \ + HOST_EVENT_AC_DISCONNECTED | \ + HOST_EVENT_HANG_DETECT | \ + HOST_EVENT_RTC | \ + HOST_EVENT_MODE_CHANGE | \ + HOST_EVENT_DEVICE)>; + }; + + ec-mkbp-event-wakeup-mask { + compatible = "ec-wake-mask-event"; + wakeup-mask = <(MKBP_EVENT_KEY_MATRIX | \ + MKBP_EVENT_HOST_EVENT | \ + MKBP_EVENT_SENSOR_FIFO)>; + }; + + named-i2c-ports { + compatible = "named-i2c-ports"; + + power { + i2c-port = <&i2c0_0>; + enum-name = "I2C_PORT_POWER"; + label = "POWER"; + }; + battery { + i2c-port = <&i2c0_0>; + remote-port = <0>; + enum-name = "I2C_PORT_BATTERY"; + label = "BATTERY"; + }; + virtual { + i2c-port = <&i2c0_0>; + enum-name = "I2C_PORT_VIRTUAL"; + label = "VIRTUAL"; + }; + charger { + i2c-port = <&i2c0_0>; + enum-name = "I2C_PORT_CHARGER"; + label = "CHARGER"; + }; + tcpc0 { + i2c-port = <&i2c1_0>; + enum-name = "I2C_PORT_TCPC0"; + label = "TCPC0"; + }; + tcpc1 { + i2c-port = <&i2c2_0>; + enum-name = "I2C_PORT_TCPC1"; + label = "TCPC1"; + }; + eeprom { + i2c-port = <&i2c5_0>; + enum-name = "I2C_PORT_EEPROM"; + label = "EEPROM"; + }; + i2c_sensor: sensor { + i2c-port = <&i2c7_0>; + enum-name = "I2C_PORT_SENSOR"; + label = "SENSOR"; + }; + accel { + i2c-port = <&i2c7_0>; + enum-name = "I2C_PORT_ACCEL"; + label = "ACCEL"; + }; + }; + + named-pwms { + compatible = "named-pwms"; + + kblight { + pwms = <&pwm3 0 0>; + label = "KBLIGHT"; + frequency = <10000>; + }; + displight { + pwms = <&pwm5 0 0>; + label = "DISPLIGHT"; + frequency = <4800>; + }; + }; + + named-adc-channels { + compatible = "named-adc-channels"; + + vbus { + label = "ADC_VBUS"; + enum-name = "ADC_VBUS"; + channel = <1>; + /* Measure VBUS through a 1/10 voltage divider */ + mul = <10>; + }; + amon_bmon { + label = "ADC_AMON_BMON"; + enum-name = "ADC_AMON_BMON"; + channel = <2>; + /* + * Adapter current output or battery charging/ + * discharging current (uV) 18x amplification on + * charger side. + */ + mul = <1000>; + div = <18>; + }; + psys { + label = "ADC_PSYS"; + enum-name = "ADC_PSYS"; + channel = <3>; + /* + * ISL9238 PSYS output is 1.44 uA/W over 5.6K resistor, + * to read 0.8V @ 99 W, i.e. 124000 uW/mV. + */ + mul = <124000>; + }; + }; + + def-lvol-io-list { + compatible = "nuvoton,npcx-lvolctrl-def"; + + /* I2C_SDA0 & SCL0 */ + lvol-io-pads = <&lvol_iob4 &lvol_iob5>; + }; +}; + +&uart1 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&altj_cr_sin1_sl2 &altj_cr_sout1_sl2>; +}; + +&i2c0_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_STANDARD>; + + isl9238: isl9238@9 { + compatible = "intersil,isl9238"; + reg = <0x09>; + label = "ISL9238_CHARGER"; + }; +}; + +&i2c1_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; +}; + +&i2c2_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; +}; + +&i2c3_0 { + /* Not used as no WLC connected */ + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&i2c5_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&i2c7_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +/* Keyboard backlight */ +&pwm3 { + status = "okay"; +}; + +/* Display backlight */ +&pwm5 { + status = "okay"; +}; + +&adc0 { + status = "okay"; +}; + +&cros_kb_raw { + status = "okay"; + /* No KSO2 (it's inverted and implemented by GPIO) */ + pinctrl-0 = <&alt7_no_ksi0_sl + &alt7_no_ksi1_sl + &alt7_no_ksi2_sl + &alt7_no_ksi3_sl + &alt7_no_ksi4_sl + &alt7_no_ksi5_sl + &alt7_no_ksi6_sl + &alt7_no_ksi7_sl + &alt8_no_kso00_sl + &alt8_no_kso01_sl + &alt8_no_kso03_sl + &alt8_no_kso04_sl + &alt8_no_kso05_sl + &alt8_no_kso06_sl + &alt8_no_kso07_sl + &alt9_no_kso08_sl + &alt9_no_kso09_sl + &alt9_no_kso10_sl + &alt9_no_kso11_sl + &alt9_no_kso12_sl + >; +}; diff --git a/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9_defconfig b/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9_defconfig new file mode 100644 index 0000000000..43efac9786 --- /dev/null +++ b/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9_defconfig @@ -0,0 +1,36 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Zephyr Kernel Configuration +CONFIG_SOC_SERIES_NPCX9=y +CONFIG_SOC_NPCX9M3F=y + +# Platform Configuration +CONFIG_BOARD_HEROBRINE_NPCX9=y + +# Serial Drivers +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Pinmux Driver +CONFIG_PINMUX=y + +# GPIO Controller +CONFIG_GPIO=y + +# Clock configuration +CONFIG_CLOCK_CONTROL=y + +# WATCHDOG configuration +CONFIG_WATCHDOG=y + +# Power Management +CONFIG_SOC_POWER_MANAGEMENT=y +CONFIG_PM_POLICY_APP=y +CONFIG_UART_CONSOLE_INPUT_EXPIRED=y +CONFIG_SOC_POWER_MANAGEMENT_TRACE=y |