diff options
Diffstat (limited to 'zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts')
-rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts | 47 |
1 files changed, 31 insertions, 16 deletions
diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts index 234acb3447..b120f6c05e 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,25 +21,40 @@ flags = <GPIO_INT_EDGE_BOTH>; handler = "extpower_interrupt"; }; - int_slp_s0: slp_s0 { - irq-pin = <&pch_slp_s0_n>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_rsmrst_pwrgd: rsmrst_pwrgd { - irq-pin = <&rsmrst_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_all_sys_pwrgd: all_sys_pwrgd { - irq-pin = <&all_sys_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; int_ioex_kbd_intr_n: ioex_kbd_intr_n { irq-pin = <&ioex_kbd_intr_n>; flags = <GPIO_INT_EDGE_FALLING>; handler = "io_expander_it8801_interrupt"; }; + int_usb_c0_c1_tcpc: usb_c0_tcpc { + irq-pin = <&usbc_tcpc_alrt_p0>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "tcpc_alert_event"; + }; + int_usb_c0_ppc: usb_c0_ppc { + irq-pin = <&usbc_tcpc_ppc_alrt_p0>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "ppc_interrupt"; + }; + int_usb_c1_ppc: usb_c1_ppc { + irq-pin = <&usbc_tcpc_ppc_alrt_p1>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "ppc_interrupt"; + }; + int_usb_c2_tcpc: usb_c2_tcpc { + irq-pin = <&usbc_tcpc_alrt_p2>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "tcpc_alert_event"; + }; + int_usb_c3_tcpc: usb_c3_tcpc { + irq-pin = <&usbc_tcpc_alrt_p3>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "tcpc_alert_event"; + }; + int_ccd_mode: ccd_mode { + irq-pin = <&ccd_mode_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "board_connect_c0_sbu"; + }; }; }; |