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-rw-r--r--zephyr/shim/core/CMakeLists.txt7
-rw-r--r--zephyr/shim/core/cortex-m/CMakeLists.txt5
-rw-r--r--zephyr/shim/core/cortex-m/software_panic.c28
3 files changed, 40 insertions, 0 deletions
diff --git a/zephyr/shim/core/CMakeLists.txt b/zephyr/shim/core/CMakeLists.txt
new file mode 100644
index 0000000000..e1b13f21f4
--- /dev/null
+++ b/zephyr/shim/core/CMakeLists.txt
@@ -0,0 +1,7 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+if (DEFINED CONFIG_CPU_CORTEX_M)
+ add_subdirectory(cortex-m)
+endif()
diff --git a/zephyr/shim/core/cortex-m/CMakeLists.txt b/zephyr/shim/core/cortex-m/CMakeLists.txt
new file mode 100644
index 0000000000..9dc2defce4
--- /dev/null
+++ b/zephyr/shim/core/cortex-m/CMakeLists.txt
@@ -0,0 +1,5 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_SOFTWARE_PANIC software_panic.c)
diff --git a/zephyr/shim/core/cortex-m/software_panic.c b/zephyr/shim/core/cortex-m/software_panic.c
new file mode 100644
index 0000000000..6bedce5506
--- /dev/null
+++ b/zephyr/shim/core/cortex-m/software_panic.c
@@ -0,0 +1,28 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/*
+ * Content of this file are taken directly from
+ * platform/ec/core/cortex-m/panic.c. The code is replicated deliberately to
+ * allow future refactors into Zephyr specific APIs.
+ */
+
+#include "common.h"
+#include "panic.h"
+
+void software_panic(uint32_t reason, uint32_t info)
+{
+ /* TODO(b:180422087) Zephyrize this. */
+ __asm__("mov " STRINGIFY(SOFTWARE_PANIC_INFO_REG) ", %0\n"
+ "mov " STRINGIFY(SOFTWARE_PANIC_REASON_REG) ", %1\n"
+ "bl exception_panic\n"
+ : : "r"(info), "r"(reason));
+ __builtin_unreachable();
+}
+
+void arch_panic_set_reason(uint32_t reason, uint32_t info, uint8_t exception)
+{
+ /* No cortex-m architecture specific logic. */
+}