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* Clear OWNERS for factory/firmware branchfactory-1987.BBrian Norris2021-09-101-0/+1
| | | | | | | | | | | | BUG=none TEST=none Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3154573 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Owners-Override: Jora Jacobi <jora@google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* factory: Deep discharge protectionRong Chang2012-03-281-5/+72
| | | | | | | | | | | Cherry-picking for factory/1987-B. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=none TEST=none Change-Id: I20c641e8e5e83185a07d47059dc038dc5cc62071
* Set power adapter LED based on charge stateRong Chang2012-03-261-0/+14
| | | | | | | | | | | | | | Power adapter LED: GREEN = charge done YELLOW = charging RED = error Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:8536 TEST=manual Change-Id: I5580763a4136e1de7f5eae4e3dda8e169309d902
* Add battery SMI events and refactor charging stateRong Chang2012-03-263-215/+273
| | | | | | | | | | | | | | | | | This CL adds battery SMI events. And refactors the charging state machine by adding share state context for all handlers. Power events are moved to common handler. Minor clean up on console output messages. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:7526,7937,8450 TEST=manual: Watch console message when connecting/disconnecting AC adapter and battery. Check the state transition. Change-Id: I42eec4f87a9d49bd193cb9dde9080e3dfccbb77c
* use the full 256kB for partitionsVincent Palatin2012-03-222-8/+3
| | | | | | | | | | | Now Link has 256kB parts, we can restore the third partition and use 80kB partitions. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=on Link proto-1, try to use RO/A/B images (sysjump B, then boot). Change-Id: I9b7e4cae1504e86a62643db4d035cc9f3de0af52
* Clean up chip/board configs for LM4Randall Spangler2012-03-1612-24/+22
| | | | | | | | | | | Board-specific features like lightbar should be config'd at the board level, not at the chip level. BUG=none TEST=build link, bds, daisy Change-Id: If1df2ca0422f7b8bdc172d0df7bd9f6a1af6a9d2 Signed-off-by: Randall Spangler <rspangler@chromium.org>
* Add support for 1-wire protocol and power adapter LEDsRandall Spangler2012-03-169-3/+305
| | | | | | | | | BUG=chrome-os-partner:7498 TEST=powerled {off, red, yellow, green} Signed-off-by: Randall Spangler <rspangler@chromium.org> Change-Id: I48beaad94d75c0ec30a969ea4b0e35f54e052085
* Merge "Update test scripts"Gerrit2012-03-153-3/+3
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| * Update test scriptsVincent Palatin2012-03-153-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update test python scripts for recent trace modifications : - lack of firmware B - updated motd Update QEMU to deal gracefully with various new registers accesses. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=make qemu-tests Change-Id: I59a53822193b7377fe5f61f75c951b6cd24fc54b
* | Merge "Fix test build"Gerrit2012-03-153-1/+8
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| * Fix test buildVincent Palatin2012-03-153-1/+8
| | | | | | | | | | | | | | | | | | | | | | Allow to build without the power button task. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=make qemu-tests Change-Id: Ibc757a6641f195f0d10e6a673792b996694f8cec
* | Temperature sensor grouping.Vic Yang2012-03-1610-92/+94
| | | | | | | | | | | | | | | | | | | | | | | | Group temperature sensors into different types so we only have to set temperature threshold for each type instead of each sensor. Signed-off-by: Vic Yang <victoryang@google.com> BUG=chrome-os-partner:8466 TEST=Fan control still works. Change-Id: I7acc714c32f282cec490b9e02d402ab91a53becf
* | Merge "Prevent fan from keep turning on and off."Gerrit2012-03-151-1/+9
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| * Prevent fan from keep turning on and off.Vic Yang2012-03-161-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify thermal engine to treat temperature threshold as a 3-degree range instead of a certain value. This way the fan do not keep turning on and off, while the temperature floating around the threshold value. Signed-off-by: Vic Yang <victoryang@google.com> BUG=chrome-os-partner:8466 TEST=Set threshold to current temperature. The fan turns on and does not immediately turns off. Change-Id: Iad1de05a409dbbc573a8ffd0ece0dc7961b20806
* | Add wake signal to PCHRandall Spangler2012-03-1511-70/+158
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This works similar to SCI/SMI events, but triggers a separate level-sensitive signal to the PCH instead. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8514 TEST=manual From EC console: gpioget PCH_WAKEn --> should be 1 hostevent wake 0x1 close lid switch (with magnet) hostevent -> should show wake mask 0x1, raw events 0x1 gpioget PCH_WAKEn --> should be 0 hostevent clear 0x1 hostevent -> should show raw events 0 gpioget PCH_WAKEn --> should be 1 Change-Id: I29832c1dc30239a98987578f07dfeb25791dde11
* | Add ability to trigger both warm and cold resets.Randall Spangler2012-03-153-14/+48
|/ | | | | | | | | | | | | Keyboard reset now triggers a cold reset. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8397 TEST=power system on, then do 'x86reset cold' for a cold reset or 'x86reset warm' for a warm reset. Check x86 debug console to see that coreboot detects the warm (soft) reset. Change-Id: I00930d9f5df98365277cd5c7f2eb8f135c4e4398
* ensure the re-scheduling is not interruptedVincent Palatin2012-03-141-3/+2
| | | | | | | | | | | | | | The re-scheduling is protected by increasing our priority to -1, according to ARMv-M architecture manual, we need an ISB after setting the faultmask register to ensure that the new priority is visible. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8492 TEST=run on proto-0.5 and see that the temperature sensor and battery tasks are longer hanging (see the bug for details how to check it) Change-Id: Ia55859cf5c9101a09c61be7647a920126fc0a3b9
* mutex: retry immediatly if we could not get exclusive accessVincent Palatin2012-03-141-2/+5
| | | | | | | | | | | | | | | When updating the lock field of the mutex to acquire it, if the store exclusive fails, we want to retry immediatly else if the failure has been triggered by the other user doing the mutex_unlock we might not be woken up. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8492 TEST=run on proto-0.5 and see that the temperature sensor and battery tasks are longer hanging (see the bug for details how to check it) Change-Id: I0c8a4e997666a7781b3837f0dbbc47ffbc06b6c3
* Merge "Add comxtest debug command"Gerrit2012-03-141-8/+30
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| * Add comxtest debug commandRandall Spangler2012-03-131-8/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove dummy boot-time output to UART1; no longer needed now that there's a debug command to do the same thing. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=manual comxtest - prints default message to x86 UART comxtext ccc123 - prints 'ccc123' to x86 UART Change-Id: I37d37aeca06bf71b106f5ad3473a79780fd089a9
* | Merge "Add back LPC temperature read command as workaround."Gerrit2012-03-145-1/+112
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| * | Add back LPC temperature read command as workaround.Vic Yang2012-03-145-1/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until we solve the I2C hanging issue, we need a reliable way to read temperature. Add back LPC temperature read command that actually trigger a I2C read. Signed-off-by: Vic Yang <victoryang@google.com> BUG=chrome-os-partner:8452,chrome-os-partner:8495 TEST=none Change-Id: Icddd1fe3c1f09889bca633af19041a8aca582de9
* | | Merge "Debug command to simulate keystroke"Gerrit2012-03-141-0/+53
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| * | | Debug command to simulate keystrokeVic Yang2012-03-141-0/+53
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add debug command 'kbpress' to simulate keystroke. Signed-off-by: Vic Yang <victoryang@google.com> BUG=chrome-os-partner:8025 TEST='kbpress 3 7 1' pressed 'r' key. Change-Id: I80eef1e03f0f383e5472b4a7cc53c43ce6c15041
* | | Thermal Engine: set lowest fan speed to 4000rpmVic Yang2012-03-141-1/+7
|/ / | | | | | | | | | | | | | | | | | | | | | | Currently temperature polling task sometimes hangs. Until we solve this problem, fan should not be turned off according to temperature readings. Signed-off-by: Vic Yang <victoryang@google.com> BUG=chrome-os-partner:8479 TEST=none Change-Id: I3892c55dd18d3533515d5537b1a877e4fc36d631
* | Merge "Temp sensor report 0xfd on sensor unpowered."Gerrit2012-03-148-38/+69
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| * | Temp sensor report 0xfd on sensor unpowered.Vic Yang2012-03-148-38/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make temp sensor report 0xfd when sensor is unpowered. Also refactor power specification of temp sensors from thermal.c to temp_sensor.c. Signed-off-by: Vic Yang <victoryang@google.com> BUG=chrome-os-partner:8279 TEST=none Change-Id: Ib13813bdbac2f048fbc3b98fae5bbf104ebf37d7
* | | Add keyboard controller reset command.Louis Yung-Chieh Lo2012-03-141-0/+7
|/ / | | | | | | | | | | | | | | | | To handle outp(0x64, 0xfe) instruction from host. BUG=chrome-os-partner:8464,chrome-os-partner:8397 TEST= build on bds and l*. tested on proto 0.5. Change-Id: I8cb3a870b2a5c7a711dc911ba44e154813e9f123
* | Merge "Thermal Engine SMI"Gerrit2012-03-131-2/+6
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| * | Thermal Engine SMIVic Yang2012-03-131-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make thermal engine trigger SMI on overheating and sensor failure. Signed-off-by: Vic Yang <victoryang@google.com> BUG=chrome-os-partner:8249 TEST=none Change-Id: I1f8c1d05ae69fae4736c4cc92b060b1813007249
* | | Merge "Tidy output of temps command"Gerrit2012-03-131-3/+3
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| * | | Tidy output of temps commandRandall Spangler2012-03-131-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=temps - see, prettier! Change-Id: Ia11937e8b1be384f7b8386c97aea0eb3e2eef897
* | | | Merge "Add vboot_init() function in correct place, make it do the switching."Gerrit2012-03-132-1/+13
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| * | | Add vboot_init() function in correct place, make it do the switching.Bill Richardson2012-03-132-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Jumping (currently rebooting, see crosbug.com/p/8100) to the RW image should be done by vboot_init(), not vboot_pre_init(). As currently written, vboot_init() has to come AFTER these function calls: task_init(); // sets up interrupts so that uart will work watchdog_init(1100); // in case we fall over somewhere uart_init(); // we'd REALLY like to see some debugging output system_init(); // may go away with crosbug.com/p/8100 keyboard_scan_init(); // check for F3 to go to recovery mode flash_init(); // maybe set RO regions (this should come earlier!) eeprom_init(); // this is where the try_b flags are kept BUG=chrome-os-partner:7459 TEST=none Signed-off-by: Bill Richardson <wfrichar@chromium.org> Change-Id: I0ec3f6bcc26a308bb1005a944990963853b88b60
* | | | Remove unused temp_sensor.c fileRandall Spangler2012-03-131-202/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not compiled into any target; new version of temp_sensor.c is in common/ Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=build link and bds Change-Id: I00232a7cd8a8a9ee6353c5f04c86fcacc83cbd3e
* | | | Watch LPC0RESET line and print changesRandall Spangler2012-03-131-0/+10
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | For debugging PCH reset. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8397 TEST=power system on, then use x86reset to reset it. Should see line state changes printed. Change-Id: Ief2f09bd0986339812183d0b32dc0208437d1103
* | | Add x86 reset supportRandall Spangler2012-03-122-0/+25
|/ / | | | | | | | | | | | | | | | | | | | | (new method, and x86reset command to call it) Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8460 TEST=manual: powerbtn, wait for system to boot, x86reset Change-Id: Iad3f5c268b334e8d0ec1adfa2878f9e9d5927b9f
* | Use precision internal osciallator for UART and ADCRandall Spangler2012-03-124-8/+23
| | | | | | | | | | | | | | | | | | | | | | This simplifies upcoming transitions to/from sleep (with PLL shutdown). Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=manual - make sure 'adc' command and uarts still work Change-Id: I070ca2d96ba4fef6fef6519896e7e9a181866efc
* | GPIO changes for link proto1Randall Spangler2012-03-124-6/+25
|/ | | | | | | | | | | | | Note that this moves the charger to a different I2C port. If you're working on battery charging, you'll need to hack board.h in your local repo to move it back. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8458 TEST=manual Change-Id: Id94ee2ce1ef6c973c1786037e07d0c64a89a9940
* Support reboot_ec command in ectool (temporarily).Louis Yung-Chieh Lo2012-03-094-1/+84
| | | | | | | | | | | | | | | Note that this is a big security hole and should be removed after we complete the EC autoupdate mechanism and vboot code. To full update EC firmware on proto 1.0, we need a manual way to switch EC running on RO/RW. This CL implements the LPC command. BUG=chrome-os-partner:8415 TEST=on proto 0.5. ectool reboot_ec RW_A # EC boots to RW A ectool reboot_ec RO # EC boots to RO Change-Id: Ibf050328bc4e3d2c6d72bfc478d6334f11f0eb46
* Fan console commands should enable the fanRandall Spangler2012-03-081-2/+7
| | | | | | | | | | | | | | | And faninfo now checks if the fan is powered. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=manual 1) faninfo --> fan is initially disabled and powered off 3) gpioset enable_vs 1 --> fan is now powered on, but still disabled 2) fanset 8000 --> fan is now enabled, and you should hear it Change-Id: I97f35a20022cabd4520522f2d18ecb7603faabd1
* Update LPC mapped switch states with write protect and recovery statesRandall Spangler2012-03-076-8/+57
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8325 TEST=manual Boot system with lid open. 'ectool switches' should show lid open. Use 'dut-control goog_rec_mode:on'. 'ectool switches should show dedicated recovery signal on.' Use 'dut-control goog_rec_mode:off'. 'ectool switches should show dedicated recovery signal off.' Disable write protect via screw. 'ectool switches' should show WP signal disabled. Boot system in recovery mode (power+esc+reload). Should show 0x09. Change-Id: I0434427c4b5f8c07c02a8714618f7eb101b86fed
* Retabify ectool and add battery ectool commandRong Chang2012-03-071-40/+94
| | | | | | | | | | | | | util/ectool.c source contains mixed indentation. This change adds battery command and retabifies the whole file. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:8181 TEST=manual: Type command 'ectool battery' and check battery info. Change-Id: Id60a53b88b414524cc8735c9456bdf4e15a4400f
* Add battery lpc commandsRong Chang2012-03-074-3/+161
| | | | | | | | | | | | | | | | | | | | | | This CL adds LPC commands to provide the following information: - Design Capacity (dword) - Last Full Charge Capacity (dword) - Design Voltage (dword) - Design Capacity of Warning (dword) - Design Capacity of Low (dword) - Battery Type (ascii) - Model Number (ascii) - Serial Number (ascii) - OEM (usually Vendor) (ascii) - Battery charge cycle count (dword) Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:8181 TEST=none CQ-DEPEND:Iad4d63c996272568b5a661a6716790ef151b29c5 Change-Id: Iabaf7d9862e15c5b21cf5170cf43450e472b7836
* Add EC status bit definitionsVadim Bendebury2012-03-071-0/+9
| | | | | | | | | | | | | These bits are as per definition in "Chrome EC LPC Communication" document. BUG=chrome-os-partner:8351 TEST=manual . tested in concert with coreboot modifications introducing the EC command implementation Change-Id: I46d5795e06854e34584132c7fdb37e29150ce179 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
* stm32l: workaround missing mass erase featureVincent Palatin2012-03-061-10/+26
| | | | | | | | | | | | | The STM32L15xx monitor does not implement the mass erase, so we need to use the page erase feature and loop. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=on Discovery, fill the flash with a pattern, then erase, write a firmware image, read back the content of the flash, run the firmware. Change-Id: Icf0e9812a5d491fea78472a0203ddbbc3e813b2f
* Add a trap for tasks which exit their task functionsRandall Spangler2012-03-062-11/+21
| | | | | | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8350 TEST=manual Hack a task function to return. Then see that it prints an error to the debug console and the EC continues running, instead of seeing a hard-fault. Change-Id: Iacd2b83c4d4845bb8e6c61e07c3150df8edc7e49
* Clean up debug console outputRandall Spangler2012-03-065-28/+35
| | | | | | | | | | | | | Also prints the current timer value when inits are done, and when the watchdog task first gets to run (after all higher priority tasks sleep at least once). Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=none Change-Id: I342f86ad087fd18ab064a10a5bcdd0b69ee373d0
* Add smart battery functions read ascii infoRong Chang2012-03-062-0/+35
| | | | | | | | | | | | | | Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:8321 TEST=manual: type 'battery' in EC serial console, check following fields: Manufacturer Device name Device chemistry CQ-DEPEND:I0ad3ad45b796d9ec03d8fbc1d643aa6a92d6343f Change-Id: Iad4d63c996272568b5a661a6716790ef151b29c5
* Add I2C transmit/receive functionRong Chang2012-03-062-116/+176
| | | | | | | | | | | | | | | | | | | Implement a generalized I2C transmit-receive function that write-then-read blocks of raw data. Original 8-bit and 16-bit read/write functions are refactored. SMBus read-block protocol for ASCII string is also implemented based on this API. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:8026,8316 TEST=manual: Type 'lightsaber' to check 8-bit read/write. Type 'charger' to check 16-bit read. Type 'charger input 4032' to check 16-bit write. Change-Id: I0ad3ad45b796d9ec03d8fbc1d643aa6a92d6343f
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