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* Clear OWNERS for factory/firmware branchfactory-2338.BBrian Norris2021-09-101-0/+1
| | | | | | | | | | | | BUG=none TEST=none Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3154576 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Owners-Override: Jora Jacobi <jora@google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* CHERRY-PICK: EC: snow: keyboard: fix incorrect index calculation with empty fifoLuigi Semenzato2012-06-071-2/+2
| | | | | | | | | | | | | | | | | | | When kb_fifo_start is 0, the index calculation yields -1 because C got the mod (%) operation arguably wrong. By adding KB_FIFO_DEPTH to the index before computing the mod with respect to KB_FIFO_DEPTH, we avoid the negative case and (obviously) produce the same result in all other cases. BUG=chrome-os-partner:10247 TEST=saw incorrect state from kernel log before fix: could not repro after. Change-Id: I3a30c229dc9f762dd45203e842128811a24cf53f Signed-off-by: Luigi Semenzato <semenzato@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Luigi Semenzato <semenzato@google.com> (cherry picked from commit 20d730b322fde1a5785b493a99a3b702cef2f793) Reviewed-on: https://gerrit.chromium.org/gerrit/24757
* stm32: de-activate all flash accesses for pstateVincent Palatin2012-06-071-0/+6
| | | | | | | | | | | | | | | This feature is not implemented and accessing random flash addresses. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:10237 TEST=on Snow, run flashrom -p internal:bus=lpc --wp-status Change-Id: Idd2b6610f387e42deac97cdbdfefc7ea33c7e62d Reviewed-on: https://gerrit.chromium.org/gerrit/24726 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Send success code when rebooting EC using I2C host commandsDavid Hendricks2012-06-041-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This causes the reboot command to respond to the host via I2C with EC_RES_SUCCESS. Signed-off-by: David Hendricks <dhendrix@chromium.org> BUG=none TEST=tested on Snow and Link using ectool and flashrom Both machines were able to reboot the EC and go thru an EC update via Flashrom successfully: localhost ~ # ectool reboot_ec RO ; echo $? done. 0 Flashrom is also able to do a fully automatic update, without the user specifying a layout: Reading old contents from flash chip... done. Found 'RO_SECTION' in image. Found 'RW_SECTION_A' in image. GEC is jumping to [RO_SECTION] GEC has jumped to [RO_SECTION] Erasing and writing flash chip... ... GEC is jumping to [RW_SECTION_A] GEC has jumped to [RW_SECTION_A] GEC needs 2nd pass. ... Change-Id: Id723c26caa8f352a7ddc6ebfae664448c38300f0 Reviewed-on: https://gerrit.chromium.org/gerrit/24290 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/24344 Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Add system_is_locked() to prevent sysjump on consumer systemsRandall Spangler2012-06-047-57/+137
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This returns true when both HW and SW write protect are enabled. Once WP is enabled, sysjump will be locked out. system_is_locked() can be used to gate other dangerous-ish commands too. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7468 TEST=manual sysinfo -> unlocked, copy A sysjump B -> works flashwp lock reboot (make sure flashinfo shows WP asserted and flash locked; note there is a HW bug on proto1 which makes this flaky) sysinfo -> locked, copy A sysjump B -> fails (remove WP screw) reboot hard flashwp unlock Change-Id: I849b573675c2c1cb4c44b9a05d6973e38247ca23 Reviewed-on: https://gerrit.chromium.org/gerrit/24343 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Add EC command to report board versionVadim Bendebury2012-06-042-0/+19
| | | | | | | | | | | | | | | | | | | | | The main CPU might need to know the particular hardware version the system is running on. This information is available to the EC, this change adds a mechanism for the main CPU to request this information. The board version is defined as a flat 16 bit number. BUG=chrome-os-partner:8722 TEST=manual . this change was tested in concert with the appropriate coreboot modification, the proto1 board returns board version of 0. The code was modified manually to return a one off version - and the coreboot indeed observed board version of 1 Change-Id: If434d33f43783b18cb202ea15819bd5804694b8e Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/24342 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Detect recovery key combinationVincent Palatin2012-05-313-22/+79
| | | | | | | | | | | | | | | | Check if ESC+Power+Refresh is pressed at startup, if the recovery combination is detected, record it to allow U-Boot to go into recovery. The status of the keyboard recovery can be read from the response of the EC_CMD_MKBP_INFO command. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:9916 TEST=On Snow, do a recovery reset by pressing ESC+Refresh+Power and see the trace, try other resets and don't see it. Change-Id: I0e1a8214781a6e74bd90bf8313887a9dcf4df56d
* stm32: assert/de-assert GPIO_PMIC_PWRON_L with keyboard power eventDavid Hendricks2012-05-311-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This sets the PMIC_PWRON_L signal to correspond with the keyboard power button state. BUG=chrome-os-partner:9821 TEST=Tested on Lucas (see notes below) Signed-off-by: David Hendricks <dhendrix@chromium.org> 1. AC power plugged in, AP off, EC booted > gpioget PMIC_PWRON_L 1* PMIC_PWRON_L 2. AP running, press and release power button (should see screen zoom out and then back in, but I don't have a monitor...) 2a. AP running, power button not pressed > gpioget PMIC_PWRON_L 1 PMIC_PWRON_L 2b. Press power button > Waiting for long power press 280507864 > gpioget PMIC_PWRON_L 0* PMIC_PWRON_L 2c. release power button before 8s > Cancel power off > gpioget PMIC_PWRON_L 1* PMIC_PWRON_L 3. From AP off state, press and hold keyboard power button > gpioget PMIC_PWRON_L 0* PMIC_PWRON_L After 8s, we see: Timeout waiting for GPIO 0/KB_PWR_ON_L Power button was not released in time Shutdown complete. 4. AP on, press and hold keyboard power button > gpioget PMIC_PWRON_L 1 PMIC_PWRON_L > Waiting for long power press 654024769 > gpioget PMIC_PWRON_L 0* PMIC_PWRON_L > Power off after long press now=654025073, 0 ending loop 2 Shutdown complete. <-- Note: This message comes from power_off() which also de-asserts PMIC_PWRON_L > gpioget PMIC_PWRON_L 1* PMIC_PWRON_L Change-Id: I6955771707ecea2926570be0e8bd77ebddbca4d4 (cherry picked from commit b8eefd91c1f0b9c86c0b9d06daedec5c81ee8863)
* stm32: use level interrupt instead of edgeVincent Palatin2012-05-305-11/+11
| | | | | | | | | | | | | | | Using low level trigger interrupt rather than falling edge is more robust since we avoid detecting glitches or missing interrupts. This is backward compatible with the AP software expecting falling edge. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8869 TEST=On Daisy, check we can still enter text in U-Boot console and Chrome browser (and check interrupt count increase as expected). Change-Id: Ide2b27f9129173530d137b5d70d998ebd8f8e669
* stm32f: update flash write sizeDavid Hendricks2012-05-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | This CL updates the constant FLASH_WRITE_BYTES to 64 and modifies the decrement value in the flash_physical_write() loop. The constant value was changed so that it would agree with EC_FLASH_SIZE_MAX which is the size of the data payload. FLASH_WRITE_BYTES is provided as part of EC_CMD_FLASH_INFO, so programs which query size this way will can take advantage of 64-byte writes. The decrement value in the loop did not actually change in value, but instead uses the size of the half-word. Signed-off-by: David Hendricks <dhendrix@chromium.org> BUG=none TEST=Tested on Lucas Change-Id: If335bd8e11db0acc6464dcdef819d91f61ae0890 (cherry picked from commit ef7557b4fd1a6a889d9918b2811567af216ebaf3)
* stm32: fix keyboard FIFOVincent Palatin2012-05-302-13/+12
| | | | | | | | | | | | | | | When the FIFO is empty, returns the last read entry not the next one. also rewrite the FIFO index increment to generate slightly better code. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8869 TEST=On Snow, in U-Boot using "stdin=mkbp-keyb" type on internal keyboard and see the correct text. Change-Id: I189d230053de40dd563ce672db82dd6217e545e3 (cherry picked from commit 38bab6b9f1fc74d53960b62054792f7885fd994a)
* Add I2C host communicationVincent Palatin2012-05-302-0/+214
| | | | | | | | | | | | Allow to use EC tool on ARM based platforms. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=On Daisy, ectool version Change-Id: If7f52de827d0bcffb39af0553245cce4e02b9b48 (cherry picked from commit 2a5e284960543d40f1d61a9b085634b79e06cc21)
* Split communication functions from host toolsVincent Palatin2012-05-306-170/+155
| | | | | | | | | | | | Preparatory work to re-use the tools on ARM boards using I2C communications. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=make BOARD=link && make BOARD=bds && make BOard=DAISY Change-Id: I31d41f30c3231a4a9349b939bf6bba871ed4c383
* stm32: try to be more robust against malformed commandsVincent Palatin2012-05-231-6/+21
| | | | | | | | | | | Timeout properly when the AP doesn't want our bytes. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8865 TEST=On Snow, boot with an old kernel. Change-Id: Iac4fa5c3606f2e8731927326fad291dae26a615c
* stm32: ensure I2C properly behave after sysjumpVincent Palatin2012-05-231-0/+6
| | | | | | | | | | | | | Sometimes when requesting a sysjump from the AP, the I2C bus gets wedged. Ensure we restore it in a proper state during the driver initialization. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8865 TEST=On Snow, use flashrom to program the EC. Change-Id: I6279afba2bdeed4473ace42220a0342c4addaf1d
* snow: ensure we have proper size in the FMAPVincent Palatin2012-05-231-0/+4
| | | | | | | | | | | | | The size of the RW partition is size of RW-A + size of RW-B. When B is de-activated, we need to nullify its size to get the correct total size. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8865 TEST=On Snow, flashrom -p internal:bus=lpc -i EC_RW -w ec.bin Change-Id: Id015af512f072efce5fcafc5a630845c5d9600bb
* do not advertise RW-B in FMAP if it doesn't existVincent Palatin2012-05-231-0/+2
| | | | | | | | | | | | | The Snow board has currently the second RW partition de-activated due to flash space constraints, we don't want to send false information to the tools. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8865 TEST=on Snow, flashrom -p internal:bus=lpc -i EC_RW -w ec.bin Change-Id: I6da60028aa69aeb476d5c2d98df5a03ece961891
* stm32: fix sysjump on stm32f100Vincent Palatin2012-05-231-2/+2
| | | | | | | | | | | | | | The warm boot condition was badly detected since we are tweaking the GPIO enables in board.c. The timer enable (TIM2) is a more reliable condition. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8865 TEST=on Snow, boot Linux then type "sysjump A" in the EC console and see that AP & Linux are still alive. Change-Id: If375aa320c140360d313241b5d9219ffa8bcecd7
* Add support for printing fixed-point numbersRandall Spangler2012-05-235-17/+41
| | | | | | | | | | | | This makes timestamps much easier to read. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:9866 TEST=timerinfo, taskinfo, battery commands have fixed-point numbers, and timestamps printed in the log look right. Change-Id: If91c83f725984c8e04bfb7cdcff316d9c3bfe24c
* stm32mon: complete support for stm32f100Vincent Palatin2012-05-231-4/+42
| | | | | | | | | | | | - add the simple erase command - fix the flash size Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=./build/snow/util/stm32mon -d /dev/pts/10 -w ec.bin Change-Id: I9bdb0cf06759a04bd2bbef24d559eb67e4c0aa00
* Add FMAP even if VBOOT is not activatedv1.0.0Vincent Palatin2012-05-228-10/+26
| | | | | | | | | | | This simplifies the re-flashing for stm32 based platforms. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8865 TEST=On Daisy, flashrom -p internal:bus=lpc -w ec.bin Change-Id: I66860383c34110b1edf852929c244a2b682bc105
* Fix regression on linking addressVincent Palatin2012-05-222-2/+2
| | | | | | | | | | | | | On platform where the flash base address is non null (e.g. stm32), we need to take it into account. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=On Daisy, type "sysjump A" and "version" into the EC console and observe that the commands succeed. Change-Id: I95596d45f6970259d19d7063f6794fae0c400ab7
* Merge "Disable touchscreen when lid is closed and in S3"Gerrit2012-05-227-20/+64
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| * Disable touchscreen when lid is closed and in S3Randall Spangler2012-05-217-20/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (Touchscreen was already disabled in S5) Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:9736 TEST=from console, 'gpioget touchscreen_resetn' in these cases: 1) system is off -> 0 2) system is on with lid open -> 1 3) system is on with lid closed -> 1 4) system is suspended with lid open -> 1 5) system is suspended with lid closed -> 1 6) system is shut back down -> 0 7) suspend system with lid open, THEN close lid -> 0 Change-Id: I5fc80b72ea9dcfbf11f5280d79ae805c2ef1b6df
* | Turn on light bar subtly for factoryBill Richardson2012-05-211-70/+30
|/ | | | | | | | | | BUG=chrome-os-partner:9850 TEST=manual Open the lid. The lightbar should turn on. Change-Id: I14d1316e6b0cac7a7e2f5b08b7d14b6bbdfa5830 Signed-off-by: Bill Richardson <wfrichar@chromium.org>
* Merge "Even more debug command cleanup to save space"Gerrit2012-05-2110-314/+179
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| * Even more debug command cleanup to save spaceRandall Spangler2012-05-2110-314/+179
| | | | | | | | | | | | | | | | BUG=none TEST=(run the commands) Change-Id: Ibc414ffd594e06dbdce64c51859b6f247bb10d36 Signed-off-by: Randall Spangler <rspangler@chromium.org>
* | Clean up linker scripts; detect out-of-flash problem.Bill Richardson2012-05-219-86/+192
|/ | | | | | | | | | | | | | | | | | | | | | | | The VMA of the .data segment is in RAM, but we actually put it into FLASH. The linker doesn't notice if it runs out of flash, so it creates an invalid image. This adds an explicit check to be sure it all fits. It also refactors the region declarations to be more explicit. For vboot-enabled configurations, CONFIG_SECTION_* - describes the extent of flash for one entire image CONFIG_FW_* - the region within the SECTION for the firmware only CONFIG_VBLOCK_* - the region within the RW SECTIONs for the vblocks CONFIG_VBOOT_ROOTKEY - the region within the RO SECTION for the root key Look at chip/lm4/config.h for the best example. BUG=chrome-os-partner:9839 TEST=manual Build it, run it. Change-Id: I3c652e82d58a5328115cc750c80ecba6a3fd99a3 Signed-off-by: Bill Richardson <wfrichar@chromium.org>
* stm32: de-activate write protect feature until it is validatedVincent Palatin2012-05-212-0/+4
| | | | | | | | | | | | Don't do anything on write protect until we have properly verify the current implementation to avoid bricking Daisy and Snow boards. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8865 chrome-os-partner:9849 TEST=None Change-Id: I599a2a733b7304dc17286fae6fd7807fd8f6981c
* stm32: add flash driver for stm32f100 SoCVincent Palatin2012-05-212-0/+262
| | | | | | | | | | | | Implementation of the flash driver for the stm32f100 chip used on Snow board. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8865 TEST=On Snow board, use "flashwrite/flasherase" commands from EC console and verify result with "rw" command. Change-Id: Ie8b8be3d549ff9ec8c3036d5f4a97480daa5e03e
* Merge "More debug command cleanup to save space"Gerrit2012-05-218-186/+111
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| * More debug command cleanup to save spaceRandall Spangler2012-05-218-186/+111
| | | | | | | | | | | | | | | | | | | | (saves another 1.5KB) BUG=none TEST=(run the commands) Change-Id: Id3ca58528fa68a4cec606edf2b98b9af38ac228f Signed-off-by: Randall Spangler <rspangler@chromium.org>
* | Add host command to read temperature sensor infoVic Yang2012-05-224-1/+85
|/ | | | | | | | | | | In order to perform testing across all future boards and enable easier debugging, we need a host command to read temperature sensor name and sensor type. BUG=chrome-os-patner:9836 TEST='ectool tempsinfo 0' shows sensor name and its type. Change-Id: I06d9c6b045902394179c35e2ee8bc8dc551e8e98
* Clean up debug commands to use less spaceRandall Spangler2012-05-218-138/+79
| | | | | | | | BUG=none TEST=(run the commands) Change-Id: I6ed4aee169311825190bcc386b86cdc32ba0866a Signed-off-by: Randall Spangler <rspangler@chromium.org>
* Add LM4 support for hard resetRandall Spangler2012-05-215-70/+62
| | | | | | | | | | | | (And add STM32 support for disabling interrupts before reset, which got missed before.) Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7470 TEST=from console, "reboot", then "reboot hard" Change-Id: Ib98792abc0c91a01e2230b419fc876052380655a
* Merge "Fix a bug that 'ectool thermalget' silently fails"Gerrit2012-05-212-5/+10
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| * Fix a bug that 'ectool thermalget' silently failsVic Yang2012-05-212-5/+10
| | | | | | | | | | | | | | | | | | | | 'ectool thermalget' should return error if sensor ID or threshold ID is out of range. This CL fixes a bug that error codes mismatch. BUG=chrome-os-partner:9840 TEST='ectool thermalget 0 10' gives error. Change-Id: I74d0c66044cd31743c4fac0a8dc0431db6259e71
* | Merge "Workaround 64-byte limitation on flash write host packet"Gerrit2012-05-211-0/+36
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| * | Workaround 64-byte limitation on flash write host packetVincent Palatin2012-05-181-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The stm32 needs to flash half a page (ie 128 bytes), the current communication protocol is limited to a 64-byte payload for flash write message. The workaround buffers the first 64 bytes to be able to flash a full 128-byte half page. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8865 TEST=on Daisy, run flashrom -p internal:bus=lpc -w ec.bin Change-Id: I8036e66d2aa456b3409f4f8c74daa3755e7c9a51
* | | Merge "Use common host command processing for Daisy I2C"Gerrit2012-05-2113-275/+121
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| * Use common host command processing for Daisy I2CVincent Palatin2012-05-1813-275/+121
| | | | | | | | | | | | | | | | | | | | | | | | This also updates the communication protocol between the EC and the AP in a non backward compatible way. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:9614 TEST=on Daisy with updated kernel driver, use the keyboard in ChromeOS Change-Id: I5a50e9a74b9891153a37ea79318c8a66a1b0c5ca
* | Fix flash base in full image ELFVincent Palatin2012-05-191-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the flash base address is non null (e.g. stm32), it's nice to have the full ELF image (including the 3 copies) at the right address. This doesn't change anything to the final .bin image but allow to load directly the .obj with tools which handle ELF format. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=Flash ec.obj on a Snow board using the ST-Link JTAG over GDB. Change-Id: I51a6d9c00b359c6204bd51b30ee7a4fec362d88e
* | Merge "stm32: keep power across sysjump"Gerrit2012-05-183-10/+35
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| * | stm32: keep power across sysjumpVincent Palatin2012-05-183-10/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure we can jump between EC images without powering down the GAIA AP : - preserve GPIO state - go back to "power-on" state if needed in GAIA state machine. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8865 TEST=On Daisy, boot Linux, then type "sysjump B" and observed we can still interact with Linux without any AP reboot. Change-Id: Ia2bd0f65ea348813b120bcc3a3f3bdfa96a9877a
* | | Merge "Refactor power button state machine"Gerrit2012-05-181-185/+299
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| * | Refactor power button state machineRandall Spangler2012-05-181-185/+299
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simulation now simulates the physical signal, so uses the power state machine. Power state machine now doesn't send a spurious press/release event if the power button signal glitches and returns to its previous state. Properly handles powering back on when waking from hibernate, if the lid is open. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:9817 TEST=manual: All of the following should power on the system: 1) at debug console, powerbtn 2) press power button 3) lid open 4) press power+esc+refresh 5) hibernate 10, then press power button 6) hibernate 10, then open lid These should leave the system off: 1) press power+esc 2) hibernate 10, then let it wake up on its own Hold down the power button to power on the system, and keep holding it down; system should shut back down after 8 sec. Hold down power+esc+refresh, and keep holding it down; system should boot and NOT shut down after 8 sec. Change-Id: I2dde951fe67544b6a24c607f0c4ba415ccd2f82f
* | Fix partition address when flash base is not zeroVincent Palatin2012-05-181-3/+3
|/ | | | | | | | | | | | | On chips where CONFIG_FLASH_BASE is not 0 (e.g. stm32), the reset vector address check in system_run_image_copy would fail because we are comparing an absolute address against a flash offset. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8865 TEST=on Daisy, type "sysjump B" in EC console. Change-Id: Ib79677fb926a37fcf32f4aac013dc36b086f4464
* Add a tiny bit of debugging output.Bill Richardson2012-05-181-2/+5
| | | | | | | | BUG=none TEST=none Change-Id: Ic20efadaf4c1e9e5e98734ccaa60050c0f04a906 Signed-off-by: Bill Richardson <wfrichar@chromium.org>
* Merge "Preserve USB port state when jumping"Gerrit2012-05-171-3/+38
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| * Preserve USB port state when jumpingVic Yang2012-05-171-3/+38
| | | | | | | | | | | | | | | | | | | | USB ports are disabled after jumping between firmware copies. We need to record USB port state and restore them after jumping. BUG=chrome-os-partner:9692 TEST=Manual Change-Id: Ic5cb83bdd8e49017457f732d317a1b59ced59ead
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