| Commit message (Collapse) | Author | Age | Files | Lines |
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BUG=none
TEST=none
Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3154578
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Owners-Override: Jora Jacobi <jora@google.com>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
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This changes CONFIG_FLASH_SIZE so that a 128KB image is produced.
BUG=chrome-os-partner:10377
TEST=Tested on Snow with 128KB EC flash
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: I9c8f9cc8991f60f0cacf5ca42f1bdab96093c59e
Original-Change-Id: Ib9dd65839304a55d586648046bdd7f96b02c2688
Original-Reviewed-on: https://gerrit.chromium.org/gerrit/24130
Original-Reviewed-by: Katie Roberts-Hoffman <katierh@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25986
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: Katie Roberts-Hoffman <katierh@chromium.org>
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BUG=None
TEST=BOARD=snow make, verify on snow board
Change-Id: Id9ec58f45620193cd781eed76745b9fd20a5fc91
Reviewed-on: https://gerrit.chromium.org/gerrit/25985
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Katie Roberts-Hoffman <katierh@chromium.org>
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This feature is not implemented and accessing random flash addresses.
BUG=chrome-os-partner:10237
TEST=on Snow, run flashrom -p internal:bus=lpc --wp-status
Change-Id: Idd2b6610f387e42deac97cdbdfefc7ea33c7e62d
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit d5679c9adc651870b7401b20d46ff685797bdde3)
Reviewed-on: https://gerrit.chromium.org/gerrit/24781
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When kb_fifo_start is 0, the index calculation yields -1 because C got
the mod (%) operation arguably wrong. By adding KB_FIFO_DEPTH to the
index before computing the mod with respect to KB_FIFO_DEPTH, we avoid
the negative case and (obviously) produce the same result in all other
cases.
BUG=chrome-os-partner:10247
TEST=saw incorrect state from kernel log before fix: could not repro after.
Change-Id: I3a30c229dc9f762dd45203e842128811a24cf53f
Signed-off-by: Luigi Semenzato <semenzato@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Luigi Semenzato <semenzato@google.com>
(cherry picked from commit 20d730b322fde1a5785b493a99a3b702cef2f793)
Reviewed-on: https://gerrit.chromium.org/gerrit/24745
Reviewed-by: Luigi Semenzato <semenzato@google.com>
Reviewed-by: Katie Roberts-Hoffman <katierh@chromium.org>
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Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:10132
TEST=manual
Connect uart console to Daisy, boot and remove the battery.
The I2C debug trace should not show up by default.
Change-Id: I911923138cb233cf2897983997c4a4764a62981b
Reviewed-on: https://gerrit.chromium.org/gerrit/24363
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
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This causes the reboot command to respond to the host via I2C with
EC_RES_SUCCESS.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=none
TEST=tested on Snow and Link using ectool and flashrom
Both machines were able to reboot the EC and go thru an EC update via
Flashrom successfully:
localhost ~ # ectool reboot_ec RO ; echo $?
done.
0
Flashrom is also able to do a fully automatic update, without the
user specifying a layout:
Reading old contents from flash chip... done.
Found 'RO_SECTION' in image.
Found 'RW_SECTION_A' in image.
GEC is jumping to [RO_SECTION]
GEC has jumped to [RO_SECTION]
Erasing and writing flash chip...
...
GEC is jumping to [RW_SECTION_A]
GEC has jumped to [RW_SECTION_A]
GEC needs 2nd pass.
...
Change-Id: Id723c26caa8f352a7ddc6ebfae664448c38300f0
Reviewed-on: https://gerrit.chromium.org/gerrit/24290
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Commit-Ready: David Hendricks <dhendrix@chromium.org>
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- throw away all the incoming garbage after a NACK to be protect against
unexpected behavior on the embedded monitor.
- increase the command timeout :
on STM32F100, I have measured up to 1.4s to execute the erase 64kB
command. With the current 2s timeout, it was failing when you are
unlucky (since it's using a integer second timestamp to measure the
timeout).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=with a Snow, flash the board using stm32mon -w ec.bin
from various states.
Change-Id: I260b3b1311eac9be7c43f835eeac68051befd24a
Reviewed-on: https://gerrit.chromium.org/gerrit/24314
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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We need to be able to toggle these signals to increase test coverage.
BUG=chrome-os-partner:9967
TEST=Toggle 'ectool wireless' and see GPIO signal changes.
'ectool backlight 0' and see LCD backlight turn off.
Change-Id: Ic96fe26aa82c33b0e51e1f973280a0edc322f158
Reviewed-on: https://gerrit.chromium.org/gerrit/23625
Commit-Ready: Vic Yang <victoryang@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
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This produces a host binary running on the application processor and
which is able to re-flash th EC firmware over the AP-to-EC link (either
LPC or I2C).
The payload (ie the EC firmware) to use is embedded inside the flasher
binary.
This is just aimed at testing and developer upgrade. The auto-update
flow is using flashrom.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=build for link/daisy/snow/bds and tests
On Snow, run burn_my_ec from the serial console and see that the EC was
correctly re-flashed.
Change-Id: I7f90e773678a7ef3d8dc6dbacf54e80f3294607b
Reviewed-on: https://gerrit.chromium.org/gerrit/24236
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
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Const- and static-ifying data and pointers.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=kblog on, then boot system, then kblog; should print log
Change-Id: I2e1da8e3d614b66dad8749b18c43bd77dc75928d
Reviewed-on: https://gerrit.chromium.org/gerrit/24233
Commit-Ready: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:10042
TEST=boot system, ctrl+alt+F2, type on console; shouldn't crash
Change-Id: I935bc141fbbc1e7d0d073f1754104808a24fe869
Reviewed-on: https://gerrit.chromium.org/gerrit/24232
Commit-Ready: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=none
TEST=none
Change-Id: I369522c00724c959d1eac18ca9c3ce57bd55aeff
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This is an initial commit of tps65090 pmu driver. An empty charging
task added.
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:9756
TEST=manual
When connected to a battery, the EC uart console will display
battery status on value change.
Check pmu register with 'i2c r 0x90 4'. Output should be '0x03'.
Change-Id: I99e243d203c438751af0c3647556cbf9a94e928f
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A polling mode I2C master driver. Interfaces for read/write byte
and word are implemented. i2c_read_string() is currently an empty
function.
CONFIG_SMART_BATTERY added to daisy board for testing.
Move smart_battery.o back to CONFIG_SMART_BATTERY since it is not
depended on charging state machine.
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:9724
TEST=manual/host commands
> battery
Temp: 0x0bad = 298.9 K (25.8 C)
Manuf:
Device:
Chem:
Serial: 0x0001
V: 0x1cb7 = 7351 mV
V-desired: 0x20d0 = 8400 mV
V-design: 0x1c20 = 7200 mV
I: 0x0000 = 0 mA
I-desired: 0x0bb8 = 3000 mA
Mode: 0x6001
Charge: 49 %
Abs: 47 %
Remaining: 2705 mAh
Cap-full: 5575 mAh
Design: 5800 mAh
Time-full: 0h:0
Empty: 0h:0
Change-Id: I9f4e9e8819955ad1b107fb3b70ac2559d9b02b55
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Check if ESC+Power+Refresh is pressed at startup, if the recovery
combination is detected, record it to allow U-Boot to go into recovery.
The status of the keyboard recovery can be read from the response of the
EC_CMD_MKBP_INFO command.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:9916
TEST=On Snow, do a recovery reset by pressing ESC+Refresh+Power and see
the trace, try other resets and don't see it.
Change-Id: I0e1a8214781a6e74bd90bf8313887a9dcf4df56d
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This sets the PMIC_PWRON_L signal to correspond with the keyboard
power button state.
BUG=chrome-os-partner:9821
TEST=Tested on Lucas (see notes below)
Signed-off-by: David Hendricks <dhendrix@chromium.org>
1. AC power plugged in, AP off, EC booted
> gpioget PMIC_PWRON_L
1* PMIC_PWRON_L
2. AP running, press and release power button (should see screen zoom
out and then back in, but I don't have a monitor...)
2a. AP running, power button not pressed
> gpioget PMIC_PWRON_L
1 PMIC_PWRON_L
2b. Press power button
> Waiting for long power press 280507864
> gpioget PMIC_PWRON_L
0* PMIC_PWRON_L
2c. release power button before 8s
> Cancel power off
> gpioget PMIC_PWRON_L
1* PMIC_PWRON_L
3. From AP off state, press and hold keyboard power button
> gpioget PMIC_PWRON_L
0* PMIC_PWRON_L
After 8s, we see:
Timeout waiting for GPIO 0/KB_PWR_ON_L
Power button was not released in time
Shutdown complete.
4. AP on, press and hold keyboard power button
> gpioget PMIC_PWRON_L
1 PMIC_PWRON_L
> Waiting for long power press 654024769
> gpioget PMIC_PWRON_L
0* PMIC_PWRON_L
> Power off after long press now=654025073, 0
ending loop 2
Shutdown complete. <-- Note: This message comes from power_off() which
also de-asserts PMIC_PWRON_L
> gpioget PMIC_PWRON_L
1* PMIC_PWRON_L
Change-Id: I6955771707ecea2926570be0e8bd77ebddbca4d4
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Using low level trigger interrupt rather than falling edge is more
robust since we avoid detecting glitches or missing interrupts.
This is backward compatible with the AP software expecting falling edge.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:8869
TEST=On Daisy, check we can still enter text in U-Boot console and
Chrome browser (and check interrupt count increase as expected).
Change-Id: Ide2b27f9129173530d137b5d70d998ebd8f8e669
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This adds SPI transaction support, and a debug command to read a few
values from the SPI EEPROM.
Note that the SPI controller is normally *disabled* with all its I/Os
high-Z, so this will not interfere with main processor or Servo on the
SPI bus. The bus is only enabled during the SPIROM command itself.
BUG=chrome-os-partner:7844
TEST=manual
1) Reboot system
2) on EC console, 'spirom'. Should print
Man/Dev ID : 0xef 0x16
JEDEC ID : 0xef 0x40 0x17
Unique ID : 0xd1 0x61 0x44 0xb0 0x63 0x5d 0x40 0x32
Status reg 1: 0x00
Status reg 2: 0x00
Note that unique ID is, well, unique, so it won't match my value. But
it should still be something not all 0xff's.
3) Power on the system. x86 should still boot normally, indicating
that the EC isn't interfering with the SPI bus.
Change-Id: I53bf5fdbbe7a37949375d0463e30e408cc6fb6a8
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This CL updates the constant FLASH_WRITE_BYTES to 64 and modifies the
decrement value in the flash_physical_write() loop.
The constant value was changed so that it would agree with
EC_FLASH_SIZE_MAX which is the size of the data payload.
FLASH_WRITE_BYTES is provided as part of EC_CMD_FLASH_INFO, so
programs which query size this way will can take advantage of 64-byte
writes.
The decrement value in the loop did not actually change in value, but
instead uses the size of the half-word.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=none
TEST=Tested on Lucas
Change-Id: If335bd8e11db0acc6464dcdef819d91f61ae0890
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*.dis files can always be generated by *.elf files, so we can remove it from
default build targets, and only generate that on demand (make dis).
This also speeds up building time from 6.637s to 4.9s.
BUG=chromium-os:31379
TEST=emerge-link chromeos-ec
make # no *.dis
make dis # get *.dis
Change-Id: Ibc5305501ae72a0733f401863ea1d4c1f17aa34f
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
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The udelay() has big overhead so that repeating calling leads big errors
(expect 1 sec of timeout, but actually 12 secs of timeout).
So, the improvement is to double the udelay count when BUSY bit is set.
Even better, if we can check the I/O port content before really running
the EC command, it can save more time.
BUG=chrome-os-partner:10003
TEST=tested on link, alex, zgb, lumpy, stumpy and mario.
Only mario takes 1 second to timeout.
Others stop when checking ports (takes around 0.01 second).
Change-Id: I96c6d8cbe6226d05428a2ab126815e934942f5a9
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
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In order to enable automatic keyboard testing, let's add key press
simulating command to ectool.
BUG=chrome-os-partner:9188
TEST='ectool kbpress 4 6 1' and see 'j' pressed.
'ectool kbpress 4 6 0' and see 'j' released.
Change-Id: I5a445e13aad2bd09aa6e9a1d62995cf34b782aeb
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Works around LM4 errata where EEPROM access is unstable while powering down.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:9996
TEST=hibernate 1
Change-Id: I99d21ec8ab5a06fb0972edebec3cc58ca9f60fa9
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Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:10200
TEST=manual
eeread 2 0 --> note original value
eewrite 2 0 0x1234
eeread 2 0 --> should be 0x1234
eewrite 2 0 (original value)
eeread 2 0 --> should be original value again
Change-Id: Ibb72426663122b22b2bfe87c821c374eab334450
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...so I can use usleep() for eeprom delays in the CL coming next...
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:10200
TEST=if it boots, it worked
Change-Id: I564578f24452a4ac39abe79ff28cfff4b665ad2f
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Each TMP006 temperature sensor has different sensitivity factor. Let's
add a field to set different sensitivity factor for each sensor. Also
update the factors to get more reasonable temperature readings, but
still need more precise calibration.
BUG=chrome-os-partner:9599
TEST=Build and read tempearture succeeded.
Change-Id: Ib4feea3b78b71f6d37c9a02668ffa7bd9e63d390
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When discharging, EC checks if battery temperature is in working
range. The battery pack module should provide the working range
in deci-Kelvin, not Celcius.
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:9485
TEST=manual
Unplug AC adapter, and check
/sys/class/power_supply/BAT0/charge_now
Change-Id: Ib6a312941cb1f3622c6f18d2c58bc50a06feafaf
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When keyboard backlight is disabled, make 'ectool pwmgetkblight' reports
'disabled'.
BUG=chrome-os-partner:9966
TEST='ectool pwmgetkblight' shows 'Keyboard backlight disabled' when
lid closed.
Change-Id: Ica690159e30431ccb530275fcc2311fb8f54a9aa
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This returns true when both HW and SW write protect are enabled.
Once WP is enabled, sysjump will be locked out.
system_is_locked() can be used to gate other dangerous-ish commands too.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7468
TEST=manual
sysinfo -> unlocked, copy A
sysjump B -> works
flashwp lock
reboot
(make sure flashinfo shows WP asserted and flash locked; note there is a
HW bug on proto1 which makes this flaky)
sysinfo -> locked, copy A
sysjump B -> fails
(remove WP screw)
reboot hard
flashwp unlock
Change-Id: I849b573675c2c1cb4c44b9a05d6973e38247ca23
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Additional help messages and usage are gated by
CONFIG_CONSOLE_CMDHELP, so we can turn it on if there's space (adds
about 3KB to image size) and turn it off when there isn't.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=manual
1) help
2) help list
3) help gpioset
4) gpioset -> wrong number of params
5) gpioset fred 0 -> param1 bad
6) gpioset cpu_prochot fred -> param2 bad
Change-Id: Ibe99f37212020f763ebe65a068e6aa83a809a370
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BUG=none
TEST=none
Change-Id: Id6ced0b87b354136e0b80026a537958586bb1325
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
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When the FIFO is empty, returns the last read entry not the next one.
also rewrite the FIFO index increment to generate slightly better code.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:8869
TEST=On Snow, in U-Boot using "stdin=mkbp-keyb" type on internal
keyboard and see the correct text.
Change-Id: I189d230053de40dd563ce672db82dd6217e545e3
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Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=if it builds, it works
Change-Id: I2064f3eed4790051312a5a53ef742dcf79c4ee9d
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Instead of storing task contexts in .data and wasting several kB of
flash with mostly 0s, move them to .bss and fill the initial context at EC
startup. The runtime overhead is small enough.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:9839
TEST=run on Link and check verified boot and chromeOS startup are OK.
Change-Id: Iaef23d46a4e3e80e49886dfbf7ab1f537c587362
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This works around a problem where columns are not tri-stated when
calling select_column(COLUMN_ASSERT_ALL) with enable_scanning=0.
Also removes polling for power button released; we can use the same
task wait for that as we do for a keypress.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7486
TEST=manual
1) press g then press power button repeatedly. EC is not rebooted.
2) press power button the g repeatedly. EC is not rebooted.
3) press power+refresh (or ESC on proto1). EC is rebooted.
Change-Id: I43a0beae1a6c0ef8fa9379a8fff47b6006e63c8c
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