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* math_util: fix incorrect int_sqrtf implementationTing Shen2021-01-273-7/+34
| | | | | | | | | | | | | | | | | | | | | Correct the binary search interval for small x. The range should be at least [0, sqrt(2 ** 31)] ~= [0, 46341]. Also fixed some corner cases and added unit test for it. BUG=b:177384512 TEST=1)`watch -n 0.3 ectool motionsense lid_angle` verify the angle looks reasonable. 2) TEST_LIST_HOST=fp make runhosttests BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I394fe3a59ac51ec4491a24399848f179c1074b95 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2646041 Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Yilin Yang (kerker) <kerker@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* zephyr: npcx: Add drivers for battery-backed RAMYuval Peress2021-01-278-5/+252
| | | | | | | | | | | | | | | | | This change introduces a new driver for the battery backed RAM on the npcx chipset. The API includes the ability to check various status fields as well as reading/writing to the memory. To add this to the devicetree we must use both the `memory` and `status` register names. BRANCH=none BUG=b:174481378 TEST=zmake testall Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I576c3c30d970b2878aee712f6dda3579d0960e76 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649462
* makefile: fix flash image size reportingKeith Short2021-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | | The Makefile uses awk to find a section named FLASH in the output map file and parses the size of the section to determine the free space remaining. NPCX RO images include sections named FLASH and FLASH_HDR. Modify the awk command so the FLASH_HDR section isn't used by mistake. BUG=none BRANCH=none TEST=make buildall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I3e420fbb45fdebc4f1e2578f819bbbce4994d2a8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2640873 Commit-Queue: caveh jalali <caveh@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org>
* npcx7: Set the erase size to 64 KiBKeith Short2021-01-271-15/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NPCX flash layout was setting the erase size based on RO image size to ensure the host can erase the entire image using. When 1/2 flash is smaller than code RAM, the NPCX reserves one 4 KiB flash block for the NPCX header. This has the side effect of reducing the erase block size from 64 KiB to 4 KiB, and introduces a boot time regression when processing flash blocks. CL:2325764 modified the common flash support to allow the host to program up to CONFIG_WP_STORAGE_SIZE bytes for the RO image and CONFIG_EC_WRITABLE_STORAGE_SIZE bytes for the RW image. Set the erase size to a fixed value of 64 KiB, with build checks to verify the total flash size is a multiple of 64 KiB. Both the RO and RW image starting addresses are already aligned to at least a 64 KiB boundary, so there is no impact when the RW firmware is upgraded. BUG=b:175115527 BRANCH=volteer TEST=make buildall TEST=Boot EC on Delbin with NPCX797FC TEST=Increase the RW image size to 0x3ed1c (maximum is 0x3F000) and verify EC software sync is successful at updating the image. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I8823da2b909dfa36646b411a146001c618ce0e8c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643579 Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
* magolor: disable tablet mode by fw_configBen Chen2021-01-272-10/+22
| | | | | | | | | | | | | Enable/disable teblet mode by fw_config BUG=b:173908972 BRANCH=cros/main TEST=`make buildall` PASS Change-Id: Ia375fd18e8f910a547351b5c8b96c5e0ce16d383 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644795 Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr: Add support for panic outputJack Rosenthal2021-01-267-8/+186
| | | | | | | | | | | | | | | Add basic panic implementation for Zephyr. Not using any fancy shared or always-on memory for now ... need to resolve how that will be handled later. BUG=b:178011288 BRANCH=none TEST=run various crash commands on volteer, observe output Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Ia1ce386f738283a2a2b9b60ef7e0bf97f8317837 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645687
* COIL: Rename comments in BB retimerDiana Z2021-01-261-2/+2
| | | | | | | | | | | | | | Rename i2c comments in the BB retimer to reflect current naming conventions. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I8160b851b84795ffd13934c2be2e12fd2a04c5f5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649350 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Rename comments and variables in PS8802 driverDiana Z2021-01-262-5/+6
| | | | | | | | | | | | | Rename i2c related comments and variables in the PS8802 driver. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id52177261edc604f610ace0e72b4d42f09a5de0c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649349 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* zephyr: minimal uart_* implementationsJack Rosenthal2021-01-261-0/+24
| | | | | | | | | | | | | | | | Added minimum required uart_* functions for panic to work, using printk as backend. Probably should switch filling-out enough to support uart_buffering.c in the future, requiring switching to Zephyr's UART drivers instead of printk(). BUG=b:178033156,b:178011288 BRANCH=none TEST=compile with panic_output.c Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I2879cd05cd858d13241e6fc1a7f818b6649e4bd6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649497 Reviewed-by: Keith Short <keithshort@chromium.org>
* docs: Add instructions on using the flash_jlink.py scriptTom Hughes2021-01-263-14/+99
| | | | | | | | | | | | | | These instructions clarify how to use J-Link/J-Trace to flash the FPMCU dev boards. BRANCH=none BUG=b:178124518 TEST=view in gitiles Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I73e0774e0721001f229e3a608262a64129d2ab44 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643588 Reviewed-by: Josie Nordrum <josienordrum@google.com>
* volteer: enable MKBP event for ZephyrHyungwoo Yang2021-01-262-0/+5
| | | | | | | | | | | | | | Enable MKBP event for Zephyr on Volteer. BUG=b:173507858 BRANCH=none TEST=make buildall -j8 build volteer on zephyr Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.corp-partner.google.com> Change-Id: I0c663f5a0bde8dece09c48a012de8f1903dd82d5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639856 Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: add MKBP supportHyungwoo Yang2021-01-268-16/+205
| | | | | | | | | | | | | | Add MKBP support to zephyr. BUG=b:173507858 BRANCH=none TEST=make buildall -j8 build volteer on zephyr Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.corp-partner.google.com> Change-Id: I9b7d979241b0df5dc0fa5d9741f05dc9875189ab Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639854 Reviewed-by: Keith Short <keithshort@chromium.org>
* Jelboz360: Config the G-sensor settingJacky Wang2021-01-263-39/+41
| | | | | | | | | | | | | | | | | | | | 1. Base on schematics, modify the motion sensor related setting to BMI160 and KX022. 2. Modify base rotation matrix depend on schematics. BUG=b:178451001 BRANCH=firmware-zork-13434.B TEST=make BOARD=shuboz 1. Using "ectool motionsense" check x/y/z value. 2. Using "ectool motionsense lid_angle" check angle. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I6f07e6795b6a28a805270250a0ef78babf4a5d75 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649886 Tested-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Commit-Queue: Edward Hill <ecgh@chromium.org>
* npcx: fan: fix the enumeration of the tachometer clockWealian Liao2021-01-261-1/+1
| | | | | | | | | | | | | | | | | | NPCX chip uses MFT as a tachometer module. The counter clock select is not synced with the datasheet. For the LFCLK, the value of clock select should be set to 4. This CL fix the LFCLK clock enumeration. BUG=b:178376892 BRANCH=None TEST=pass buildall TEST=use PWM to generate the waveform to the tachometer. Check that the tachometer gets the correct value by 'faninfo'. Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I22f47e0de403b144a8604e818db8f230764b4fc0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649292 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* voema: Add battery AP15O5LDavid Huang2021-01-262-1/+30
| | | | | | | | | | | | | | | | Add new battery AP15O5L BUG=b:176860886 BRANCH=main TEST=1) See "[found batt:PANASONIC KT00305013]" on EC console 2) battery readings looks reasonable. 3) cutoff workable. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: Ie2522ab2a782def304ae2588b7f34d7422e97345 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639418 Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv2: Wait for tSrcTransition after AcceptAbe Levkoy2021-01-263-8/+24
| | | | | | | | | | | | | | | | | During power contract negotiation, after sending Accept, wait for tSrcTransition before transitioning the supply and sending PS_RDY. See PD r3.0, v2.0, Table 7-22. BUG=b:173023378 TEST=Pass TDA.2.1.2.2 using MQP compliance tester (or at least don't fail due to sending PS_RDY too early). BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I76e31ff5df6bfd71f78642bda25e1e8f9f590f9c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644179 Reviewed-by: Diana Z <dzigterman@chromium.org> Tested-by: JC Huang <j.c.huang@quanta.corp-partner.google.com>
* zmake: remove prefer-zephyr-sdk from project configJack Rosenthal2021-01-262-22/+0
| | | | | | | | | | | | | | | No projects set this anymore. BUG=b:178363068 BRANCH=none TEST=zmake testall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Ib28017048695a5dbabaead83de49c85363fde665 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2647537 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org>
* zephyr: kohaku/volteer: unset prefer-zephyr-sdkJack Rosenthal2021-01-262-34/+2
| | | | | | | | | | | | | | | coreboot-sdk is working now, this hack can go away. BUG=b:178363068 BRANCH=none TEST=compile without -t coreboot-sdk, run on device Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Ifc5b05557ecf623e709bfd2b464648bd24197e1c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2647536 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org>
* zephyr: Use Chrome EC's libgcc implementation over the compiler'sPatrick Georgi2021-01-263-0/+21
| | | | | | | | | | | | | | | | | | | | | gcc's libgcc is built with a compile time notion of what an architecture's ABI will look like. If that happens to be wrong, you're out of luck. Instead, use our own implementation which, while written in assembly (and as such not as flexible as it could be) is processed with the right set of flags. BUG=b:178363068 BRANCH=none TEST=zephyr boots on kohaku when built with coreboot-sdk. Signed-off-by: Patrick Georgi <pgeorgi@google.com> Change-Id: I6d27bb48478081b6c2ff8927734492282e55e898 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648666 Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
* drawcia: Set gyroscope translation matrixEvan Green2021-01-261-1/+1
| | | | | | | | | | | | | | | | | | CTS tests are failing because sensor values from axis 1 and 2 are negated. When the test expects 360 degrees, -360 degrees gets reported. Set the standard base translation matrix to resolve this. BUG=b:175996778 TEST=Try CTS BRANCH=None Signed-off-by: Evan Green <evgreen@chromium.org> Change-Id: I9ede658cef042caf72b81d08e4c47de4c7b5e820 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648730 Tested-by: Kazuhiro Inaba <kinaba@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Kazuhiro Inaba <kinaba@chromium.org> Commit-Queue: Kazuhiro Inaba <kinaba@chromium.org>
* voema: Initialize the vivaldi keyboard.David Huang2021-01-262-0/+25
| | | | | | | | | | | | | | | | | | | Initialize the vivaldi keyboard. BUG=b:177274193 BRANCH=main TEST=manual 1. Scan all key. 2. Check action key function. 3. Check ALT + Volup + H. 4. Check ALT + Volup + R. 5. Check Refresh (F2) + powerbutton (EC reboot). 6. Check ESC + Refresh + powerbutton. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: Ib949e96910130971b41c3dd6017ac9b6f7e08ff8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2637155 Reviewed-by: Keith Short <keithshort@chromium.org>
* zork: add support SSFCZick Wei2021-01-263-0/+72
| | | | | | | | | | | | | | | | | This patch add support SSFC for zork, add support base sensor as below: SSFC_BASE_GYRO_BMI160 = 1, SSFC_BASE_GYRO_LSM6DSM = 2, SSFC_BASE_GYRO_ICM426XX = 3, BUG=b:173753906 BRANCH=zork TEST=make buildall Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: I10749d819b852861ac5a32d69f2b872527633082 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2641706 Reviewed-by: Edward Hill <ecgh@chromium.org>
* voxel: Enable CONFIG_KEYBOARD_VIVALDIBen Chen2021-01-262-6/+43
| | | | | | | | | | | | | | This CL implements vivald function row config for voxel keyboard. BUG=b:177043612 BRANCH=main TEST=verify keycode is correct in `evtest` Change-Id: I02d59bf1ec9fac802f0b47f38bba1cd3915573b8 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2620732 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: YH Lin <yueherngl@chromium.org>
* Metaknight: Fix wrong wordsYu-An Chen2021-01-264-4/+4
| | | | | | | | | | | | Fix wrong words. BUG=None BRANCH=main TEST=None Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: I9af86d352d00403dd66012fdac2c639454ca1518 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644789 Reviewed-by: Diana Z <dzigterman@chromium.org>
* woomax: Modify strength value of PS8818 for USB-C0 signal qualityMichael5 Chen12021-01-261-2/+2
| | | | | | | | | | | | | According the USB TX test result, modity ps8818 setting. BUG=b:175351902 BRANCH=zork TEST=manual Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I2a6892365b283f52c6accd8cb73facd1973dd68a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2641715 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* docs: add porting considerations for ZtestPaul Fagerburg2021-01-261-0/+29
| | | | | | | | | | | | | | | | | Add a new section to the Ztest documentation providing details of what sorts of EC unit tests are not good candidates for porting to Ztest. BUG=b:172240633, b:172240757 BRANCH=None TEST=N/A Signed-off-by: Paul Fagerburg <pfagerburg@google.com> Change-Id: I3010dfb338e8e9c835c55b10a79a2e4dce703f96 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648397 Tested-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
* dedede: Add MKBP_EVENT to baseboardEvan Green2021-01-267-15/+7
| | | | | | | | | | | | | | | | | | CtsSensorTestCases is failing on Drawcia because it requests 100 events from accelerometer and gyroscope but gets zero. We can read sensor events just fine, but they never seem to push to the kernel. Add CONFIG_MKBP_EVENT into the baseboard, and then clean up all the one-off variants that have added this themselves. Also, add some accel commands specific to drawcia for easier debugging. BUG=b:171939568 BRANCH=none TEST=Use amstan's script, which amounts to cat /dev/iio:deviceN Signed-off-by: Evan Green <evgreen@chromium.org> Change-Id: Ia796ec2f9a08d3628dcabb4b5fca425693af4099 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2638636 Reviewed-by: Diana Z <dzigterman@chromium.org>
* usb_mux: Send missed disconnect mode in S3/S0ixMadhusudanarao Amara2021-01-263-8/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the Type-C devices are connected in S0 and when DUT enters S3/S0ix, if the type-C devices are disconnected and re-connected, Kernel won't receive the disconnected state from EC once DUT boots to S0 as EC moves on and updates the new connected state to Kernel Mux driver. This leads to failure of Type-C device detection on resuming to S0 from S3/S0iX. To overcome this scenario, adding an explicit condition to send previous disconnect state to Kernel Mux driver once initial mux request is received upon resuming from S3/S0iX. Missing Disconnect mode Patch Details: Set disconnect latch flag for the init and disconnect requests For AP to EC PD command: EC_CMD_USB_PD_CONTROL -Check disconnect latch flag if it is true set pd.enabled = 0 For AP to EC mux command: EC_CMD_USB_PD_MUX_INFO -Check the disconnect latch flag if it is true then send disconnect mode -Reset the disconnect latch flag -Send host event EC_HOST_EVENT_USB_MUX for configuring the virtual mux with the latest Mux configuration BUG=b:176604380 BRANCH=None TEST=Type C devices in s0ix disconnect/connect or swapping across the ports scenarios tested Change-Id: Ic38d3632cb0fadb29393405e13ed3606a740c81e Signed-off-by: Madhusudanarao Amara <madhusudanarao.amara@intel.corp-partner.google.com> Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2632551 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* usb_mux: Use atomic operations for updating the flagMadhusudanarao Amara2021-01-261-4/+5
| | | | | | | | | | | | | | | | Atomic operations used in updating the LPM flag BUG=None BRANCH=None TEST=Disconnect typeC devices and then connect back, devices are detected Signed-off-by: Madhusudanarao Amara <madhusudanarao.amara@intel.corp-partner.google.com> Change-Id: I6c3fa4b9c63436a16465012fe715ce28995ed179 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648145 Tested-by: Ayushee Shah <ayushee.shah@intel.com> Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: volteer: move CONFIG_SHIMMED_TASKSJack Rosenthal2021-01-252-2/+1
| | | | | | | | | | | | | | This was in the board config, which is for hardware configuration. Project configuration needs to go in prj.conf. BUG=none BRANCH=none TEST=compile Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I3c91ca93722b9bc112218ef911bd076e386a762c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2647534 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
* guybrush: Configure keyboardRob Barnes2021-01-253-2/+74
| | | | | | | | | | | | | | | Configure keyboard based on zork. Enable keyboard tasks. Enable pwm for keyboard backlight. BUG=b:178213641 BRANCH=None TEST=Build Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Iae9d31c9849a3500dbd000829bd1439901a6d1b6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645076 Reviewed-by: Diana Z <dzigterman@chromium.org>
* ctn730: Print payload and handle download modeDaisuke Nojiri2021-01-251-3/+14
| | | | | | | | | | | | | This patch makes ctn730 driver print payload and handle download mode. BUG=b:173235954 BRANCH=trogdor TEST=CoachZ Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I74626c726c18c30a039fc521e419688796db9c3b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2646124 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pchg: Initialize pchg chips on startupDaisuke Nojiri2021-01-251-16/+69
| | | | | | | | | | | | | | | | | | | | | | This patch makes pchg task disable the interrupt on shutdown and initialize pchg chips on start-up. Tested as follows: 1. Run dut-control power_state:on -> off -> on. 2. Run dut-control power_state:reset. Do 1 and 2 with and without a stylus attached and verify pchg task remains under control. BUG=b:176725734, b:173235954 BRANCH=trogdor TEST=CoachZ Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I0b1b5501975ad6c8a89041639d3fa90a71b4e9b5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643586 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* zephyr: provide a header for cpu.hJack Rosenthal2021-01-251-0/+14
| | | | | | | | | | | | | | Provide a minimal header for cpu.h, which is used by both panic_output.c and system.c. BUG=b:174481378,b:178011288 BRANCH=none TEST=compiles with panic_output.c Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I16ca7350d58bc392d87a6f0bbf9d6080e607998d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2647951 Reviewed-by: Yuval Peress <peress@chromium.org>
* tcpmv2: Re-discover cable if the port parter is PD 2.0Ayushee Shah2021-01-251-12/+23
| | | | | | | | | | | | | | | If the cables has been queried with PD 3.0, but the port partner supports PD 2.0, re-discover the cable capabilities. BUG=b:178077239 BRANCH=None TEST=Tested with PD2.0 dock and PD3.0 cable, able to enter Thunderbolt mode. Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Change-Id: I559f57a64a525a7ee0ae8744f88ec347688fe880 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643580 Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: test: update unit tests for zmakePaul Fagerburg2021-01-2515-131/+27
| | | | | | | | | | | | | | | | | Many of the options in CMakeLists.txt and prj.conf are no longer necessary with zmake and Kconfig handling them automatically now. BUG=b:178220157 BRANCH=none TEST=`zmake testall` Signed-off-by: Paul Fagerburg <pfagerburg@google.com> Change-Id: I845f42c4b51214f28ab7771734232fec763c04f4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645696 Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: test: provide Kconfig defaults for testsPaul Fagerburg2021-01-252-0/+16
| | | | | | | | | | | | | | | | | | When we're building a unit test, provide defaults for many of the hardware options that don't need to be included in a unit test, or have to be there for the linker's sake but aren't actually used. BUG=b:178220157 BRANCH=none TEST=`zmake testall` Signed-off-by: Paul Fagerburg <pfagerburg@google.com> Change-Id: Iaab2a3a3a8175e7e08099467947cf183b707cef6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645695 Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Trogdor: Don't make pressing a key a wake source if no keyboardWai-Hong Tam2021-01-251-0/+6
| | | | | | | | | | | | | | | | | If the board doesn't have a task to scan keys, it doesn't have an internal keyboard. Don't make pressing a key (the event EC_MKBP_EVENT_KEY_MATRIX) a wake source in this case. BRANCH=Trogdor BUG=b:178231341 TEST=Checked the wakemask bit:0 EC_MKBP_EVENT_KEY_MATRIX is unset $ ectool mkbpwakemask get event MBKP event wake mask: 0x00000406 Change-Id: I5a8f208ad2727e135f7d8a756b697152af6cfcf0 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645744 Reviewed-by: Douglas Anderson <dianders@chromium.org>
* pd: fix superspeed mux steering on UFPVincent Palatin2021-01-253-1/+13
| | | | | | | | | | | | | | | | | | | | | When the device has a USB superspeed UFP (which is uncommon, this is either servo v4.1 or a laptop port in SS device-mode), if we connect as a sink *before* trying PD communication, we should connect the SS mux without waiting for the partner PD comm capability as we might never be able to communicate with it over PD. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=b:150614702 BRANCH=servo TEST=use the sink mode enabled by 'cc pdsnk', connect to a USB-C Chromebook, try both video output on USB-C->mini-DP and USB 3.0. Change-Id: Iea0409fce2cb7aca089814ae406a7c05848dd8e4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2637647 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* guybrush: implement usb_pd_policy stubsRob Barnes2021-01-251-5/+41
| | | | | | | | | | | | | Implement pd stubs in usb_pd_policy. Based on zork implementation. BUG=b:175400400 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I4b87518bf758d3eb7245ad4eafd5a99dd824a150 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2613225 Reviewed-by: Diana Z <dzigterman@chromium.org>
* TBT: Correct pdcable commandAyushee Shah2021-01-251-1/+1
| | | | | | | | | | | | | | | This CL changes the revision field in the pdcable console command to check the PD revision instead of checking the VDM version. BUG=None BRANCH=None TEST=Able to get the 'Cable Rev' field as 3.0 for PD 3.0 cables Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Change-Id: I7e10b2e352bc78c23c8578361b577d04a9491e7a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643576 Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* tcpmv2: ensure the USB mux state is only changed in the PD taskKeith Short2021-01-251-7/+5
| | | | | | | | | | | | | | | | | | | | | The USB mux code does not provide any mutex protection. In addition the virtual USB mux code must be run from the PD task to handle synchronization of the EC_CMD_USB_PD_MUX_ACK host command. Move the USB mux updates into the common power state handler for the type-C state machine. BUG=b:178186846 BRANCH=volteer TEST=make buildall TEST=Connect Gatkex to Voxel, execute EC reboot and verify assertion is fixed. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I0a18d0f5c51eedb4ecb0c275ea1235f7838246a6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644843 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Tested-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.corp-partner.google.com>
* guybrush: Enable BOARD_RESET_AFTER_POWER_ONRob Barnes2021-01-251-0/+7
| | | | | | | | | | | | | | This was required on Zork. It's also needed on guybrush. BUG=None TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I7a81cd61cff2f39bf4d6a76da9fef5453c2e52dc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645074 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* octopus: set CONFIG_BC12_MAX14637_DELAY_FROM_OFF_TO_ON_MS to 100msyu-an.chen2021-01-251-0/+2
| | | | | | | | | | | | | | | | | Set CONFIG_BC12_MAX14637_DELAY_FROM_OFF_TO_ON_MS to 100 ms BUG=b:177265749 BRANCH=octopus TEST=make buildall -j 8 Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: I175b8df258c92b155857a0b41d930fe157420a31 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644781 Tested-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org> Auto-Submit: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com>
* max14637: Switch should not be kept open when PD adapter is disconnectedyu-an.chen2021-01-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Root Cause: D+ and D- of PD adapter are shorted so chip would detect PD adapter as the DCP. As a result, chip would set USB 2 switch open based on product spec. Later on once USB 2.0 storage is attached, DUT can't recognize it because USB 2.0 data path is blocked by chip now before introducing this CL. Solution: Whenever adapter or USB client device is disconnected from a port of DUT, we re-trigger the bc12_detect() so chip will be off then on for detecting the status again. In this case, the D+/D- are NC so chip will detect it as the SDP and keep this status afterward. When USB 2.0 storage is connected later, bc12_detect will not be called again due to DUT is in source role. At this moment, USB switch is closed so USB 2.0 path is good. And there is no BC12 detecting cycle happened so we will not hit issue resolved in CL:*2364342 as well. When adapter is connected again, bc12_detect will be triggered for detecting DCP / SDP / CDP. BUG=b:177265749 BRANCH=octopus TEST=make buildall -j 8 TEST=check lsblk , usb2 device is exist after reproduce step Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: I769e9f97daf86992259d8da0bbb38a1068bd8a5a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2626791 Tested-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* Metaknight: Add temp sensor to read temperatureYu-An Chen2021-01-252-0/+27
| | | | | | | | | | | | | Add temp sensor for reading temperature. BUG=b:177854439 BRANCH=main TEST=In console input "temps" to check temperature. Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: Ifc9c3d5c2e93ddd8267353fa9fd31367e539c3d4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2637154 Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com>
* elemi: Change thermal and fan configurationDevin Lu2021-01-251-32/+25
| | | | | | | | | | | | | | | This patch changes thermal halt/alert, fan maximum/off temperature point and fan minimum/maximum speed. BUG=b:177635236 BRANCH=firmware-volteer-13672.B-main TEST=Thermal team verified thermal policy is expected. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I165dde7585aff055659187ab08511584c836cd4b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639432 Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* Metaknight: Support motion sensor 2nd sourceYu-An Chen2021-01-234-51/+179
| | | | | | | | | | | | | | | | | | Support motion sensor 2nd source: -Lid : KX022 -Base : LSM6DSM BUG=b:177868819 BRANCH=main TEST=rework KX022/LSM6DSM on DUT, check ectool motionsense lid_angle is correct. Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: If61addd7ca182ff9c3d3e87e1f77076236a006d6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2641705 Tested-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Henry Sun <henrysun@google.com>
* zephyr: volteer: redefine the flash node with the correct unitFabio Baltieri2021-01-231-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the build warning: Zmake/ERROR: warning: unit address and first address in 'reg' (0x10070000) don't match for /flash@10090000 Caused by the flash memory node having a different unit and mem start, introduced in 50cfda251. Does not change anything in practice but it triggers a warning in the device tree compile phase. Looking at the code, it seems like we could potentially just suppress the check and warning entirely [1], but that is normally a good warning to catch dts misconfigurations, and the fix is easy enough as redefining the whole node and deleting the old one. [1] https://github.com/zephyrproject-rtos/zephyr/blob/a8d3c8e142e2a4a8ec9fb52bf0aa42ee2c7fd7cc/scripts/dts/gen_defines.py#L53-L55 BUG=none BRANCH=none TEST=warning is gone, did a full readelf -a diff of the two binaries, they match TEST=zmake testall Change-Id: Iab64c0219933c83f6b52789fc00b525864c543f8 Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645126 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Simon Glass <sjg@chromium.org>
* ec3po: fix python3 related unittest failuresRuben Rodriguez Buchillon2021-01-231-2/+2
| | | | | | | | | | | | | | | | | The new way to open the ttys was making 2 tests fail. This change addresses that by aligning the expectations with the actual calls. BRANCH=None BUG=b:173654272 TEST=./util/ec3po/run_tests.sh Ran 44 tests in 0.089s OK Change-Id: Ib550ab31436a8da093ec0af2bb0c61bb345647b2 Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645699 Reviewed-by: Matthew Blecker <matthewb@chromium.org>
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