| Commit message (Collapse) | Author | Age | Files | Lines |
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This patch moves is_manual_recovery from common/vboot to
common/system.c to make it available as a common API.
There is no functionality change.
BUG=none
BRANCH=none
TEST=EFS2 detects manual recovery.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I3e6acd979feb78ff69b78780f1095fee855b4945
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242663
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This patch fixes the EC_REBOOT_HIBERNATE_CLEAR_AP_OFF command to
match the change made by CL:2213730.
There is no functionality change.
BUG=b:37536389
BRANCH=none
TEST=Verify ectool hibernate-clear-ap-off works.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I70ec3a38b0ceaca8a79c6e2c6df127fb145496e2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242662
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Currently CONFIG_POWER_BUTTON_INIT_IDLE is available only for NPCX
chips.
This patch moves the code to common/power_button.c. There is no
functionality change.
BUG=b:37536389
BRANCH=none
TEST=Verify no functionality change on Puff.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: Ib4b1182900acea21e5210a2f9a699da18fe55611
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242661
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The vSafe0V bit isn't working in the PS8815 TCPC.
BUG=b:158520242
BRANCH=none
TEST=make buildall
TEST=Volteer, confirm that SNK devices can be detected with TCPMv2
stack.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I7760fda39cac4c73d58a82c63aff85dfdef9eb3e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2244018
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Add a flag to override checking the vSafe0V bit directly if this
capability is not functional on a TCPC revision 2.0 device.
BUG=b:158520242
BRANCH=none
TEST=make buildall
TEST=Volteer, confirm that SNK devices can be detected with TCPMv2
stack.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ia6f3a28970f240fb022cbef9d286761266224f6f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2244017
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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For further power savings in hibernate, disable the BFET on each
charger. For devices that use the Z-state, the LDO will be powered by
the BFET's body diode.
BUG=b:155507120
BRANCH=None
TEST=Build and flash waddledoo, hibernate DUT, verify that DUT can
wake up via the power button.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I0ffec4a56e282bcc801a317da78b43e6b04c82d2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2243318
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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In the early revision of silicon for the RAA489000, the EC had to make
a number of writes to certain registers. However, in the latest
datasheets, a lot of the registers are now reserved. Therefore, we
shouldn't be writing to them anymore.
This commit simply restricts those register writes to the older
version of silicon where the registers were still valid.
BUG=b:158611239
BRANCH=None
TEST=Build and flash on waddledoo with newer silicon, verify that TCPC
is still working and were are able to DRP toggle, respond to PD
messages, negotiate higher contracts, enter DP alt mode. Verify that
both orientations still work.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I33e3fafa50f37bb1de5bc31fb0618867e5e47a53
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2240515
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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The vendor has made some recommendations to improve low power mode.
This commit simply adds those register writes.
BUG=b:155507120
BRANCH=None
TEST=Build and flash waddledoo, verify that power consumption is
reduced.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I8d67946979471df36cc84c8979102f6607a1fa46
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2240514
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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When we send a HardReset to a non-PD port partner, there was an issue
where we were not setting the correct Type-C input current limit.
This was because the Type-C current limits were only advertised upon
entry to the Attached.SNK or DebugAccessory.SNK states. When a sink
initiated HardReset occurs, we would clear out our available charge
leaving the only suppliers to update being VBUS. This would cause the
DUT to set an input current limit of just 500mA even if the source
advertises more.
This commit fixes this issue by notifying charge manager of the Type-C
current advertisements following a sink initiated HardReset.
BUG=b:158849098
BRANCH=hatch?
TEST=Build and flash waddledoo, plug in a non-PD charger, verify that
the input current limit is set correctly to the Type-C resistor
advertisement.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ie2c39ffd55dcda52931c19a0ccc57567c488b1cb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2243320
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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When building host-based unit tests for code coverage, put the build
outputs in a different directory. Because the code coverage build
has calls into gcov library functions, a partial rebuild without code
coverage will result in undefined linker errors. The previous solution
was an inefficient cycle of `make clobber` and full rebuild when
switching between building with and without code coverage.
BUG=b:157091606
BRANCH=None
TEST=`make buildall -j ; make coverage -j`
Verify that build/host and build/coverage both exist, and that code
coverage data (*.gcno, *.gcda, *.info) is only in build/coverage.
Signed-off-by: Paul Fagerburg <pfagerburg@google.com>
Change-Id: Iac0b18068082d34546aa15b174f86efb6a7f41a7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242351
Tested-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
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Duplicate of: https://chromium-review.googlesource.com/1089823
for remaining boards not covered by
https://chromium-review.googlesource.com/2242352
BUG=b:158792057
TEST=make -j buildall
BRANCH=asurada,octopus
Change-Id: Ic3ae36629d75ff20e96910c107e67f933fa4cce5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242396
Commit-Queue: Jes Klinke <jbk@chromium.org>
Tested-by: Jes Klinke <jbk@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This change adds a helper function extpower_handle_update() that
performs all the necessary actions that need to be done on external
power state change:
1. Call hook_notify with AC_CHANGE
2. Update memmap_batt_flags to update EC_BATT_FLAG_AC_PRESENT
3. Set host event for EC_HOST_EVENT_AC_CONNECTED or
EC_HOST_EVENT_AC_DISCONNECTED.
Step#2 above is important because it ensures that the memory map flag
is correctly updated when host reads it. Before this change, it was
observed that EC_BATT_FLAG_AC_PRESENT is updated only when
static/dynamic battery information gets updated. This could result in
host reading the wrong AC state if battery information did not update
before host acts on the host event bit getting set for AC
connect/disconnect.
BUG=b:157752693
BRANCH=None
TEST=Verified on trembyle that EC ASL routines read the correct state
of AC present flag on receiving host event.
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I077de1135320654f571e5cf87ced6f08cbf23876
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242353
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Auto-Submit: Furquan Shaikh <furquan@chromium.org>
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When enable charger OTG, we need to set charging current to 0
BUG=b:158542099
BRANCH=kukui
TEST=make -j BOARD=damu
TEST=make buildall
Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com>
Change-Id: I9aed83084b8382d80dc266cce5243eba0233e536
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2239588
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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As we change the Fn, Win key to Ctrl and Alt on the EVT board,
we need to modify the EC key scancode matrix. Besides, this
patch also removes the CONFIG_KEYBOARD_DEBUG from the board.h.
It is unnecessary to keep the keyboard debug log now.
BUG=b:158435931
TEST=evtest, check the key event
Change-Id: I31891117e14077d9d9bd51f8f9a52f6c7dae859f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2234056
Reviewed-by: Jett Rink <jettrink@chromium.org>
Tested-by: Zhuohao Lee <zhuohao@chromium.org>
Commit-Queue: Zhuohao Lee <zhuohao@chromium.org>
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BUG=b:154564062
BRANCH=firmware-hatch-12672.B
TEST=Thermal team verified thermal policy is expected.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I6d79f2492de087af4f3576dd8faf1079100f3d12
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2241071
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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The sensor locations were configured wrong. Fix them.
BRANCH=None
BUG=b:158611991
TEST=Checked the sensor locations.
localhost ~ #␛grep -Fow cros-ec-accel /sys/bus/iio/devices/iio\:dev
/sys/bus/iio/devices/iio:device0/name:cros-ec-accel
/sys/bus/iio/devices/iio:device2/name:cros-ec-accel
localhost ~ # cat /sys/bus/iio/devices/iio\:device0/location
lid
localhost ~ # cat /sys/bus/iio/devices/iio\:device2/location
base
localhost ~ # grep -Fow cros-ec-gyro /sys/bus/iio/devices/iio\:devi
/sys/bus/iio/devices/iio:device4/name:cros-ec-gyro
localhost ~ # cat /sys/bus/iio/devices/iio\:device4/location
base
Change-Id: I120b39e492364f338d5a899cb1d2398884c7d19d
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242528
Reviewed-by: Philip Chen <philipchen@chromium.org>
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board_set_active_charge_port appears to work correctly.
BUG=b:140561826
TEST=Attach 2 chargers; chgoverride -2 disables VBUS sink on active PPC
TEST=chgoverride 0 enables VBUS sink on port 0 and disables it on port 1
TEST=chgoverride 1 enables VBUS sink on port 1 and disables it on port 0
BRANCH=none
Change-Id: If9664a57709d65289d00477102c454d68b931ea7
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242393
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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For board versions 1 and 2, the fw_config field was not set correctly
in the factory, so attempt to use the SKU ID to set it to a correct
value.
BUG=b:158728444
TEST=Boot on various SKU ids and check they are recognised.
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: Ie590f9f6d9ee230b6f55764bf3d6e9ae1e42c82f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2241074
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Sam McNally <sammc@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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Duplicate of: https://chromium-review.googlesource.com/1089823
We should find the source of the copy-pasting, and also fix that.
TEST=Flash volteer proto1 (ripto), open recovery firmware screen, verify that keypresses are recognized.
Change-Id: I8f4a9851446120a5a89c604fc00ecb6371eadc0f
Bug: b:157080964
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242352
Tested-by: Jes Klinke <jbk@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Jes Klinke <jbk@chromium.org>
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BRANCH=none
BUG=b:157576189
TEST=rendered in gitiles
Signed-off-by: Kevin Shelton <kmshelton@chromium.org>
Change-Id: I925d396c5f0d9e9ef6fe6349c5ffb1ea2ab2eaf1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242397
Commit-Queue: Tom Hughes <tomhughes@chromium.org>
Tested-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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Mark modes discovery for an SVID as failed in response to a Not
Supported response from a partner. Don't mark SVIDs discovery (which
already succeeded) as failed.
BUG=none
TEST=make buildall
BRANCH=none
Change-Id: Id218a9108acf2adae8d4c932958ba9b2b299f3eb
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2238537
Reviewed-by: Diana Z <dzigterman@chromium.org>
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It is redundant with tx_type and essentially unused at this point.
BUG=b:158572770
TEST=make buildall
BRANCH=none
Change-Id: I1818acd93dacf14b657003209256010d5477c76f
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2238536
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Remove state, functions, and fields. Previous changes removed usage of
this state, so this is a non-functional change.
BUG=b:158572770
BUG=b:155890183
BUG=b:155890456
BUG=b:155891305
BUG=b:152419850
TEST=make buildall
BRANCH=none
Change-Id: I6db07fb8b77126f8c214d07f899cf510fca8aa8a
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2238535
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Eliminate a redundant layer of checks.
BUG=none
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Iae5da3a6bb5efddafab03d752e7079a67543cf46
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2234803
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Add a transmit type parameter to functions involved in mode entry; also
add such a parameter to various functions calling those functions. For
DisplayPort-specific definitions or calls, specify SOP; we do not
currently support DisplayPort mode for cable plugs. For TCPMv1-specific
code, specify SOP. TCPMv1 generally assumes that the discovery/mode
structures are 1-dimensional, as they were previously, and changing that
is outside the scope of this CL.
BUG=b:155890173
TEST=Enter DP mode on Volteer with TCPMv2
TEST=Enter DP mode on Volteer with TCPMv1
TEST=Enter TBT mode on Volteer with TCPMV1
BRANCH=none
Change-Id: I8afc75b3f3be8939c4645058ac4a31f24c88fb9e
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2229279
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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For platforms the monitor the PROCHOT signal as an input to the EC, turn
on the fans at 100% duty cycle while PROCHOT is active.
BUG=b:157916121
BRANCH=none
TEST=make buildall
TEST=On Volteer, force EC_PROCHOT_IN signal high, verify fan turns on.
Verify fan reverts to automatic mode once PROCHOT clears.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Iba24daef4211d4b0d51833a569b78a9e40c71271
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2237917
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
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BUG=none
TEST=verify USB-C input voltage could be 20V
TEST=by `dut-control ppvar_vbus_in_mv`
BRANCH=none
Change-Id: I88cb69d4503013d6eb9c879b60d0a0f0403e8926
Signed-off-by: Tony Lin <tonycwlin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2173927
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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Those power rails are controlled by PMIC (MT6359)
BUG=none
TEST=Boot asurada with PP3300_U and PP1800_U
BRANCH=none
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I52d93e0ce77b3cd9b5c58e7289ef56293cde3ada
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2222383
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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To allow for up to 16 barreljack ratings, expand
the fw_config barreljack field to 4 bits.
This is backwards compatible with the existing fw_config
allocation.
BUG=b:158716456
TEST=Confirm correct power adapter parameters are selected.
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: If7470b88233c12be81ff1200ec4d1c1af550f3e2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2237452
Tested-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
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BUG=b:155224587
BRANCH=kukui
TEST=make -j BOARD=kakadu
TEST=make buildall
Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com>
Change-Id: I4d70c152953f1582732302d63a5a67f6ea034838
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2239597
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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BUG=b:158125500
BRANCH=none
TEST=make buildall -j
Signed-off-by: Lu Zhang <lu.zhang@bitland.corp-partner.google.com>
Change-Id: Ica8cdd8f0b14f612f17018a3a95df5a23a6ad43f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2239593
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
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Remove chips:
Charge chip - SM5803
TCPC and USB mux chip - ANX7447
USB retimer chip - TUSB544
BC1.2 chip - PI3USB9201
BUG=b:157626290, b:158023819
BRANCH=none
TEST=make buildall -j
Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com>
Change-Id: Iac30f683774368b2b5706c5f804caf549a54139a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2235238
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The extended GPIO command is useful for debugging. It can modify the
GPIO flags, like changing an input to an output. Enable it as a bringup
feature.
BRANCH=None
BUG=None
TEST=Used "gpioset" command to change a GPIO from an input to an output.
Change-Id: I2b7b1947d0853d7e23378647d152a33b650b551d
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2220832
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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This commit enables TCPC low power mode for the npcx7 dedede variants.
BUG=b:158218613
BRANCH=None
TEST=Build and flash waddledoo, verify that DUT boots, TCPCs enter low
power mode, and no watchdog resets are seen. Additionally, verify
that PD sinks and sources continue to work.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I988a98f778e5f2c4a2fe8257ea27256d7a70b429
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2239484
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This commit changes the mechanism in which waddledoo checks VBUS
presence. Instead of going out to talk to each TCPC, now waddledoo
will simply use the cached VBUS presence within the TCPCI driver.
This was causing a deadlock leading to watchdog resets when TCPC low
power mode was enabled.
BUG=b:158218613
BRANCH=None
TEST=Enable TCPC low power mode, build and flash waddledoo, verify
that the DUT does not watchdog reset.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ifee42979246bb378e9af226123164b10b2df146e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2239483
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
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Currently, AP_IDLE is set when EC is left idle in G3. This makes the AP
stay off after EC wakes up from hibernation (for any wake-up source).
This makes a board require another power button press to boot the
system from hibernation.
This change makes RO clear AP_IDLE unless AC is present. When AC is
present, EC doesn't hibernate. So, AC presence infers the EC woke
up from hibernation by AC. That is, if the system wakes up by a power
button press, AP_IDLE is cleared and AP will be turned on (unless it's
overwritten by AP_OFF).
Tested as follows on Trembyle:
1. Put DUT in hibernation.
2. Wake up DUT and observe:
a. When waking up by power button, AP is turned on.
b. When waking up by lid open, AP is turned on.
c. When waking up by AC, AP is left idle.
BUG=b:157077589, chromium:1073960
BRANCH=none
TEST=See above.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: Ie5020bbe50ad489f4e3010820681cc57ff51b941
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2236589
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Adding update_cc mechanism to keep correct Rp set
BUG=b:158291622
BRANCH=none
TEST=check Rp value over attach, hard reset and pr-swap
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I369c71e637cbb6a8fc37b434194ce39cc9bf5417
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2232830
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
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The IO Expander and board setup functionality are available in
RW and RO
BRANCH=none
BUG=b:146793000
TEST=make -j buildall
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: Ic740169607bd1f97be5145caef08715050ece1ad
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2219119
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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BRANCH=none
BUG=none
TEST=build
Signed-off-by: Jett Rink <jettrink@chromium.org>
Change-Id: If012f7d746193cfc013155def10bbc7c30c8971f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2240193
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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We need to process the TX chunking state machine both before and after
the prl_tx state machine.
Processing before allows us to send outgoing chunked messages on this
iteration.
Processing after allows us to send the TX_COMPLETE status to the PE
layer on the same iteration the PRL gets its notification.
Without this change, if the TCPC fires its alert saying we finished the
TX and we also receive a message (in response to that TX), then we would
get a RX message/event before the TX_COMPLETE notification was sent in
the PE layer.
BRANCH=none
BUG=b:158248741
TEST=Verify the RX and TX messages are happening in the same
statemachine cycle instead of getting the RX event first.
Signed-off-by: Jett Rink <jettrink@chromium.org>
Change-Id: I6fd2ece2326f8dc3cee85c94baae09466d673e87
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2239035
Tested-by: Diana Z <dzigterman@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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- Drop start and end ams function in favor of a flag based approach
- Don't clear RX queue on TX reset. We are supposed to drop any pending
TX messages (not RX messages). This should also help us to process
partner messages if we get a collision
- Drop prl_tx_phy_layer_reset_run and call next state directly in entry
- Dropping retry_counter reset to 0 since that happens in entry method
- Dropping flags reset to 0 because it is most likely dropping more
flags than we want.
BRANCH=none
BUG=b:158248741,b:157228506,b:157661566
TEST=DUT accepts soft resets
Change-Id: Ice8721a6c81452584f8d4ec474cb4f4a487b713b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2233794
Tested-by: Diana Z <dzigterman@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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We have had issue with the TX_COMPLETE flag remaining from previous TX
transactions. This can incorrectly make the subsequent TX transaction
code think that its TX send has completed. It is safer to always clear
the TX flag before starting a new TX transition.
BRANCH=none
BUG=b:158248741
TEST=Verify that TX_SUCCESS does not linger from previous transactions
Signed-off-by: Jett Rink <jettrink@chromium.org>
Change-Id: I5fd7d849bdf97582d5b03b8d833de24b550d8c07
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2239034
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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BUG=b:1568477297
BRANCH=octopus
TEST=On firmware-octopus-11297.83.B, cherry-picked this patch along
with related preceding patches, and tested the built image on fleex.
Cq-Depend: chromium:1679710
Cq-Depend: chromium:1554198
Cq-Depend: chromium:1688134
Cq-Depend: chromium:2080933
Cq-Depend: chromium:2217112
Change-Id: I7bc4269d2e2799160ef3dfd96f9a94c8a4636902
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2236872
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
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Currently, the PE will set the PD capable sleep mask indicator when a
connection starts but never clears this, preventing deep sleep if there
has ever been a PD partner plugged in. This clears the indicator from
the TC on detach.
BRANCH=None
BUG=b:157887329
TEST=on waddledoo, verify sleepmask bit for PD is no longer set on
partner unplug
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: If2d2fc08adb5787268705ee457e226c70336ff44
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2237369
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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ALL_SYS_PWRGD is an AND of DRAM PGOOD, VCCST PGOOD, and
VCCIO_EXT PGOOD. SLP_S3_L is a qualifying input signal
to ALL_SYS_PWRGD logic. This patch ensure ALL_SYS_PWRGD
remains LOW during SLP_S3_L assertion.
BUG=b:158188385
BRANCH=none
TEST=run cold reboot tests
Signed-off-by: Sooraj Govindan <sooraj.govindan@intel.com>
Change-Id: I1bcfbab508220b78df5d21001ecfdb8dcb022022
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2237490
Tested-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Remove access to unknown registers.
Neither of these 2 registers have any known use that
seems to match how they are being accessed, and one of the
registers has a completely different definition in the official
documentation.
Analogix has confirmed that this code was only used for testing
at the start of the porting process, and can be removed.
BUG=b:158044100
TEST=Build and verify normal functionality on Puff.
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I70a814623a6383a4948b84437fe5df9d762e884e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2222384
Tested-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Enable charge current and maximum system voltage slew rate control
on ISL9238C by default for better charger stability.
Since the control is only available on ISL9238C, not on A/B, and
there's no way to distinguish C and A/B in software side, introduce
a new config CONFIG_CHARGER_ISL9238C for 9238C users.
BUG=b:155366741
TEST=1) on asurada, verify the register configured correctly
2) verify the waveform looks better
BRANCH=kukui
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I577db3eebcad0ed3793f4b7d525e4246515f8503
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2231725
Tested-by: Hsu Alvis <alvishsu@google.com>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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This new signal is set to power PI3HDX1204 HDMI retimer IC
on/off in S0/S3.
BUG=b:158266701
BRANCH=none
TEST=make buildall -j
Change-Id: Ie3ee0311553b587fb8686e5300f7a494b8571be3
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2234043
Reviewed-by: Edward Hill <ecgh@chromium.org>
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Reads MRV micause is the most reliable way to get the interrupt source.
Although lower group number has higher priority in INTC_IRQ_OUT, MRV
doesn't always select lower group number (due to some race conditions).
BRANCH=none
BUG=b:146213943
BUG=b:156218912
TEST=make BOARD=asurada_scp
Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org>
Change-Id: Ic392abca9395be4591eace381606fa3d998bfd78
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2217598
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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Given that timer hardware is independent to processor. Uses timer's
interrupt source to determine hardware interrupt vs. software interrupt
is not reliable. The timer's interrupt source could raise when the
processor is handling previous interrupt.
Uses in_soft_interrupt_context() instead.
BRANCH=none
BUG=b:146213943
BUG=b:156218912
TEST=make BOARD=asurada_scp
Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org>
Change-Id: Idf15ea37e667499c38c8c5b96a9352bcfbfaed2e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2217597
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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