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* Clear OWNERS for factory/firmware branchfactory-samus-6375.BBrian Norris2021-09-102-10/+1
| | | | | | | | | | | | BUG=none TEST=none Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155097 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Owners-Override: Jora Jacobi <jora@google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* zinger: enable hibernateAlec Berg2014-10-171-1/+1
| | | | | | | | | | | | | | | | Enable hibernate on zinger for DVT. Note: this may break some EVT zingers. BUG=chrome-os-partner:28335 BRANCH=samus TEST=make buildall Hibernate tested in CL:220837 Change-Id: I65f4776d27ad88beee101fb00d0b6221ba272a26 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/223738 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: update standard revision fieldVincent Palatin2014-10-171-1/+2
| | | | | | | | | | | | | | | | | | USB Power Delivery standard for the BMC variant was finally rev'ed to 2.0 : update the revision field in the PD packets. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=none TEST=dump packet with the PD protocol analyzer Change-Id: I218861d74da61da388bed10e070c9faf6f81fd00 Reviewed-on: https://chromium-review.googlesource.com/223757 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* hoho: Disable spi master by default.Todd Broch2014-10-161-1/+3
| | | | | | | | | | | BRANCH=none BUG=none TEST=manual, HDMI tranceiver functions correctly at power-on Change-Id: I348f22250da7290809fb39319283ec9d4bc4fcc7 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/223614 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* hoho: correct CONFIG1 GPIO direction.Todd Broch2014-10-161-1/+1
| | | | | | | | | | | BRANCH=none BUG=none TEST=manual, compile boots, can read GPIO. Change-Id: If68d56cc4fcafd3872f7df16a5578542e34d5093 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/223613 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Fix incorrect valid and writable flash flagsVic Yang2014-10-157-17/+149
| | | | | | | | | | | | | | | | The valid and writable flags the EC sends back to the AP are incorrect. They are a little bit different on differnt chips, so let's move it to flash physical layer. This is not any causing problem, but we should fix this. BUG=chrome-os-partner:32745 TEST=make buildall BRANCH=samus Change-Id: Ibcda5ae770f5ea02cde094490997a5bc447df88f Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222661 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* samus_pd: Initial DFP_D HPD GPIOs.Todd Broch2014-10-151-0/+2
| | | | | | | | | | | | | | | | | | | USB PD spec now calls for HPD signal to be managed across the USB PD protocal. In preparation this CL makes the HPD GPIOs outputs and initially low. This should NOT effect older revs of the design as GPIOs were unused (had unstuffed option for external XTAL). BRANCH=samus BUG=chrome-os-partner:30645 TEST=compiles & runs. With reworked board can manually trigger HPD. Change-Id: I0a64c1daf8d8c866f5de237c3daf4be028eecd63 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/223462 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Write protect support for STM32F0Vic Yang2014-10-157-15/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On STM32F0, we cannot work around the hard fault triggered when trying to protect the whole flash. Therefore, we need to go with the ALL_AT_BOOT approach. When write protect is enabled, instead of setting ALL_NOW flag to immediately lock down the entire flash, we need to set ALL_AT_BOOT and then reboot to have the protection take effect. BUG=chrome-os-partner:32745 TEST=Along with the next CL. On Ryu: 1. Enable HW WP. Check the output of 'ectool flashprotect' and see correct flags. 2. 'flashrom -p ec --wp-range 0 0x10000'. Check RO_AT_BOOT is set. 3. Reboot EC and check RO_NOW is enabled. 4. Boot the system and check ALL_NOW is set. 5. Update BIOS and reboot. Check software sync updates EC-RW. 6. 'flashrom -p ec --wp-disable' and check it fails. 7. Disable HW WP and reboot EC. Check RO_NOW and ALL_NOW are cleared. 8. 'flashrom -p ec --wp-disable' and check RO_AT_BOOT is cleared. TEST=Enable/disable WP on Spring. Check RO_AT_BOOT/ALL_NOW can be set properly. BRANCH=samus Change-Id: I1c7c4f98f2535f1c8a1c7daaa88d47412d015977 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222622 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* discovery-stm32f072: fix USB version stringAnton Staaf2014-10-151-1/+1
| | | | | | | | | | | | | | | | | The change to a dynamic version string was lost in a rebase. This fixes it. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I388dcf7fc67b02dc0ab350b1cbb08f2e5d0c7000 Reviewed-on: https://chromium-review.googlesource.com/223389 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* zinger: fix double ADC interrupt bugAlec Berg2014-10-151-0/+3
| | | | | | | | | | | | | | | | | | | | | The ADC interrupt does not clear the NVIC pending register. This can cause the interrupt to fire more than once for a given interrupt. BUG=none BRANCH=samus TEST=Send hard reset from samus to zinger using "pd 1 hard" on PD MCU console. This causes zinger to cut its output voltage and go into voltage discharging mode. When voltage discharge is complete, we get an ADC interrupt and switch back to current monitoring. Before this CL, sometimes (1 out of 20) times the ADC interrupt will fire twice, causing an OCP to be detected. With this CL, we never see the double fire. Change-Id: I91397a04773d04e263bc80a698c8799342b80a2e Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/223381 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Factor out common flash code for STM32F and STM32F0Vic Yang2014-10-157-431/+486
| | | | | | | | | | | | | | This is a preparatory work for the following change for write protection support on STM32F0. BUG=chrome-os-partner:32745 TEST=make buildall BRANCH=samus Change-Id: Ic4deea06e26c4a6ac024a5388e1a5783b40e9876 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222660 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* charge_manager: Add module for managing battery charge limitsShawn Nematbakhsh2014-10-153-0/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | charge_manager is intended to manage charge limits from various tasks (typically PD charge tasks and USB / BC 1.2 charge tasks). These tasks can update the charge limit of a port by calling charge_manager_update (thread-safe function). If the charge limit has changed, charge_manager_refresh will be queued as a deferred task, which will select the "best" charge port and set the proper charge limit. In order to use charge_manager, a board needs to do the following: 1. Declare PD_PORT_COUNT in usb_pd_config.h 2. Implement board_set_charge_limit 3. Implement board_set_active_charge_port 4. Call charge_manager_update whenever the available charge on a port changes. BUG=chrome-os-partner:31361 TEST=Manual on samus_pd, with subsequent commit. Insert and remove various chargers, check console to verify PD charger always has priority and correct current limit is set based upon 'best' charger. BRANCH=samus Change-Id: Iede120b69e0b46ed329bcf9b7e07c39ba5e9f77b Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222723 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* lightbar: interpreter additions to encode other patternsEric Caruso2014-10-1525-141/+541
| | | | | | | | | | | | | | | | | | | | Makes a significant encoding change to existing opcodes and adds several opcodes to allow for encoding the more complicated patterns that we have on the lightbar (S0, etc.) as well as condense the ones we technically could encode but couldn't fit in the 192-byte footprint allotted to us (KONAMI). We need this to remove sequences from the EC code. BUG=chrome-os-partner:32203 BRANCH=ToT TEST=run test programs on hardware and lightbar simulator Signed-off-by: Eric Caruso <ejcaruso@chromium.org> Change-Id: I12fe908d3a43a924aa39f24ad66adbe53f7f38e1 Reviewed-on: https://chromium-review.googlesource.com/222949 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* lightbar: bring the TAP sequence in graduallyBill Richardson2014-10-154-2/+20
| | | | | | | | | | | | | | | | | | | With only four LED segments, it's confusing to indicate a power percentage by dimming the top segment unless you can see the indicator smoothly ramping up from all-off. This does that. Kind of pretty, if I say so myself. BUG=chrome-os-partner:29041 BRANCH=ToT, Samus TEST=make buildall Run "ectool lightbar demo on", then press the T key to invoke the pattern and the arrow keys to fake the charge state. Change-Id: Ib6a56aea56078b8c1fc9edddda469d7f41735ff7 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/223300 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* ryu: plankton: Increase PD task stack sizeVic Yang2014-10-152-2/+2
| | | | | | | | | | | | | | | | The PD task is using more space in the stack and I'm seeing frequent stack overflow on Plankton. On Samus, we already increased the stack size. Let's also increase this on Ryu and Plankton. BUG=None TEST=make buildall BRANCH=None Change-Id: I468985303b7fd38455dd1fed9db54544581c49cf Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/223368 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus: display battery status on lightbar on AC changeAlec Berg2014-10-151-0/+10
| | | | | | | | | | | | | | | Display battery percentage on the lightbar whenever AC status changes. BUG=chrome-os-partner:32894 BRANCH=samus TEST=Plug and unplug AC in S0 and in G3 and make sure that lightbar displays battery percentage each time Change-Id: I281c9242d185da06b0c778de12e4f6340779a840 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/223362 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* dingdong: Add USB Billboard class device.Todd Broch2014-10-152-0/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BRANCH=none BUG=chrome-os-partner:31193 TEST=manual Plug dingdong into samus and see: # lsusb -d 18d1:5011 -v Bus 001 Device 013: ID 18d1:5011 Google Inc. Device Descriptor: bLength 18 bDescriptorType 1 bcdUSB 2.01 bDeviceClass 17 bDeviceSubClass 0 bDeviceProtocol 0 bMaxPacketSize0 64 idVendor 0x18d1 Google Inc. idProduct 0x5011 bcdDevice 2.00 iManufacturer 1 Google Inc. iProduct 2 Dingdong iSerial 0 bNumConfigurations 1 Configuration Descriptor: bLength 9 bDescriptorType 2 wTotalLength 10 bNumInterfaces 0 bConfigurationValue 1 iConfiguration 3 dingdong_v1.1.2338-562101b bmAttributes 0x80 (Bus Powered) MaxPower 500mA Binary Object Store Descriptor: bLength 5 bDescriptorType 15 wTotalLength 73 bNumDeviceCaps 2 FIXME: alloc bigger buffer for device capability descriptors Device Status: 0x0000 (Bus Powered) Change-Id: Icfc2e7eab9c88d6c8a05a33782213717e64ddcf0 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/223003 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: implement source recovery time after hard resetAlec Berg2014-10-151-0/+8
| | | | | | | | | | | | | | | | | | | | | | Implemented source recovery time following a hard reset. According to the spec: After a hard reset, the source must dissipate output voltage to vSafe5V. After establishing the safe voltage condition on VBUS, the power supply shall wait tSrcRecover before powering VBUS to vSafe5V. BUG=none BRANCH=samus TEST=plug in a type-c to type-a adapter to samus. then issue a hard reset from the console and verify that it takes nearly a second before samus re-enables vbus. Change-Id: Id21eb7cf03759b7ecd64ad11c3c57e66cf35370a Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222935 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: implement sink hard reset counterAlec Berg2014-10-151-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For a sink, when there is no source cap packet within SinkWaitCapTimer, then it sends a hard reset. Once the hard reset has been retried nHardResetCount times then it shall be assumed that the remote device is non-responsive, and we stop sending the hard reset. BUG=none BRANCH=samus TEST=Tested with a non-PD charger. When plugged in, we see two hard resets and then it stops VBUS 1, 1! C1 st3 C1 st14 C1 st2 HARD RESET! [494.906344 HC 0x100] C1 st3 C1 st14 C1 st2 HARD RESET! [495.668624 HC 0x100] C1 st3 > adc C0_CC1_PD = 20 C1_CC1_PD = 1783 C0_CC2_PD = 36 C1_CC2_PD = 21 V_BOOSTIN = 5329 > Change-Id: Ib0fc49642aba754015b8055cf1971577b48ac058 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222853 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: samus: ryu: add back in Vconn support correctlyAlec Berg2014-10-159-8/+43
| | | | | | | | | | | | | | | | | | | | Add support for enabling Vconn on Raiden ports by defining CONFIG_USBC_VCONN. This is enabled by default for ryu, samus, and fruitpie. BUG=chrome-os-partner:30445 BRANCH=samus TEST=Load onto samus. Make sure we can still charge from zinger. Plug in type-A to type-C adapter with pulldown and see that samus becomes power source. Do a gpioget and verify that only one VCONN GPIO is enabled (low), and the VCONN that is enabled is opposite of the polarity queried by pd 1 state. Try both ports, both polarities and make sure the correct VCONN gpio is enabled. Change-Id: Icea4c18b9c813cf7e8e21fd4f455bbd5fb4dbc91 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222850 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: hoho: de-assert PD_SBU_ENABLE at boot.Todd Broch2014-10-141-1/+1
| | | | | | | | | | | | | | Per alternate mode this GPIO should not be enabled until alternate mode has been successfully entered. BRANCH=none BUG=chrome-os-partner:31192 TEST=manual, compile & boot on hoho gpioget PD_SBU_ENABLE = 0 Change-Id: Ide2a47851f30812b289221e302a930134a58a8a0 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/223159 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus: Add define for EVT3Duncan Laurie2014-10-141-0/+1
| | | | | | | | | | | | | New board id for EVT3 (aka EVT2C, aka TOO_MANY_EVT) BUG=chrome-os-partner:32359 BRANCH=samus TEST=emerge-samus chromeos-ec Change-Id: I6cf162c2a1bac812ca1431597e80bb403163fa54 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/223078 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* samus: Change 3.3DSW_GATED to enabled in S0 and disabled in S3Duncan Laurie2014-10-141-4/+6
| | | | | | | | | | | | | | | | | | Move the 3.3DSW_GATED rail to be enabled in transition to S0 and disabled in the transition to S3. This is the rail for the core regulator and temp sensors so it does not need to be enabled in S5. BUG=chrome-os-partner:32382 BRANCH=samus TEST=build and boot on samus, successfully suspend/resume and ensure that PP3300_DSW_GATED is turned off in S3. Change-Id: Ic47f81860e3f0cb7b5d81ba96181b7ee7cf72f66 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/223077 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* ectool: flashpd: Reboot PD after successful RW flashShawn Nematbakhsh2014-10-141-0/+10
| | | | | | | | | | | | | | | | Reboot the PD device after a successful flash so that it will boot into the new RW. This syncs the ectool PD update to the implementation in flash_pd.py. BUG=chrome-os-partner:31361 TEST="./ectool --name=cros_pd flashpd 0 1 ec.RW.bin", verify flashing succeeds and PD is rebooted after flash. BRANCH=samus Change-Id: I14e7dffe59fcc7ca678c76890dbc825df5b19862 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/223062 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* ryu: Disable pull-up on AP_IN_SUSPENDVic Yang2014-10-141-1/+1
| | | | | | | | | | | | | | | | There's already an external pull-up to PP3300. The internal pull-up has no use but provides a leakage path when the AP is off. BUG=chrome-os-partner:31762 TEST=Repeatedly power cycle Ryu. Check the system goes to S0/S5. TEST=Power off from the AP. Check the system goes to S5. BRANCH=None Change-Id: Id0ae966414de01e3a2b91314f661f37941175a87 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222625 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* discovery-stm32f072: discovery USB GPIO testAnton Staaf2014-10-146-12/+222
| | | | | | | | | | | | | | | | | | | | | | Wire up the discovery's four LEDs and one user button as GPIOs that can be written and read using the new USB GPIO driver. This also adds an extra tool called usb_gpio that provides control of GPIOs from the linux command line. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=cd board/discovery-stm32f072 ; make flash cd extra/usb_gpio ; make usb_gpio write 0x1e 0x00 Change-Id: I15115f82b15b6c35d1a34b83b7114a6bfa6a3d67 Reviewed-on: https://chromium-review.googlesource.com/218270 Reviewed-by: Anton Staaf <robotboy@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org>
* usb: export firmware versionVincent Palatin2014-10-117-7/+21
| | | | | | | | | | | | | | | | | | | | | | Remove the meaningless version string in iSerialNumber, which was incorrect since this string should be unique to a device if it exists. Export the firmware version string as the configuration string, so it's traceable to a given firmware build/sources. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=none TEST=make buildall from a workstation, do "sudo lsusb -v" and see the full version string exported as the configuration name. Change-Id: I557df2936421e2926ac0fc0003888370cec3e201 Reviewed-on: https://chromium-review.googlesource.com/222877 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* temp_metrics: add "--" when invoking ectool tmp006calSameer Nanda2014-10-111-1/+3
| | | | | | | | | | | | | | | | | | | ectool has switched over to using getopt for command line options parsing. This breaks temp_metrics' invocation of "ectool tmp006cal" command since some of the coefficients are negative and therefore start with "-". getopt treats that as another command line option causing ectool to barf. BUG=chromium:422160 TEST=On a Pixel issue "sudo start temp_metrics" and check /var/log/messages to ensure that no new messages such as "init: temp_metrics main process ended, respawning" show up. BRANCH=none Change-Id: I42232b3027ec6339814d226f1d8ab493e3420eea Signed-off-by: Sameer Nanda <snanda@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222845 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* twinkie: add config to behave as a PD message injectorVincent Palatin2014-10-117-7/+338
| | | | | | | | | | | | | | | | | | | | | | | Add a compile-time configuration to make Twinkie behave as a USB Power Delivery consumer/provider device rather than a transparent sniffer. To use it, edit board/twinkie/ec.tasklist: enable the PD task and comment out the SNIFFER task. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=connect it to a Fruitpie and use "pd charger" command on Twinkie console, see the Fruitpie receiving the source capabilities and answering. Change-Id: Ic2b4ba2d166ea1d3f5f9be410453a030a4ee7b68 Reviewed-on: https://chromium-review.googlesource.com/204168 Reviewed-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* pd: dingdong: Add displayport alternate mode.Todd Broch2014-10-112-0/+121
| | | | | | | | | | | | | | Largely a cut-n-paste of VDM related fuctions from hoho. BRANCH=none BUG=chrome-os-partner:31193 TEST=manual, plug dingdong into samus and see it drive DP monitor. Change-Id: I9c96b9def4a0d0e64231948cb4617e5256a9fee5 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222600 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* hoho: Add USB Billboard class device.Todd Broch2014-10-114-1/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BRANCH=none BUG=chrome-os-partner:31192 TEST=manual Plug hoho into samus and see: # lsusb -d 18d1:5010 -v Bus 001 Device 007: ID 18d1:5010 Google Inc. Device Descriptor: bLength 18 bDescriptorType 1 bcdUSB 2.01 bDeviceClass 17 bDeviceSubClass 0 bDeviceProtocol 0 bMaxPacketSize0 64 idVendor 0x18d1 Google Inc. idProduct 0x5010 bcdDevice 2.00 iManufacturer 1 Google Inc. iProduct 2 Hoho iSerial 3 v0.001 bNumConfigurations 1 Configuration Descriptor: bLength 9 bDescriptorType 2 wTotalLength 10 bNumInterfaces 0 bConfigurationValue 1 iConfiguration 0 bmAttributes 0x80 (Bus Powered) MaxPower 500mA Binary Object Store Descriptor: bLength 5 bDescriptorType 15 wTotalLength 73 bNumDeviceCaps 2 FIXME: alloc bigger buffer for device capability descriptors Device Status: 0x0000 (Bus Powered) Change-Id: I1431829f926eaf86477b49591e9b0adf2b4cb3a6 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/221571 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: Enable alternate mode support for DP.Todd Broch2014-10-117-23/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | Change effects: 1. samus_pd: Acts as initiator of SVDM discovery once its reaches source ready and upon identifying UFP with display port alternate mode enters that mode. 2. hoho: Acts as responder for SVDM discovery providing its identity, svids and svid capabilities which are display port only. If asked to enter display port alternate mode it does. 3. fruitpie: Acts a initiator with mock display port mode. BRANCH=none BUG=chrome-os-partner:30645 TEST=manual, Plug hoho into samus_pd - see dpout - from console > typec 0 Port C0: CC1 451 mV CC2 111 mV (polarity:CC1) Superspeed DP1 Change-Id: I1a76767353a69baeceffa3e79c37dcea77b8337d Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/221354 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* usb: Groundwork for USB BOS & Billboard class descriptors.Todd Broch2014-10-114-3/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BOS (Binary Device Object Store) descriptor was added to the USB specification (3.0) to allow a richer set of device capability specific descriptors. The Billboard class is meant to expose (read-only) the status of USB devices capable of alternate mode functions. It's required to use the BOS descriptor type and at a high level looks like: - BOS Device Descriptor (5bytes) - Container ID Device Capability Descriptor (20bytes) - Billboard Device Capability Descriptor (44byte + 4 * numSVIDs) This CL adds: 1. Ability for Get Descriptor on BOS descriptors. Note hidden behind CONFIG_USB_BOS as these descriptors change USB device requirements to: - bcdUSB >= 0201 - no interface descriptors 2. structures for all BOS, Container & Billboard descriptor elements complete w/ CamelCase. BRANCH=none BUG=chrome-os-partner:32652 TEST=compiles with CONFIG_USB & CONFIG_USB_BOS enabled. Change-Id: I1b24bc728f2ebba7d91840801d2ebe576e240e7c Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/221570
* usb: allow reading descriptors larger than 64 bytesVincent Palatin2014-10-111-29/+50
| | | | | | | | | | | | | | | | | | | | When a control transfer requests a descriptor larger than 64 bytes, we need to do several IN transfers to get the proper packet sequence : SETUP IN IN IN .. IN OUT(null) Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:32652 TEST=set USB_STR_VERSION to "012345678901234567890123456789ABCDEF", then do "lsusb -v" on the host and check the USB transfers with the protocol analyzer. Change-Id: I6940095008cb2a34c6896b337c5eda4fa267adc1 Reviewed-on: https://chromium-review.googlesource.com/222700 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* pi3usb9281: Add function for translating registers to current limitShawn Nematbakhsh2014-10-102-0/+25
| | | | | | | | | | | | | | Decode Pericom registers to current limits. BUG=chrome-os-partner:32003 TEST=Manual on samus_pd. Insert 1A Apple charger, verify current limit is correctly detected as 1A. BRANCH=samus Change-Id: I310d9f22cef80e97c1734e6a56f0034ebe01df31 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222638 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Revert "pd: samus: ryu: add Vconn support and enable for samus and ryu"Alec Berg2014-10-108-40/+2
| | | | | | | | | | | | | This reverts commit 61dc089e23091a337a49f062d9058741a0ebf3bd. Samus polarity is wrong on VCONN due to naming mismatch. Will fix in a later CL, but should revert now to avoid problems. Change-Id: Icabcf2967e92caec94840df7e66a6658c7cde007 Reviewed-on: https://chromium-review.googlesource.com/222717 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Disable LEARN option during charger initMohammed Habibulla2014-10-105-1/+35
| | | | | | | | | | | | | | | When charger is initialized disable the LEARN option i.e. reenable charging on AC power BUG=chrome-os-partner:32320 TEST=set DUT to discharge on AC and then reflash EC. Ensure that charging begins again. BRANCH=none Change-Id: I3e83db27ab49548d5491548fa624899865c11bfb Signed-off-by: Mohammed Habibulla <moch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222644 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* usb_pd: Add port parameter to pd_set_input_current_limitShawn Nematbakhsh2014-10-1010-12/+13
| | | | | | | | | | | | | | | | Some platforms may need to take different actions depending on which port is requesting a limit. Add a new port parameter to the pd_set_input_current_limit API to accomodate this. BUG=chrome-os-partner:32003 TEST=Manual on samus_pd. Verify zinger charges battery. BRANCH=samus Change-Id: I1578252c751b3a80b4da6ca68e2a958934283cbf Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222621 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Pinky: Pull up AC_PRESENTAlexandru M Stan2014-10-101-2/+2
| | | | | | | | | | | | | | | We switched to an internal pullup in rev2 to conserve power. BRANCH=None BUG=None TEST=AC adaptor works, "gpioget AC_PRESENT" Change-Id: Idcf78d2632b9a43862539e45167173c175ac2aaa Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222593 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Chris Zhong <zyw@rock-chips.com> Tested-by: Chris Zhong <zyw@rock-chips.com>
* lightbar: Rename structs and macros for kernel cros_ec_commandsEric Caruso2014-10-096-39/+41
| | | | | | | | | | | | | | | This prepends EC_ a macro exposed in ec_commands.h, moves a macro into lbcc that is not used elsewhere, and changes lb_program structs to lightbar_program. BUG=None BRANCH=ToT TEST=make buildall -j Change-Id: I481562da72d91f846c64cf9af40338027641462c Signed-off-by: Eric Caruso <ejcaruso@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222406 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Don't hibernate on low battery if hiberante is not supportedVic Yang2014-10-091-0/+2
| | | | | | | | | | | | | | | | | If CONFIG_HIBERNATE is explicitly undefined for a board, the EC shouldn't hibernate when the battery is running low. Otherwise, the EC reboots because of the lack of hibernate support, and this actually burns more power. BUG=chrome-os-partner:32727, chrome-os-partner:32779 TEST=Drain the battery to 2% and verify the EC is behaving. BRANCH=None Change-Id: I2f9f5fd8fb4b5be4d8da113da4ef26c062869a07 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222615 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: samus: ryu: add Vconn support and enable for samus and ryuAlec Berg2014-10-098-2/+40
| | | | | | | | | | | | | | | Add support for enabling USB type-C Vconn by defining CONFIG_USBC_VCONN. Enable Vconn support for samus, ryu, and fruitpie. BUG=chrome-os-partner:30445 BRANCH=samus TEST=make buildall Change-Id: Ibe247286c96fd5a8fa12c88a4e3a5fea02997134 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222284 Reviewed-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: VDM Alternate mode support.Todd Broch2014-10-0912-46/+822
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Successfully communicate SVDM for discovery (identity, svids, modes) and enter mode. Still need to: - Add same functionality on when power role is sink too. - determine what connected events would require exit mode. - do proper cleanup on disconnect. - implement real display port 'enter' mode for samus_pd - test & cleanup Additionally the USB Billboard class functionality needs to be added but will likely do that in a separate CL. BRANCH=none BUG=chrome-os-partner:28342 TEST=manual, From fruitpie, [Image: RO, fruitpie_v1.1.2263-d79140d-dirty 2014-09-29 17:44:15 tbroch@brisket.mtv.corp.google.com] [0.000383 Inits done] C0 st2 Console is enabled; type HELP for help. > [0.250551 USB PD initialized] pd dualrole source C0 st8 > [8.366335 PD TMOUT RX 1/1] RX ERR (-1) [8.478308 PD TMOUT RX 1/1] RX ERR (-1) [8.590280 PD TMOUT RX 1/1] RX ERR (-1) C0 st9 Switch to 5000 V 3000 mA (for 3000/3000 mA) C0 st10 C0 st11 C0 st12 8.867593] SVDM/4 [1] ff008081 340018d1 00000000 17000008 8.867906] DONE 8.871006] SVDM/2 [2] ff008082 ff010000 8.871224] DONE 8.875092] SVDM/7 [3] ff018083 00100081 00000000 00000000 00000000 00000000 00000000 Entering mode w/ vdo = 00100081 8.875492] DONE 8.878435] SVDM/1 [4] ff018144 8.878612] DONE > pe 0 dump SVID[0]: ff01 [0] 00100081 [1] 00000000 [2] 00000000 [3] 00000000 [4] 00000000 [5] 00000000 MODE[0]: svid:ff01 mode:1 caps:00100081 From hoho, [Image: RO, hoho_v1.1.2263-d79140d-dirty 2014-09-29 17:54:59 tbroch@brisket.mtv.corp.google.com] [0.000375 Inits done] C0 st2 Console is enabled; type HELP for help. > [0.250542 USB PD initialized] C0 st3 [0.264637 PD TMOUT RX 1/1] RX ERR (-1) Request [1] 5V 3000mA C0 st4 C0 st5 C0 st6 0.487451] SVDM/1 [1] ff008001 0.487628] DONE 0.491190] SVDM/1 [2] ff008002 0.491346] DONE 0.494510] SVDM/1 [3] ff018003 0.494667] DONE 0.498777] SVDM/1 [4] ff018104 0.498934] DONE Change-Id: I5e2b7802c66b8aaad97e5120dca7a02820086bc1 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/219513 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* zinger: Remove references to SHA1 hashShawn Nematbakhsh2014-10-097-18/+15
| | | | | | | | | | | | | | | | The PD protocol no longer uses a SHA1 RW hash. Instead, it uses the first 20 bytes of the SHA-256 hash. Update constants and comments accordingly. BUG=chrome-os-partner:31361 TEST='make buildall -j' BRANCH=samus Change-Id: Ice74b841dbd1d81205c1ef0079a5e18fca2153b6 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222446 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* lightbar: extra test programEric Caruso2014-10-091-0/+0
| | | | | | | | | | | | | | Gets a little more coverage on the SET_COLOR control operand. BUG=None BRANCH=ToT TEST=On hardware and simulator. Should appear exactly the same as rainbow-shift.bin. Change-Id: Id9c9948ae178884180e4d42e4fcceb58218423f8 Signed-off-by: Eric Caruso <ejcaruso@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222004 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* samus: start fans a little sooner to keep things coolBill Richardson2014-10-091-2/+1
| | | | | | | | | | | | | | | | | | | This lowers the CPU temp at which the fans start up, from 55C to 43C. It also increases the slope a bit, so that they run a little faster as well. BUG=chrome-os-partner:32260 BRANCH=ToT,samus TEST=manual Visit www.fishgl.com/?full both before and after this CL. Before, the keyboard got a little too warm. After, the fans come on sooner and the keyboard is cooler. Change-Id: I5c4947c5d2bb4a28c0ac449e109e2bd1af84068c Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222171 Reviewed-by: Sameer Nanda <snanda@chromium.org>
* ectool: replace thermal_threshold_version with ec_cmd_version_supportedMohammed Habibulla2014-10-081-58/+12
| | | | | | | | | | | BUG=none TEST='ectool thermalget' works as expected BRANCH=none Change-Id: Ie225ef0aaeae913162e8cd6c56193dedd9f56f2f Signed-off-by: Mohammed Habibulla <moch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/221745 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* dingdong: Initial board and USB PD support.Todd Broch2014-10-0811-4/+380
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allows dingdong to receive initial USB PD communication (source capabilities payload) and with some manual manipulation (see 'TEST=') drive DPout. CL is based heavily off hoho dongle where all files were copied from board/hoho: 7b1e58c ectool: Add host command support to set fan RPM for each fan separately Files gpio.inc, board.h & board.c were modified but others should be identical. BRANCH=none BUG=chrome-os-partner:31193 TEST=manual, When attaching dingdong to samus_pd and configured via 'pd dualrole source' I see following on samus_pd console: C1 st9 Switch to 5000 V 900 mA (for 900/900 mA) C1 st10 C1 st11 C1 st12 showing power constract and transition to SRC_RDY: > pd 1 state Port C1, Enabled - Role: SRC Polarity: CC1 State: SRC_READY > typec 1 dp Also if I connect in CC1 configuration and get access to dingdong console I can > gpioset PD_SBU_ENABLE 1 And see dingdong drive external monitor Change-Id: I30ef6f8503a3fb015cfb8806bc36fb98f5150e40 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/221913 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* stm32f: stm32f0: guard hibernate function with CONFIG_HIBERNATEVic Yang2014-10-083-0/+6
| | | | | | | | | | | | | | If CONFIG_HIBERNATE is explicitly undefined for a platform, we shouldn't try to hibernate. BUG=chrome-os-partner:32727 TEST=None BRANCH=None Change-Id: Id0f93a3a694065478373e364d82589ff08e7d980 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222013 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32f0: fix potential hang in adc initializationAlec Berg2014-10-082-16/+18
| | | | | | | | | | | | | | | | | | | | | | Fix bug that can cause ADC initialization to hang and eventually watchdog. Problem was that you need at least 4 ADC clock cycles between end of ADC calibration and enabling ADC (setting ADEN). Fix is to (1) move some ADC configuration to between end of cal and setting ADEN, and then just to be safe, (2) continually set ADEN until we see ADRDY (ADC ready). See bug report for more information. BUG=chrome-os-partner:32561 BRANCH=samus TEST=load onto a samus that regularly has ADC problems on boot. Using power+refresh verify that without this change PD hangs some of the time, and with this change it never hangs. Change-Id: Ifa4c3240ad7e1612647cc74e2105e6545ed19db4 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/221984 Reviewed-by: Vic Yang <victoryang@chromium.org>
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