| Commit message (Collapse) | Author | Age | Files | Lines |
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BUG=none
TEST=none
Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155099
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Owners-Override: Jora Jacobi <jora@google.com>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
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Sarien factory branch is used to build ISH FW, and this needs to be as
up to date as possible for ISH. There have been many ISH and driver
commits on R75 that also need to make it to the sarien factory branch.
Just pull everything over to the factory branch since the platform/ec
code in the factory branch is only used to build ISH.
BRANCH=none
BUG=b:130614915
TEST=build arcada_ish on factory branch
Change-Id: I5c6b1ecea60fd67203e5750820f9d95f6d50c59d
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Use the debounced lid switch state for lid close instead of the raw
gpio.
BRANCH=none
BUG=b:126861777
TEST=tablet mode state is cleaner around 0 degrees
Change-Id: I46d7e2ed7fa0af7f276662e5136613caaed539f7
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1644213
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Reload the watchdog timer immediately after exiting from D0ix before
re-enabling the reset of the IRQs.
Also re-enable all ISRs in a batch while interrupts are disabled to
limit the number of context switched if multiple interrupts are pending.
BRANCH=none
BUG=b:133190570
TEST=let arcada enter and exit D0i[0123] without issue for a couple of
minutes. There are not adverse affects of this change.
Change-Id: I3ef5878b0618a0c1858664cad061d415329d4302
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1644212
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This adds a relevant config option, as well as implementation for a
max-retries mechanism on the watchdog timer. Included is an
implementation for ISH which counts persistent data storage and halts
when the max-retries is exceeded.
BUG=b:132059981
BRANCH=none
TEST=observed system halt after 4 resets, then re-enable once we had a
successful reset
Change-Id: I7b443d9a20a474b294d494c5b6046a38eaf6ff12
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1643439
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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Move persistent data definitions to a structure and have linker script
define the address of the symbol into the AON ROM (persistent data
storage). Use the magic number "ISHd" to verify persistent data
storage and copy to static memory when valid. Commit changes from the
local copy during reset.
BUG=b:133779707,b:133647823,b:132059981
BRANCH=none
TEST=power-on is only reset flag under cold reset, panic data
persists, watchdog reset produces correct reset flags, UART always
printing system info on boot
Cq-Depend: chromium:1642281
Change-Id: I65a458cc2656f8fe26361ef2117ceb5439edff6c
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1643438
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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In order for chromeos-ish ebuild to run tests, it must run the fuzz
tests, which are not related to ISH features, and introduce a lot of
library dependencies into the ebuild.
Provide two new targets: runhosttests and runfuzztests to allow the
host tests to be run separately. runtests (and buildall) remain the
same.
BUG=b:134446400
BRANCH=none
TEST=ran new targets, they functioned as intended
Change-Id: Idba7fcfe707caeb0e51ce0c38caeac9da87e3baf
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1643437
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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ish_dma_page was intended to be used in the aontaskfw implementation,
but we never used it. Remove the unused code.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I33983a4e6c6de082078b8b6b59519fbc095d8022
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1631588
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1643436
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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When starting to send UART data, we do not need to invoke the ISR for
the UART. That only needs to be invoked if there is incoming RX messages
(which it still is invoked) or the FIFO can accept more data and was
full before.
BRANCH=none
BUG=none
TEST=console input and output still works and takes much less time.
Change-Id: Ib05c66ee704aad2d93836709bc6b706c627285c5
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1634620
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1643435
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Ensure that 360-degree-hall sensor is hooked up to the tablet mode ISR,
which should in turn ignore any weird lid angle calculations when the
hall sensor is active (i.e. lid is at 360 degrees)
BRANCH=R75
BUG=b:131785573
TEST=arcada does not have spurious edges on the NB_MODE# signal when
the lid is all the way open in 360 degree mode.
Cq-Depend: chrome-internal:1329664
Change-Id: I1756bd909e5ecba7caa4565376f98f6d0dad6b06
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1631304
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Change drv_data pointer to st_private_data, to make LIS2MDL driver
compliant with other ST driver.
In standalone mode we have:
+--- lis2mdl_private_data ---+
| struct mag_cal_t cal; | <-------- LIS2MDL_CAL(s)
| | |
| struct stprivate_data data;| <-------- s->drv_data
+----------------------------+
BRANCH=None
BUG=b:132288982
TEST=Check scale returns 0.000625000
Checks figure-8 calibration is working
Checks CTS verifier test "Magnetic Field Measurements Tests" pass.
Change-Id: Iaba99b50cb0bf9bfc76f67cef0da8843a86f4838
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1616884
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
(cherry picked from commit 99900cae2fa4e17b6c1433111f4c142ebf27c024)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1631303
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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BUG=b:129159505
BRANCH=None
TEST=Ran Android CTS
Fixes event out of order errors in CTS.
This is fixed by doing the spreading on the ec. A new queue is
used (data_queue) and in place of the old call to
motion_sense_fifo_add_data we now add the event to the queue
and increment the sensor's sample count. At the caller
(load_fifo) we then figure out the window (time between the
last interrupt and the read) and the period by dividing the
window by the number of samples (this is done per sensor).
If the period is larger than the odr, then the odr is used
(this helps with accuracy). Events are now spread between the
known time the first entry was added and the read time.
Change-Id: I7094a719c76b4b08a758d053e5dfbdba0a30684b
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1620792
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1626323
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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BUG=b:129159505
BRANCH=None
TEST=Ran Android CTS
Fixes missing event errors in CTS. This is done by updating the
last_fifo_read_ts and checking the interrupt GPIO. If we find that
the GPIO is still low at the end of the read, that means that we've
gotten new data while reading and never fully empties the FIFO. We
know this must have happened some time between the time we read the
count and when we were reading the FIFO, for now we'll use the upper
bound of this to be safe.
Change-Id: I0461f9d2703a3801e57e7769fbfe0e8de750706a
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1620791
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1626322
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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This changes allows each board to add a custom configuration for the
sensors. In this case particularly setting the GPIO enum that is used
for the interrupt signal in the lsm6dsm.
BUG=b:129159505
BRANCH=arcada
TEST=I ran `make buildall` since this change isn't used yet it doesn't
affect run-time behavior.
Change-Id: I4a2d5e097d5fd8a45af591a24c4e6e917865a093
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1621747
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1626321
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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BUG=b:129159505
BRANCH=arcada
TEST=I ran `make buildall` since this change isn't used yet it doesn't
affect run-time behavior.
Change-Id: I01857d679b800f9b53762c659ebd9a018cbf16db
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1612251
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1626320
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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This commit re-writes the power manangment statistic collection and
idlestats command to no longer use conditional compilation, and to
reduce repetitive code.
BUG=b:132178013,b:132929262
BRANCH=none
TEST=observed output of idlestats command on arcada_ish, everything
appears to be normal
Change-Id: I3075eba2ae3f681a2d7d1891f5014de4b6db24a2
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1617079
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1626319
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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If the 360 degree hall sensor is active, then we should remain in tablet
mode even if the lid angle says we are 1 degree since an angle of 360
could wrap around to 1 degree.
Also ensure that tablet mode always gets initialized to the correct state
at startup (by setting initial value to -1)
BRANCH=R75
BUG=b:131785573,b:132178305
TEST=NB_MODE# on arcada does not flutter when the device is at 360
degrees with CL stack.
Change-Id: I962a9c23205766080a65d741c6c425452d9de608
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1597189
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1625785
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%ld is for signed numbers, but these are unsigned.
BUG=b:132929262
BRANCH=none
TEST=used idlestats command on arcada, verified correct output
Change-Id: Iffe405ae0d62159d8036248593ed0993e7a5742a
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1617068
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1625784
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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Fix the rotation of the magnetometer measurements.
BRANCH=None
BUG=b:128619310
TEST=Compare raw magnetometer data with pixel 3
Change-Id: I3fa407dd4dcc825cc521c8e49a63a635e45f9081
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1612256
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1625783
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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When we switched to using REG32 macros for registers, we made
a mistake in using address of LAPIC's ISR.
The original CL that changed this was CL:1586458
BRANCH=none
BUG=none
TEST=Tested on Arcada platform
Change-Id: Ia64806a4cb0fa5d150b41407b0f6c9f34f0168e8
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1611746
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1615652
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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In order to implement watchdog reset counter, we need to be saving and
restoring reset flags. b:132457636 explains the details of the memory
layout chosen for the soft-register.
BUG=b:132366384,b:132457636
BRANCH=none
TEST=reset arcada_ish using: `reboot' command, watchdog expiration,
and cold-reset, observed the correct value for "reset cause" printed
during boot
Change-Id: I84b965803d37703fac6494fb55a97c674ce64b89
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1606074
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1615651
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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Currently the panic data is placed in a region that conflicts with the
aontaskfw stack. With the extended ROM space, we can put the panic
data in a safer location.
BUG=b:132457636
BRANCH=none
TEST=ran 'crash divzero', observed the panic data copy across reset
without any issues
Change-Id: I876f3f071e000017c8f2ee744838711da928857c
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1610998
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1615650
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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We need to reserve some space in AON persistent memory not to be used
by the shim loader. This memory will be used for panic data, reset
flags, and watchdog reset counter. We can reduce the size of the panic
data for further soft-registers, as needed.
Each of these things will be moved into the reserved section in a
child CL.
BUG=b:132457636
BRANCH=none
TEST=entered d0i0, d0i1, d0i2, d0i3, and rebooted to test aontaskfw is
working
Change-Id: I41f39d28a6b5a3424f1c89b0e0884e72df04225f
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1610997
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1615649
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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currently the GPIO interrupt mask register and status register are
not initialized on warm reset. so some interrupts can be enabled
even before corresponding things are ready.
this patch disables all GPIO interrupts and clears pending interrupts
during gpio initialization(gpio_pre_init()).
BRANCH=ish
BUG=b:130717887
TEST=tested on Arcada platform
Change-Id: I01c237f667c7a3b6d1eb63d81c9ab604a6213453
Reviewed-on: https://chromium-review.googlesource.com/1611749
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1615487
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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This adds a firmware status update to FWSTS_FW_IS_RUNNING during boot.
BUG=b:132060059
BRANCH=none
TEST=Observed firmware status is 7 (IS_RUNNING) during boot before
HECI ready.
Change-Id: If41c86838a956023754be960472b8c641416b7c9
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1597674
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1615486
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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BRANCH=none
BUG=none
TEST=ISH still reset properly on arcada
Change-Id: I08a5935c5e8d1728e2984cbc70d75e380eb66f55
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1601349
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1615485
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When we switched to using REG32 macros for registers, we also changed
the math for the offset of the lapic. Fixing the pointer math.
The original CL that changed this was CL:1586458
BRANCH=ish
BUG=none
TEST=ISH runs normally
Change-Id: I1beea99ede496a2eee2adf96adeec21b3f1e1fd4
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1600158
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1615484
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Currently we missed some FW status updates that are used by host in
taking critical action.
BUG=b:132060059
BRANCH=none
TEST=tested on Arcada platform
Change-Id: I7ad607869f821eae99e37704ab3d6567d180aadd
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1601780
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1615483
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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currently functions to check the status of ilup(IPC link up)
and hup(HECI up) are changing values of FW status which is bug.
BRANCH=none
BUG=none
TEST=tested on Arcada platform
Change-Id: I1839304af619a3ee5a0856fe83560aa21a99e60a
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1601779
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1615482
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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The sensor interrupt signal is 3.3V not 1.8V and
ISH GPIO does not support 3.3V away. This was benign but incorrect.
BUG=none
BRANCH=none
TEST=sensor still work
Change-Id: I0335c5c65f8d6a52f4c7df4018133b46d98bca39
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1602491
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1609612
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ISH PMU does not support both-edge interrupt triggered gpio configuration.
If both edges are configured, then the ISH can't stay in low power mode
because it will exit immediately.
As a W/A, we scan all gpio pins which have been configured as both-edge
triggered, and then temporarily set each gpio pin to the single edge
trigger that is opposite of its value, then restore the both-edge
trigger configuration immediately after exiting low power mode.
BUG=b:132001235
BRANCH=none
TEST= tested on arcada platform, console should freeze after entered low
power mode
Change-Id: I83a43d9fbee6cfd1a6820bdb44c1446f109ffb32
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1600310
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1609611
Commit-Queue: Jett Rink <jettrink@chromium.org>
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Update command line usage help string for ectool to specify cros_ish
instead of cros_sh.
BRANCH=none
BUG=none
TEST=see usage string update
Change-Id: I52f36b88598af980788eec8a1ed15160ba0f1175
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1605219
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1609610
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watchdog_warning implements similar functionality to exception_panic,
but worse, as the value it prints for EIP is wrong, and it does not
have the no-double-panic logic of the panic handler. This commit
removes watchdog_warning and integrates the relevant functionality
into exception_panic.
BUG=b:129983997
BRANCH=none
TEST=observed watchdog reset with 'waitms 10500'
Change-Id: I78375337aa85be5424850e29a8204c409384d019
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1599732
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1609609
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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ECOS will reload watchdog in hook task for every HOOK_TICK_INTERVAL
time, and this will make HPET timer 1 wakeup ish. Therefore, we do not
need to disable watchdog during D0ix.
D3 and reset prep flow still need disable watchdog.
BUG=b:132112137
BRANCH=none
TEST='waitms 10500' console command can trigger watchdog timeout and
ish reboot
Change-Id: I11aad5ece0ce96bc53738512290c1e42bf175479
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1598713
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1609608
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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BRANCH=None
BUG=b:128619310
TEST=Validated that iio:device4 is present
TEST=Validate that cat **/iio:device4/in_magn_*_raw prints correct
values
TEST=Ran some CTS tests and verified magnetometer tests pass.
TEST=Opened an android compass app and raw magnetometer reading
app and verified that data is correct.
Change-Id: I79ff5ba8de12686d61e7701ac83689924c4de6c4
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1535428
Commit-Ready: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1609607
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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IMU Accel and Gyro matrices should be identical.
BUG=b:132110508
TEST=testing "CTS verifier Gyroscope Measurement Test"
Test was still failing when done manually, but the deltas were due to
user error not invalid axis.
BRANCH=master
Change-Id: I29f790385d4203f326bceb9a5320b0c833de7b65
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1597965
(cherry picked from commit b8b8d41c4fe01cb068f2175831bc42e21e54bb1f)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1609604
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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I'm a screw-up and forgot this in CL:1578435. Since
ish_fwst_is_hup_set is not used (yet), this did not cause any issues.
BUG=b:130573158,b:132060059
BRANCH=none
TEST=make buildall -j
Change-Id: I38a25a648b2235bade143fd20acb50a1318da992
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1596312
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1600192
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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This commit stores panic data across reset by storing panic data in
the last 256 bytes of AON memory (before AON ROM).
> crash divzero
========== PANIC ==========
Reason: Divide By Zero
Error Code = 0xFF00B60C
EIP = 0xFF010008
CS = 0x00010202
EFLAGS = 0x00103085
EAX = 0x00000001
EBX = 0xFF01B118
ECX = 0x00000000
EDX = 0x00000000
ESI = 0x00000000
EDI = 0xFF017E0E
Resetting system...
===========================
... ISH reset ...
> panicinfo
Saved panic data: (NEW)
Reason: Divide By Zero
Error Code = 0xFF00B60C
EIP = 0xFF010008
CS = 0x00010202
EFLAGS = 0x00103085
EAX = 0x00000001
EBX = 0xFF01B118
ECX = 0x00000000
EDX = 0x00000000
ESI = 0x00000000
EDI = 0xFF017E0E
BUG=b:129425206
BRANCH=none
TEST=see console output above (on arcada_ish)
Change-Id: I5c9e458b53076eafe7fa50ba851f2c6e863f2247
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1593418
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1598527
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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Some people have been bypassing the pre-submit checks:
confs=($(grep -Eor "\bCONFIG_[A-Z_]*" chip/ish/config_chip.h
| sort | uniq))
for opt in "${confs[@]}"; do
grep "$opt" include/config.h >/dev/null ||
echo "$opt is not defined in include/config.h!"
done
>>>
CONFIG_ISH_AON_SRAM_BASE_END is not defined in include/config.h!
CONFIG_ISH_AON_SRAM_BASE_START is not defined in include/config.h!
CONFIG_ISH_AON_SRAM_ROM_SIZE is not defined in include/config.h!
CONFIG_ISH_AON_SRAM_ROM_START is not defined in include/config.h!
CONFIG_ISH_AON_SRAM_SIZE is not defined in include/config.h!
CONFIG_ISH_SRAM_BANKS is not defined in include/config.h!
CONFIG_ISH_SRAM_BANK_SIZE is not defined in include/config.h!
CONFIG_ISH_SRAM_BASE_END is not defined in include/config.h!
CONFIG_ISH_SRAM_BASE_START is not defined in include/config.h!
CONFIG_ISH_SRAM_SIZE is not defined in include/config.h!
This is not good! This commit renames each of these to an existing
option defined in include/config.h, or undefs the relevant option in
include/config.h.
BUG=b:131749055
BRANCH=none
TEST=make buildall -j
TEST=script above reports no options which weren't defined
TEST=arcada_ish, (specifically power management, which was greatly
affected by this commit) functions as normal
Change-Id: Idfbd1105880174b5e160c47c4ec1d88c352d6bc6
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1592420
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1598526
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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If there's no timer event with current clksrc_high then last_deadline
should have the maximum value(0xFFFFFFFF) within the clksrc_high since
we always get timer event at every new clk_high.
BRANCH=none
BUG=none
TEST=Tested in Arcada platform
Change-Id: Iebea955b1aefc7d986b493a8be84b8fd25812441
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1593092
Commit-Ready: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1598525
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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libgcc provides 64bit division operation functions for 32bit arch,
such as '__udivdi3', link libgcc for general 64bit division on ish.
please note for critical performance required case, do not use these
functions from libgcc.
examples:
scale_us2ticks() in chip/ish/hwtimer.c
BRANCH=none
BUG=b:131590864
TEST=tested on arcada platform
Change-Id: I554e4c79f017e098ab83972928376f82fe7b92d1
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1587396
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1598524
Commit-Queue: Jett Rink <jettrink@chromium.org>
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1: extra timer 0 and timer 1 interrupt issue
no wait settling before write HPET generical interrupt status register,
may cause clear irq failed since value may write failed. this can cause
extra timer interrupt issue.
2: new comparator value update for timer 1 may failed
need wait settling before update timer 1 comparator value in
__hw_clock_event_set()
3: need check main counter value's validity after exit TCG low power mode
in low power TCG mode, the main counter value will become invalid, after exit
TCG mode, HW will restore it, but FW need to wait check if it's valid.
BRANCH=none
BUG=b:131515624
TEST=tested on arcada platform
Change-Id: I84586285ddb150cbae453f24dd172d238ec5b324
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1583664
Commit-Ready: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1598523
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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This is the final CL needed to resolve b:130573158.
BUG=b:130573158
BRANCH=none
TEST=arcada_ish functions as normal after changes
Change-Id: Ia4cc9bfa95938b9f57fc1cd241cd6821b42a3ce6
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1578435
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1598522
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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This is a good portion of the fixes needed for b:130573158, but we
still have the HECI registers to deal with. I have those in a separate
CL as they were giving me a significant amount of trouble.
BUG=b:130573158
BRANCH=none
TEST=arcada_ish is functioning as normal after changes
Change-Id: I9c209a329d61f7f55c260006cdffbfc705521195
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1586458
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1598521
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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We should be using the BIT(n) macro rather than (1 << n), as it
prevents errors, and makes the intended purpose a little bit easier to
read.
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: Ia727ac2f8e5abfb852ba78d5cba19d7c8af72839
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1567688
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1598520
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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I had forgotten to remove this from testing the panic handler. This is
a duplicate command of "crash divzero" and should be removed.
BUG=b:126691187
BRANCH=none
TEST=divzero console command is gone on arcada
Change-Id: Id37d3f3749bd4228045cca93a38315ee9c94b2e9
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1576837
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1598519
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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Hook up lid open interrupt correctly for arcada. This also ensures that
we ignore lid angle when the lid is closed because lid angle can report
360 degrees and falsely enter tablet mode.
BRANCH=none
BUG=b:131785573
TEST=lid open/closed is reported correctly on console with this change.
This also improves the tablet mode calculation, i.e. we do not go into
tablet mode when the lid is closed.
Change-Id: Idece81f3b03575941a22ab09485de7c3e7f85a8f
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1594952
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Print the protocol id of discarded messages on console
BRANCH=none
BUG=none
TEST=verified that protocol is being printed correctly
Change-Id: I089ad0c55b89a321edcbf24f25ec13e13fda60b3
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1594109
(cherry picked from commit 7d20b896677e10d7a350bb5b7ccaa9f9dcbc3423)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1594111
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Currently the motion sense loop bases its sleep time based on the
fastest active sensor. This method has several flaws:
1. It does not take into account any task switching overhead
2. With a mix of interrupt driven and forced sensors the sleep time gets
recalculated every time there is an interrupt causing the loop to
oversleep
3. If multiple sensors do not have rates that are in sync the timing of
the slower sensor will be off. For example if there was a sensor running
at 50 Hz and one running at 20 Hz the slower sensor would end up being
sampled at about 16 Hz instead of 20 Hz
This change calculates an ideal read time for every forced mode sensor
and calculates the sleep time based on the nearest read time. Every time
a sensor is read the next read time is calculated based on the ideal read
time not the actual read time so that reading does not drift because of
system load or other overhead.
BUG=b:129159505
TEST=Ran sensor CTS tests on arcada, without this change the
magnetometer was failing 50 Hz tests at about 38 Hz with 30% jitter
with this change in place 50 Hz was spot on with about 10% jitter
BRANCH=none
Change-Id: Ia4fccb083713b490518d45e7398eb3be3b957eae
Signed-off-by: Mathew King <mathewk@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1574786
Reviewed-by: Jett Rink <jettrink@chromium.org>
(cherry picked from commit d4e81a72de85ec7eecfecf687abd396632dd9e78)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1588075
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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This commit cleans up UART-related ISH code:
* Moving REG{8,16,32} macro usages into header files
* Changing ifdef logic in code to use IS_ENABLED macro
* Reduce repeated code in uart_defs.h
* Change hexadecimal masks in uart_defs.h to use BIT(n) macros
* Change disabling of UART2 to use common logic in uart_stop_hw
BUG=b:130573158
BRANCH=none
TEST=UART on arcada_ish is functioning as normal
Change-Id: Ia05feea2de8c14e44e4d3f9dd7c790bcb81cd1c0
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1582457
Reviewed-by: Jett Rink <jettrink@chromium.org>
(cherry picked from commit 5c87411b3a573eb8d9d6f3b63e099e7ab44cbd5b)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1585468
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
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