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* Clear OWNERS for factory/firmware branchfactory-test-13517.B-masterBrian Norris2021-09-107-21/+0
| | | | | | | | | | | | BUG=none TEST=none Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155114 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Owners-Override: Jora Jacobi <jora@google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* core/riscv-rv32i: rename atomic inc and decDawid Niedzwiecki2020-10-072-6/+6
| | | | | | | | | | | | | | | | | Rename atomic_inc function to deprecated_atomic_read_add and atomic_dec to deprecated_atomic_read_add to be more precise what the functions do. It is done as a part of porting to Zephyr, where atomic_inc increments by 1 and atomic_dec decrements by 1. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: Ide852ac32ce9027698cb937a06543da689c2e136 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428944 Reviewed-by: Jett Rink <jettrink@chromium.org>
* lindar: Add lid and base accel sensors for lindar and lillipupjerry2.huang2020-10-074-10/+179
| | | | | | | | | | | | | | | | | | | Lindar uses LSM6DS3TR as base accel sensor. Lillipup uses LIS2DE12TR as lid accel sensor,and LSM6DS3TR as base accel sensor. The Lindar and Lillipup use the combination firmware, so add lid and base accel sensors at the same time. BUG=b:169530752 BRANCH=none TEST=make buildall -j Signed-off-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com> Change-Id: Ibc8733991f763d2f5c25112bd97ea8f18a61261e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435170 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* Lillipup: Add volume key of GPIO settingjerry2.huang2020-10-072-7/+5
| | | | | | | | | | | | | | | | Add volume key of GPIO setting: 1.GPIO93 EC_VOLDN_MUTE_BTN_ODL 2.GPIO97 EC_VOLUP_BTN_ODL BUG=b:169530752 BRANCH=none TEST=make BOARD=lindar Signed-off-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com> Change-Id: Ibe5052ab8b8a95bc0a3b6d2e589f4ec929473331 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2434595 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* npcx9_evb: add board to support the npcx9's EVBCHLin2020-10-076-0/+391
| | | | | | | | | | | | | | | | | Add board npcx9_evb to verify npcx9's functions. BRANCH=none BUG=b:165777478 TEST=pass "make buildall" TEST=Check EC firmware can boot up the EVB; verify the functionality of required modules (Ex: ADC/GPIO/KBC/I2C/PWM/FAN/PSL/UART.) Signed-off-by: CHLin <CHLin56@nuvoton.com> Change-Id: I40d69bc4e698a03dc2229bb2eaea8e25ca090867 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435166 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com>
* SYV682X: Automatically set CONFIG optionsEric Herrmann2020-10-071-0/+6
| | | | | | | | | | | | | | | | Matching the SN5S330, automatically define the config options for the features the SYV682X supports, namely VCONN and CC orientation. It does not support SBU gating as the SN5S330 does. BUG=b:169188754 TEST=Test that VCONN is 5V when plugging in a PD device to Delbin BRANCH=None Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: I45572dcd19ff39ad68cc5c3e89cf3ed6503ac135 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2453908 Tested-by: Nathan Kolluru <nkolluru@google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: move thermal setting to variantScott Chao2020-10-0714-53/+682
| | | | | | | | | | | | | | | Since each variant may have different thermal sensor placement. Move thermal params and configs from baseboard to variant. BUG=b:170143672 BRANCH=none TEST=make -j BOARD=eldrid TEST=make buildall Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: Ie12f4cecad5f93c491e51a5fadfe856829f5b2e3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2449510 Reviewed-by: Keith Short <keithshort@chromium.org>
* dooly: add oz554 supportZick Wei2020-10-074-3/+41
| | | | | | | | | | | | | | This CL add oz554 support and add panel backlight config. BUG=b:168444976 BRANCH=puff TEST=make BOARD=dooly Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: I8bb8da1b8efdb819f0ff80d5f5954ad75aa2b7b7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2413674 Reviewed-by: Andrew McRae <amcrae@chromium.org> Commit-Queue: Andrew McRae <amcrae@chromium.org>
* dooly: update volume down gpioZick Wei2020-10-071-1/+1
| | | | | | | | | | | | | | | | This patch update volume down gpio for dooly to meet schematic. BUG=b:163574191 BRANCH=puff TEST=verify ec can get volume down button signal. Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: Ie9d1954f16f4052cf51632bee00ed5f4f89b09b2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2452132 Reviewed-by: Andrew McRae <amcrae@chromium.org> Reviewed-by: Nikolai Artemiev <nartemiev@google.com> Commit-Queue: Andrew McRae <amcrae@chromium.org>
* ec_commands: fix DP PIN assignment flagEric Yilun Lin2020-10-071-7/+7
| | | | | | | | | | | | | | | The DP PIN assignment mask was shifted by 1 bit since CL:2432452. BUG=b:170191143, b:167700356 TEST=ensure asurada DP out BRANCH=none Change-Id: I05806d2f49fa74c2bfc6f5fb27fb9afe5f8225d8 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2452131 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* Morphius: select CONFIG_DEVICE_EVENTJosie Nordrum2020-10-071-0/+1
| | | | | | | | | | | | | | | | | | Define CONFIG_DEVICE_EVENT to support events from devices attached to the EC.This is required to enable AP wake from trackpoint via device event to host. BUG=b:160345665 BRANCH=Zork TEST=None Signed-off-by: Josie Nordrum <josienordrum@google.com> Change-Id: I2217933381c6ae88bfc03b03621bb6d2c57edf55 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2430287 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org>
* Keyboard: Add AP wakeup to PS2 trackpoint interruptJosie Nordrum2020-10-071-0/+5
| | | | | | | | | | | | | | | | | | | | | Wake up AP for PS2 interrupt using Device Event as trigger. AP must have device event wakeup mask enabled and board must select CONFIG_DEVICE_EVENT in EC. This device event is only triggered when the chipset is suspended to avoid triggering SCIs in S0. BUG=b:160345665 BRANCH=Zork TEST=Wake from S3 by trackpoint Signed-off-by: Josie Nordrum <josienordrum@google.com> Change-Id: Ia431525ee8f572922c8f9bfe613d44e83308d9f8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2430288 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org>
* flash_fp_mcu: Add config zork, uart transport and gpiosBhanu Prakash Maiya2020-10-061-41/+112
| | | | | | | | | | | | | | | | | Zork devices have FPMCU connected to AP via UART. Changes in this patch will let developer flash STM32 in chip's bootloader mode via UART. BUG=b:162368367 TEST=1. Run script on Zork device and confirm firmware flash. 2. Run script on Hatch devices and confirm that SPI functionality is intact. Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Change-Id: I9464ae7602e2b6b21d7d31283c6c242a4d603fe5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2444457 Commit-Queue: Yicheng Li <yichengli@chromium.org> Reviewed-by: Yicheng Li <yichengli@chromium.org> Tested-by: Yicheng Li <yichengli@chromium.org>
* Fix incomplete rename (deprecated_atomic_clear -> deprecated_atomic_clear_bits)Jack Rosenthal2020-10-062-3/+3
| | | | | | | | | | | | | | | | CL:2428943 renamed deprecated_atomic_clear to deprecated_atomic_clear_bits, but missed these two cases, as they landed thru CQ after CL:2428943 passed the dry run. BUG=b:170132568 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I6fff582b2cf8dbf77bc8a136bc7fa81af30b2cc0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2452889 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Sean Abraham <seanabraham@chromium.org>
* core: rename atomic_clear to atomic_clear_bitsDawid Niedzwiecki2020-10-0633-88/+92
| | | | | | | | | | | | | | | | | | Change the name of atomic_clear to atomic_clear_bits to make to name more clear - the function clears only selected bits, but the name may suggest that it clears the whole variable. It is done as a part of porting to Zephyr, where atomic_clear zeros the variable. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I7b0b47959c6c54af40f61bca8d9baebaa0375970 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428943 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Madoo: Add thermistorsstabilize-rust-13514.B-masterKo_Ko2020-10-062-0/+27
| | | | | | | | | | | | | | | | This change adds the temperature sensors for madoo, which are hooked up to 2 of the ADCs. BUG=b:169729477 BRANCH=None TEST=build and test on madoo board. Can obtain value via ectool cmd. Signed-off-by: Ko_Ko <Ko_Ko@compal.corp-partner.google.com> Change-Id: Id57a669006db04f9a83ad3b6ebe65b2df7c80b11 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2437723 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Ko Ko <ko_ko@compal.corp-partner.google.com> Tested-by: Ko Ko <ko_ko@compal.corp-partner.google.com>
* BQ25710 : Change Voltage StepYongBeum.Ha2020-10-061-1/+1
| | | | | | | | | | | | | Voltage Step of MAX voltage is 8mV. BUG=b:169390177 BRANCH=None TEST=None Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I299ac62b62ebde802211e1a323b227e1a1d9b3c4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428359 Reviewed-by: Diana Z <dzigterman@chromium.org>
* it83xx/keyboard: enable push-pull for KSO2Dino Li2020-10-051-0/+3
| | | | | | | | | | | | | | | | | This change enables push-pull for EC's KSO2 if CONFIG_KEYBOARD_COL2_INVERTED is enabled (H1 inverts signal of column 2 to keyboard). BUG=b:169715234 BRANCH=octopus TEST= EC is able to drive KSO2 which connected to H1 to 3.3V. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I61e07a15be2c5275363f358bf539c3311305d845 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2437722 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Tested-by: James Chao <james_chao@asus.corp-partner.google.com>
* Ectool: Support printing typec status on older boardsDiana Z2020-10-051-2/+5
| | | | | | | | | | | | | | | When boards don't have the new TYPEC_STATUS host command running, fallback to the older USB_PD_CONTROL command to display information. BRANCH=None BUG=None TEST=on waddledoo with no TYPEC_STATUS command present, ensure that "ectool typecstatus <port>" prints port information Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I78fbc0414c0c6cb73b91285b6900a34287cdf5dd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432458 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Add event clear to TYPEC_CONTROLDiana Z2020-10-053-3/+24
| | | | | | | | | | | | | | | | | When the AP has finished processing events, it can use TYPEC_CONTROL to clear the specific events it has completed. This also fixes an issue with the control command structure byte alignment. BRANCH=None BUG=b:148816435 TEST=on waddledoo, plug in Apple dongle and clear SOP discovery event with "ectool typecontrol" Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I38d522f346bfd500b72109db46f78a9c135ce96e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432457 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Notify on SOP and SOP' discovery completeDiana Z2020-10-052-0/+24
| | | | | | | | | | | | | | | | | | | | | Notify the AP when the task has finished discovery. The AP doesn't need notification if nothing was found, but does need notification by transmit type as long as at least DiscoverIdentity was returned. BRANCH=None BUG=b:148816435 TEST=on waddledoo, verify: - events are 0 with nothing plugged in - events show SOP complete with Apple dongle - events show SOP and SOP' complete with TBT dock - events show SOP complete with Moshi (DiscoverIdentity only) - events show SOP complete with WooHub (Mode discovery will NAK) Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I5fcfc1ba2bde40c70400462dcc4efc2b7b60d0ca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432456 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Add events to TYPEC_STATUS host commandDiana Z2020-10-053-2/+8
| | | | | | | | | | | | | | Add retrieval of the event bits to the TYPEC_STATUS host command and ectool output. BRANCH=None BUG=b:167700356 TEST=on waddledoo, verify events show up in "ectool typecstatus" Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: If9f4f9b56acb6108c5f87f0d2ddf7a7d945f9403 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432455 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Add framework for per-port eventsDiana Z2020-10-053-0/+59
| | | | | | | | | | | | | | | The AP would like to retrieve events on a per-port basis, so add new tracking for those events, as well as the capability for non-PD tasks to retrieve and set those events. For the moment, the code just clears events on startup and event flags will be added in subsequent CLs. BRANCH=None BUG=b:148816435 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I9c2644141b4f5277ee54b4bf2c30087b51a87d8e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432454
* TCPMv2: Add PD_EVENT_TYPECDiana Z2020-10-051-4/+6
| | | | | | | | | | | | | | | | | | The kernel uses the EC_CMD_PD_HOST_EVENT_STATUS command after receiving notifications from the EC. TCPMv2 will be moving to track events in a per-port manner with the new EC_CMD_TYPEC_STATUS command, and the new PD_EVENT_TYPEC flag will indicate that the kernel should use this new command to retrieve more specific events. BRANCH=None BUG=b:148816435 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie76fc5abfbf2c433645577a61efdcce7f1dcc0c2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432453 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: Add TYPEC_STATUS commandDiana Z2020-10-055-52/+263
| | | | | | | | | | | | | | | | | | | | | | | The TYPEC_STATUS command will be deprecating the informational return from the USB_PD_CONTROL host command. It brings over the enablement, role, and connection information from the older command. Cable specifics are excluded as they are redundant with the discovery return. Information about the mux state is also added for convenience. Additionally, this moves enums and defines which are a part of our overall pd_* API to the ec_commands.h file to ensure consumers have the same field values available for interpretation as the EC. BRANCH=None BUG=b:167700356 TEST=on waddledoo, plug in chargers and dongles and ensure outputs from "ectool typecstatus <port>" match "ectool usbpd <port>" and "ectool usbpdmuxinfo" Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ic7afc0b282b88fdb34cb9a6feef22ad913bb4aae Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432452 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* Magolor: Undefine TCPC and charger EC commandsDiana Z2020-10-051-4/+1
| | | | | | | | | | | | | | Magolor is down to less than 500 bytes of free flash on ToT. Remove a couple of EC commands to free up enough space to build a while longer. BRANCH=None BUG=b:168608382 TEST=magolor builds with 2400 bytes of free flash Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id29beb71fcd9c97f6f099f9d3fe91cbaeaa83d22 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2446629 Reviewed-by: Justin TerAvest <teravest@chromium.org>
* npcx9: workaround the download_from_flash API of the booterCHLin2020-10-055-2/+181
| | | | | | | | | | | | | | | | | | | | The download_from_flash API in the booter is called to copy the RO/RW image from flash to code RAM when doing the sysjump. There is a bug in the npcx9 A1 chip. We have to workaround it with this CL and remove the bypass when A2 chip is available. BRANCH=none BUG=b:165777478 TEST=pass "make buildall" TEST="sysjump RO/RW" succeeds in the npcx9 EVB. Signed-off-by: CHLin <CHLin56@nuvoton.com> Change-Id: Id2babe9b9dbd36ca8b0450051d22632eb5bd4825 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435165 Tested-by: CH Lin <chlin56@nuvoton.com> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com>
* npcx: support enhanced PSL functions in npcx9CHLin2020-10-0511-29/+420
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. In npcx7, the PSL (hibernation) wakeup source only can come from physical PSL_IN pins. In npcx9, the LCT (Long Countdown Timer) module is introduced to support wakeup from a configurable timeout. 2. support PSL wakeup from the VCC1_RST pin. This function is disabled by default and enabled (and locked) in the firmware in the npcx9 A1 chip. In the npcx9 A2 chip, this function is enabled (and locked) by booter. 3. Support pulse mode and open drain (if pulse mode is enabled) for PSL_OUT pin. 4. support one PSL general-purpose output pin which is powered by VSBY. BRANCH=none BUG=b:165777478 TEST=pass "make buildall" TEST="hibernate 10", check EC wakes up from hibernate after 10 seconds. make sure the reset cause in the console is "power-on hibernate rtc-alarm" TEST="hibernate"; check EC wakes up from hibernate after pressing VCC1_RST button on the internal test board. Test=configure the PSL_OUT to pulse mode and "hibernate"; cut off VCC1 power; check EC can wake up from hibernate with any input event. Test=configure the level of PSL_GPO before hibernation; check the level is kept after entering hibernation. Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Signed-off-by: CHLin <CHLin56@nuvoton.com> Change-Id: I98ad41da8557222cf3d09fef9524880731cecde1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435164 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com>
* npcx: add ADC support for NPCX9 and remove the deassertion thresholdWealian Liao2020-10-053-30/+15
| | | | | | | | | | | | | | | | | | | 1. Two more ADC channels are added to NPCX9. 2. Remove the three de-assertion threshold detectors in the ADC module because this function is not very useful from the application point of view. 3. Add three more threshold event detectors (from 3 to 6.) BRANCH=none BUG=b:165777478 TEST=pass "make buildall" TEST=Read all ADC channels by the console command 'ADC'. Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I64cc9caf8be7e7546e161931ed42d0ea4dda4b47 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2434603 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com>
* asurada: enable discharge_on_acTing Shen2020-10-051-0/+1
| | | | | | | | | | | | | | | BUG=b:168767467 TEST=`ectool chargecontrol discharge` BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: Ic379149e0fca4b2817debb9b81988c2ba55b0215 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2439763 Reviewed-by: Yilin Yang (kerker) <kerker@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Tested-by: Yilin Yang (kerker) <kerker@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* power/mt8192: don't boot AP when wake from AC insertTing Shen2020-10-051-7/+19
| | | | | | | | | | | | | | | | | Implement the wakeup behavior defined in our spec: AC insert -> wake EC Lid open / Power button -> wake EC + AP BUG=b:163963220 TEST=Verify boot behavior matches the spec BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: Ifc225c07d9a9faf25cf99578d535e63f63fc9bff Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2437238 Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* charge_ramp: Don't use SW ramp for USB-C chargersEdward Hill2020-10-031-2/+7
| | | | | | | | | | | | | | | | | Don't use SW ramp for USB-C chargers (CHARGE_SUPPLIER_PD and CHARGE_SUPPLIER_TYPEC) since the slow ramp causes issues with auto power on. This means we rely on the chargers to be able to supply the full current they advertise. BUG=b:169634979 b:163864475 b:167257846 BRANCH=zork TEST=cutoff battery, plug ac, boot to OS Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I9b7ae79ebcfdf0e8b8b136555a907eef423361ac Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2445462 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* Revert "TCPMv2: Set mux state on updating partner's USB comm capability"Keith Short2020-10-031-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 181f23c9863e3350cb52c6e04490fbebd60e37eb. Reason for revert: The original change causes bugs b:169346513 and b:169935734 Original change's description: > TCPMv2: Set mux state on updating partner's USB comm capability > > On updating the port partner's USB communication capability, the mux > should also be configured into USB/disconnect mode accordingly. Hence, > this CL sets the mux setting according to the partner's USB capability. > > BUG=b:157163664 > BRANCH=None > TEST=Able to update the mux state on updating the port part USB comm > capability. > > Signed-off-by: Ayushee <ayushee.shah@intel.com> > Change-Id: Ic2d27e2a0af6dad54a875a589b85f8a5d583b5b4 > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2388972 > Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> > Reviewed-by: Keith Short <keithshort@chromium.org> BUG=b:169346513, b:169935734 BRANCH=none TEST=connect servoV4 to Volteer, confirm USB devices shown in kernel TEST=connect PD charger to port C1, verify charging starts Change-Id: I7bfda36a52aaa80c3faae1ab44b8b431431a2b97 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2445453 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* Revert "TCPMv2: Correct setting mux state on updating partner's USB comm"Keith Short2020-10-031-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit c370d201003e44f1a4a6a483903bbbe065664ee1. Reason for revert: The original change causes bugs b:169346513 and b:169935734 Original change's description: > TCPMv2: Correct setting mux state on updating partner's USB comm > > When the USB communication capabilities are enabled and if the port > receives partner's USB communication capability again after entering > an alternate mode, mux doesn't need to be updated. Hence, only the > mux with port partner's USB communication capability if it is in > disconnect state > > BUG=b:168453520 > BRANCH=None > TEST=Able to retain mux's state after entering a mode. > > Signed-off-by: Ayushee <ayushee.shah@intel.com> > Change-Id: I26af254b341c9f0c1cdc4369a50e16f9da329faf > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2407014 > Reviewed-by: Keith Short <keithshort@chromium.org> BUG=b:169346513, b:169935734 BRANCH=none TEST=connect servoV4 to Volteer, confirm USB devices shown in kernel TEST=connect PD charger to port C1, verify charging starts Change-Id: I11f0d5d2f944047d810a445a1dbcfd2cbe88e223 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2445452 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* npcx psl: reject hibernate request with timeoutCaveh Jalali2020-10-021-2/+7
| | | | | | | | | | | | | | | | Some Nuvoton NPCX chips support PSL (power state logic) to put the chip in a very low power state. When this feature is utilized, the alarm feature is off, thus it is not possible to hibernate for a specific period of time. Reject CLI requests to do so. BRANCH=none BUG=b:144427579 TEST=verified non-zero timeout is reject on volteer Change-Id: I17537b4724f03bd8f58ee81b80e374629c8b9b88 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2442037 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* Dedede: Check versus vSinkDisconnect on VBUS_REMOVEDstabilize-13505.1.B-masterDiana Z2020-10-022-2/+6
| | | | | | | | | | | | | | | | For variants using the charger Vbus ADC, add a check versus vSinkDisconnect to determine if the TC layer connection has been broken. BRANCH=None BUG=b:168831161 TEST=on waddledee, confirm we can reliably source 5V from a charger without erroneously detecting disconnect Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Icd06d91cd28db068c8cfa646152596d6eab80375 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2436581 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPMv2: Add VBUS_REMOVED levelDiana Z2020-10-015-10/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | For boards which use Vbus ADCs, add a VBUS_REMOVED check level. The level for VBUS_PRESENT should be used in any locations looking for "Vbus is present" on transition, but in order to correctly detect disconnection with a load on Vbus, VBUS_REMOVED (vSinkDisconnect) is required. TODO statements have been added for places where work will be needed to support vSinkDisconnectPD in the future. For boards detecting Vbus through an external chip, the levels will likely be indistinguishable due to the chips setting a lower threshold for disconnect than for connection. Unit test code has also been added to encourage new Vbus levels to be added to the mock, and remind developers to update all locations using the vbus_level enum. BRANCH=None BUG=b:168831161 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I04014ce54ec162dd9c62f545126d921c6d880741 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2436580 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* volteer: Enable SW charge rampingKeith Short2020-10-0115-1/+38
| | | | | | | | | | | | | | | | Enable CONFIG_CHARGE_RAMP_SW because hardware based charge ramping doesn't work on the ISL9241. BUG=b:169350714, b:168960587 BRANCH=none TEST=make buildall TEST=Connect 1.5A CDP device to Volteer and verify charge ramp from 0.5A to 1.5A over about 7 seconds. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I81e8a3913bd776d0d3fda6d294fdeabbde5df62a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438912 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* zephyr: shim in the timer moduleJack Rosenthal2020-10-016-1/+98
| | | | | | | | | | | | | | | | | | | | | | | | This enables building timer.c in the Zephyr shim. In addition, we provide definitions for the symbols __hw_clock_source_read64 and __hw_clock_event_get defined for Zephyr to provide times to the CrOS EC. The event timer does not make sense for Zephyr code, but we need it defined to prevent link errors (timerinfo uses it). Perhaps the solution to this is to add a new config option (e.g., CONFIG_EVENT_TIMER) which can be used to selectively enable/disable the event timer in the CrOS EC. But punting this work for now and just adding a fake definition. BUG=b:167590251 BRANCH=none TEST=compile for posix-ec, run gettime and timerinfo commands Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I58990a6295625f9c34ec080360470431b46155bd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427100 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: shim in util.cJack Rosenthal2020-10-011-0/+3
| | | | | | | | | | | | | Provides platform/ec utility functions. BUG=b:167590251 BRANCH=none TEST=compile posix-ec Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Ic6846e93dd5190b0db4d666e55ae185c4cc61392 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2442456 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: provide compatible config_chip.h and board.h filesJack Rosenthal2020-10-012-0/+33
| | | | | | | | | | | | | | | | | | | These include files are expected by the EC config system. For board.h, we intentionally leave it empty. For config_chip.h, we populate it with preprocessor guards that translate Zephyr config options to EC config options, and enable/disable some defaults for Zephyr. BUG=chromium:167590251 BRANCH=none TEST=compile common/timer.c with follow-up CLs Change-Id: I2294c6a296f69ae8d514b74ea29f288fe4a240fc Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427098 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: shim in the zephyr shell as the EC consoleJack Rosenthal2020-10-014-3/+154
| | | | | | | | | | | | | | | | | | | | | | | This provides compatible macros for DECLARE_CONSOLE_COMMAND, DECLARE_SAFE_CONSOLE_COMMAND, and DECLARE_CONSOLE_COMMAND_FLAGS. Note: the concept of command flags and command restriction are not enabled currently for Zephyr. We simply define everything for now. These macros use the Zephyr shell subsystem as the backend for commands. In addition, cprints, cprintf, and cputs have been redirected to the shell for CC_CONSOLE channel outputs, and printk for all other outputs. We will look at using Zephyr's logging subsystem instead of printk for the other channels in the future. BUG=b:167590251 BRANCH=none TEST=run "gettime" and "timerinfo" commands with follow-up CLs Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17caedcd0b84a21dd2b135312f683885eaf694af Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427097 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: implement atomic.hJack Rosenthal2020-10-011-0/+45
| | | | | | | | | | | | | | This implements a compatibility layer with the deprecated_* atomic operations using Zephyr's APIs. BUG=b:169151160 BRANCH=none TEST=compile timer.c in follow-up CL Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I49fa1afc28790ab14a91d472141a01e2370b24ac Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427096 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: disable DECLARE_HOOK and DECLARE_DEFERRED macrosJack Rosenthal2020-10-011-4/+8
| | | | | | | | | | | | | | | Going to guard this away, and then we can create more CLs later that actually get hooks working. BUG=b:16899177 BRANCH=none TEST=compile timer.c in follow-up CLs Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Id92850982aef360d3f5e774d30603d4fe1c30495 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427095 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* zephyr: make common.h compatible with ZephyrJack Rosenthal2020-10-011-0/+3
| | | | | | | | | | | | | | Zephyr provides definitions for these macros. Guard them away in the preprocessor so we don't get warnings about duplicate definitions. BUG=b:167590251 BRANCH=none TEST=no warnings in follow-up CLs Change-Id: If2ccb23878ee6cdffa004f95562ea6a24350e063 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427094 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: make IS_ENABLED compatible with shimJack Rosenthal2020-10-011-0/+22
| | | | | | | | | | | | | | | | | | | | | Since we are using Zephyr headers and EC sources together, we need to make an IS_ENABLED macro which is compatible with both the Zephyr concept of being enabled, and the CrOS EC concept (since we inherit many default options from config.h). The Zephyr concept of being enabled is defined, specifically only to the token "1". The CrOS EC concept of being enabled is defined, specifically to no tokens. Thus a macro which allows both concepts defines "enabled" as defined, either to no tokens, or the token "1". BUG=b:167590251 BRANCH=none TEST=compile common/timer.c in follow-up CLs Change-Id: Ieded05e65d0d7c27070f40ef1dd4d24db73b9de4 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427093 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: make task_id.h compatible with ZephyrJack Rosenthal2020-10-011-0/+10
| | | | | | | | | | | | | | | | Guard out parts of task_id.h which make the Zephyr build blow up. We don't have task lists defined for Zephyr, so we need to remove that. BUG=b:167590251 BRANCH=none TEST=compile common/timer.c in follow-up CLs Change-Id: Ie6682dd5771e0693874335609ba13a35da715428 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427092 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: make compile_time_macros.h compatible with ZephyrJack Rosenthal2020-10-011-0/+14
| | | | | | | | | | | | | | | Include sys/util.h in Zephyr, which provides the same definition of most of these macros. Guard the platform/ec implementations where appropriate. BUG=b:167590251 BRANCH=none TEST=compiles Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Icba8e1f7d846cc731ec3acf4f3472e108e4cd6f4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427091 Reviewed-by: Jett Rink <jettrink@chromium.org>
* config: add CONFIG_ZEPHYRJack Rosenthal2020-10-012-1/+21
| | | | | | | | | | | | | | This adds a new configuration option, CONFIG_ZEPHYR, which gets enabled during a build of the platform/ec Zephyr module. BUG=b:167590251 BRANCH=none TEST=compiles Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I157928720d9d6ec0b71c2138298f46c64723fe0b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427090 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: add base files for Zephyr moduleJack Rosenthal2020-10-014-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds the minimum files necessary for platform/ec to be considered a Zephyr module, as well as some of the discussed CMakeLists files from go/zephyr-shim. BUG=b:167590251 BRANCH=none TEST=Append platform/ec dir to ZEPHYR_MODULES, build for posix-ec To replicate: $ export ZEPHYR_TOOLCHAIN_VARIANT=llvm $ export ZEPHYR_BASE=... $ ZEPHYR_CHROME=... $ PLATFORM_EC=... $ cmake -S ${ZEPHYR_CHROME}/projects/experimental/posix-ec \ -B /tmp/zephyr-build \ -D ZEPHYR_MODULES="${ZEPHYR_CHROME};${PLATFORM_EC}" $ ninja -C /tmp/zephyr-build $ /tmp/zephyr-build/zephyr/zephyr.elf Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Id5eb4e4d3b761a9499e876dfe2178be7f7961e93 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427089 Reviewed-by: Jett Rink <jettrink@chromium.org>
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