| Commit message (Collapse) | Author | Age | Files | Lines |
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BUG=none
TEST=none
Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155119
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Owners-Override: Jora Jacobi <jora@google.com>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
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Add delay of 100 ms to consider minimum bootloader start time for stm32.
This fix prevents triggering stm32mon before bootloader is finished.
BRANCH=none
BUG=b:185074067
TEST=Multiple 'flash_fp_mcu <fpfw>'
Tested on coachz, nocturne and morphius boards
Change-Id: Ic60e9e67c29664ce22bfc66bec6eaf76ffc80454
Signed-off-by: Sujit Kautkar <sujitka@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2837485
Tested-by: Sujit Kautkar <sujitka@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Commit-Queue: Sujit Kautkar <sujitka@chromium.org>
(cherry picked from commit 8cff79c7f79da51e20bfd76f6e1e1b3465b63262)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2856928
Reviewed-by: Sujit Kautkar <sujitka@chromium.org>
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BRANCH=none
BUG=none
TEST=none
Signed-off-by: Craig Hesling <hesling@chromium.org>
Change-Id: Iece845abd9897abd1e341a8dbae6b0fe2aa85a29
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2686924
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713554
Tested-by: Sujit Kautkar <sujitka@chromium.org>
Reviewed-by: Sujit Kautkar <sujitka@chromium.org>
Commit-Queue: Sujit Kautkar <sujitka@chromium.org>
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Caveats
* Need to fix modalias for strongbad
* Need to fix driver binding so that the gpios are not reset
* Need to fix external nrst pull
BRANCH=none
BUG=b:145245345, b:172966748, b:179533783, b:179530529, b:179839337
TEST=emerge-strongbad chromeos-base/ec-utils-test
cros deploy dut1 chromeos-base/ec-utils-test
./flash_fp_mcu custom-strongbad-evt-image.bin
Change-Id: I33d8fee21a2afbf8f5c399e6cb47c2095d833f57
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2654737
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713553
Tested-by: Sujit Kautkar <sujitka@chromium.org>
Reviewed-by: Sujit Kautkar <sujitka@chromium.org>
Commit-Queue: Sujit Kautkar <sujitka@chromium.org>
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This helps identifying driver/device-tree configs that are tampering
with the nrst and boot0 pin states.
BRANCH=none
BUG=b:179530529
TEST=Deploy to coachz with driver that reset nrst and boot0 pins
Signed-off-by: Craig Hesling <hesling@chromium.org>
Change-Id: Ia5d603f8ce49022e48b7b1d623c3b2da6926a6ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2686579
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713552
Tested-by: Sujit Kautkar <sujitka@chromium.org>
Reviewed-by: Sujit Kautkar <sujitka@chromium.org>
Commit-Queue: Sujit Kautkar <sujitka@chromium.org>
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This makes the script a bit more readable and allows for
implementing more generic gpio handling.
BRANCH=none
BUG=b:145245345
TEST=Test on hatch
Signed-off-by: Craig Hesling <hesling@chromium.org>
Change-Id: I80e3b9c7e322d53bb3eecfcb9da47cacc3de919c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2658367
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713551
Tested-by: Sujit Kautkar <sujitka@chromium.org>
Reviewed-by: Sujit Kautkar <sujitka@chromium.org>
Commit-Queue: Sujit Kautkar <sujitka@chromium.org>
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BRANCH=none
BUG=b:176826659
TEST=None.
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Change-Id: Ia5139265f3f8af6aec7d0c41685f3d3bfa861d1c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2679782
Reviewed-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713550
Tested-by: Sujit Kautkar <sujitka@chromium.org>
Reviewed-by: Sujit Kautkar <sujitka@chromium.org>
Commit-Queue: Sujit Kautkar <sujitka@chromium.org>
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No functional change.
BRANCH=none
BUG=none
TEST=none
Signed-off-by: Craig Hesling <hesling@chromium.org>
Change-Id: Iccee7262549ca3355d5cb1c9d19fa484c99612e5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2513130
Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713549
Tested-by: Sujit Kautkar <sujitka@chromium.org>
Reviewed-by: Sujit Kautkar <sujitka@chromium.org>
Commit-Queue: Sujit Kautkar <sujitka@chromium.org>
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No functional change.
BRANCH=none
BUG=none
TEST=Tested manual pwr cycling on a Zork variant.
Signed-off-by: Craig Hesling <hesling@chromium.org>
Change-Id: I3420746d97f169ad252180876fc0b739210b2779
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2513129
Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713548
Tested-by: Sujit Kautkar <sujitka@chromium.org>
Reviewed-by: Sujit Kautkar <sujitka@chromium.org>
Commit-Queue: Sujit Kautkar <sujitka@chromium.org>
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Zork devices have FPMCU connected to AP via UART. Changes in this patch
will let developer flash STM32 in chip's bootloader mode via UART.
BUG=b:162368367
TEST=1. Run script on Zork device and confirm firmware flash.
2. Run script on Hatch devices and confirm that SPI functionality
is intact.
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Change-Id: I9464ae7602e2b6b21d7d31283c6c242a4d603fe5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2444457
Commit-Queue: Yicheng Li <yichengli@chromium.org>
Reviewed-by: Yicheng Li <yichengli@chromium.org>
Tested-by: Yicheng Li <yichengli@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713547
Tested-by: Sujit Kautkar <sujitka@chromium.org>
Reviewed-by: Sujit Kautkar <sujitka@chromium.org>
Commit-Queue: Sujit Kautkar <sujitka@chromium.org>
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This patch adds a host command to get the peripheral charge port
count and status.
$ ectool pchg
1
$ ectool pchg 0
State: CHARGING (4)
Battery: 50%
Flags: 0x0
$ ectool pchg 0 foo
Invalid parameter count
Usage1: pchg
Usage2: pchg <port>
Usage1 prints the number of ports.
Usage2 prints the status of a port.
$ ectool pchg 100
Bad port index
BUG=b:173235954
BRANCH=Trogdor
TEST=Done on CoachZ. See the description above.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I33f261e48b16d5933b6f3ca9f3c12fec476edda3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2555628
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit d9b7ea8ff23a744e7a5e0f28fe7ca0e36ef11a9d)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2665293
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When the board level TCPC run as an init hook it will frequently
lead to an EC reset when we are trying to recovery a disconnected
battery, potentially even a reboot loop with the most unlucky
timing.
If we instead call it from the pd_task before tcpc_init is called
then the board init hook can stall the pd_task init until the
battery is out of disconnect mode, or giving up after 2 seconds
in case the battery never seems to recover.
This accomplishes two goals: ensure the PD chips are not reset until
the battery is out of disconnect and delay start of the pd_task
(and PD negotiation) until the battery is out of disconnect state.
With this change I never see an EC reset when recovering from
a disconnected battery state.
BUG=b:63957122
BRANCH=eve
TEST=manual testing on Eve with 50+ battery disconnect and battery
cutoff cycles to ensure it never triggers an unexpected EC reset.
Change-Id: Ie1604e82916ea203a32cbdde98f6697e344bba4c
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/592716
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320248
Commit-Queue: Patryk Duda <pdk@semihalf.com>
Tested-by: Patryk Duda <pdk@semihalf.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BRANCH=none
BUG=b:76037094
TEST=make buildall -j
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Ibe8649c3cf77ef4542b5fc46d7df5eee03293b56
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2364755
Commit-Queue: Craig Hesling <hesling@chromium.org>
Reviewed-by: Craig Hesling <hesling@chromium.org>
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When the battery is cutoff by the EC via I2C sb message, when the
system is is booted again (after applying external power) the EC does
not detect the battery and therefore batt.is_present is set to BP_NO
and this kicks in the 1 second delay to prevent the AP from turning on
right away. However, if the battery is cutoff via H1, when the
EC is powered back up, it would detect the battery present and the 1
second delay is not activated, even though the battery isn't ready to
supply power to the system.
This CL adds a check to the eve specific battery_is_present()
function. The bits XCHG and XDSG are checked for the condition of both
being set to also indicate batt.is_present = BP_NO which triggers the
1 second delay to the AP power up and makes recovering from both
methods of battery cutoff have equivalent paths.
BUG=b:63360549
BRANCH=eve
TEST=manual Iniated battery cutoff in the following 3 methods:
1) issue 'cutoff' command on EC console
2) discharge the battery so that the EC initateds the battery shutdown
sequence when the battery voltage drops too low.
3) H1 generated battery cutoff
For methods 1 and 2, the following console output is found:
[0.006188 battery not found]
For all 3 methods the next two console outputs are found.
[1.486592 battery woke up]
[2.487140 battery will now allow booting]
In addition to these tests, also put the EC into hibernate, then using
an external discharge circuit, discharged the battery below v_min
(~5.0 V), then tested that the system powered back up and the battery
resumed charging.
Change-Id: I64747cab406ef194ee546c7520ae6479b3a8301d
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/585837
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Commit-Queue: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320247
Commit-Queue: Patryk Duda <pdk@semihalf.com>
Tested-by: Patryk Duda <pdk@semihalf.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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When the lid angle is close to 360 degree while in magic keyboard mode,
we may receive call to [re-]enable peripheral with
lid_angle_peripheral_enable(1). However given we test for tablet_mode,
we would shut them off.
Only sut of while suspended.
BUG=b:63904951
BRANCH=eve
TEST=Without this change no keyboard events are recoreded by evetest
while in magic mode (lid against base, screen luminosity off,
external display connected).
Change-Id: I1cda8b2de2f2ba89b3bb2007e57187dd48f19fde
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/581607
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320246
Commit-Queue: Patryk Duda <pdk@semihalf.com>
Tested-by: Patryk Duda <pdk@semihalf.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Config GPIOC2, GPIOC3, GPIOC4 to GPIO control.
Supports the LED control Behavior as below
Charge: Amber on (S0/S3/S5)
Full: Blue on (S0/S3/S5)
Discharge in s0: Blue on
Discharge in s3: Amber on 1 sec off 3 sec
Discharge in s5: off
Error: Amber on 1 sec off 1 sec
Factory mode: Blue on 2 sec Amber on 2 sec
BUG=b:166148713, b:166062873
BRANCH=none
TEST=check led status, make buildall PASS.
Change-Id: I163efbdd6ac8fe168c71f047589c62c9c6dbaaed
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2379353
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Henry Sun <henrysun@google.com>
Tested-by: Henry Sun <henrysun@google.com>
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We would prefer to use CONFIG_CHARGE_RAMP_HW to enable legacy BC1.2
charging but that feature of ISL9241 is broken (b/160287056) so we
have to use CONFIG_CHARGE_RAMP_SW instead.
BUG=b:163864475
BRANCH=zork
TEST=ramp up to 1.5A from legacy charger
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Iec0a4b82f42fd388d738362ce9a8de4d31c61054
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2382635
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In case the GMR does not work, we do not send (SW_TABLET_MODE), value 0,
when the lid is against the base (tablet mode).
Use lid angle calculation to help. In practice it triggers tablet mode
earlier (at around 300) and exists later (240 degree).
BUG=b:63702771
BRANCH=eve
TEST=Check tablet mode is mostly driven by accels.
Change-Id: I832629bfaedcd2154c2839a8fda03248509662ec
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/580334
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320005
Commit-Queue: Patryk Duda <pdk@semihalf.com>
Tested-by: Patryk Duda <pdk@semihalf.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The original TCPC in the port 1 is PS8751 and this CL adds another
option of PS8755.
These two are all supported by ps8xxx.c and the board function
board_get_ps8xxx_product_id is implemented to judge the source by
checking the SSFC bits field in the CBI.
BUG=b:159082424, b:163922535
BRANCH=octopus
TEST=verify DUT with PS8755 or PS8751 in the sub-board can work
correctly in sink and source roles.
Signed-off-by: Marco Chen <marcochen@chromium.org>
Change-Id: I0cba58eb7b22c95aac1344f1b3a68ce5dac43ab0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2377060
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Initiate the helper functions to parse the SSFC of CBI. The first and
only component in this version is TCPC in the port 1.
BRANCH=octopus
BUG=b:163922535
TEST=EC log of Meep device can output value of SSFC in CBI
Signed-off-by: Marco Chen <marcochen@chromium.org>
Change-Id: Iaee608a8b9791796fff0b31599c8be1bdc07cf3e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2377058
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This patch update GPIO for MST function by board version.
BUG=b:159051013
BRANCH=zork
TEST=verify that MST function can work on board version 4.
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I20c672155f0bd29e27e9b28a1e9f3abd03e87add
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2372162
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Set CDP_HOST_MODE when we are DFP to advertise higher power but
then switch to SDP after device is plugged in, to avoid noise
(pulse on D-) causing USB disconnect.
BUG=b:156014140 b:163947281 b:163425237
BRANCH=none
TEST=audio over USB-C
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Ibc43edc15bbdeca805e68093035a06ef7076d2c9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2353889
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
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GMR sensor was added on Morphius starting with board version 3. This
change enables CONFIG_GMR_TABLET_MODE_CUSTOM and adds support for
board_sensor_at_360 so that on board versions < 3, GMR sensor output
is ignored.
BUG=b:166817823
BRANCH=zork
TEST=Verified that device is able to get in and out of tablet mode
correctly for board version < 3.
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I1514a4a0de84f24f1ee219c44e8020c7d96728ff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2382553
Tested-by: Furquan Shaikh <furquan@chromium.org>
Auto-Submit: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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This CL fixes 2 minor issues which with the i2c driver file.
BUG=b:148493929
BRANCH=None
TEST=verfied honeybuns builds correctly.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Ide6aafd4e4296891579fa138ec0d3e54a4ed9c6d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2376828
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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Fix a couple of places missed in CL:2366456
BUG=b:161860605
BRANCH=zork
TEST=none
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Icb49da01b3575cfd81f57f01efcafea534212d8d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2380160
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
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On G3->S5, wait for GPIO_EC_FCH_RSMRST_L to be deasserted before
asserting GPIO_EC_FCH_PWR_BTN_L.
BUG=b:164921478
BRANCH=zork
TEST=power button timing
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Ib16f8ccf795382a26e70fd505e03c59db4eeaa88
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2378558
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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Allow board to provide board_pwrbtn_to_pch function to override the
default behavior of gpio_set_level(GPIO_PCH_PWRBTN_L, level) as the
means for asserting power button signal to PCH.
BUG=b:164921478
BRANCH=zork
TEST=power button timing
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I8f5ffb2759318fdc941155b60be8bf4aa7dd4771
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2378557
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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Add new enum motionsensor_chip and update ectool motionsense.
BUG=chromium:1117541
BRANCH=None
TEST=ectool motionsense info
Cq-Depend: chromium:2317888
Signed-off-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
Change-Id: I07736d61bdb7332bfdc44c8f7294233e43a6e00d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2374647
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
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Add ICM-426xx accel/gyro driver code.
BUG=chromium:1117541
BRANCH=None
TEST=ectool motionsense fifo_read && tast run hardware.SensorRing
Signed-off-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
Change-Id: I83fe48abc6aa9cde86576a777ac4272d90fac597
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2317888
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
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The SM5803 has the capability to monitor to the power burnt across the
BFET. There are two thresholds that can be configured: an early
threshold, and a fatal threshold in which the charger automatically
disables the BFET.
This commit configures the BFET alerts to fire at 1.5W for the early
threshold and 6.5W for the fatal threshold.
The full scale is 7.5W, the lsb is 7.5W/256 ~= 29.2mW.
BUG=b:159376384
BRANCH=None
TEST=Build and flash waddledee, charge from sub board, verify that no
alerts are seen.
TEST=Configure the thresholds significantly lower, charge from sub
board, verify that the alerts do fire and logging information is
printed on the EC console.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I17b3876bc5ed4b41d2378600a8b8bf639f9757ce
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2380404
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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In order to satisfy factory testing requirements we need to
boot a bare board with just an AC adapter without requiring
a power button.
However we also don't want to always allow booting of the
battery is present but cut-off (which will indicate BP_NO so
we can't use the existing battery_is_present function) or has
critically low level as it may not immediately boot.
To accomplish this add a function that allows the board to
specify a custom "hardware presence" for the battery that is
separate from the battery presence check. This could also
likely be accomplished by adding another state to "enum
battery_present" but that could alter other behavior in the
current charge state machine..
BUG=b:63957122
BRANCH=eve
TEST=manual testing on Eve to ensure a board without a battery
is allowed to power-up when power is first applied without
requiring a power button press. Also ensure that a critically
low or cut-off battery that does not try to immediately power up.
Change-Id: Ia7c6b5ad5043aab15dbc99be7816353d6b92e720
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/582544
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320004
Tested-by: Patryk Duda <pdk@semihalf.com>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Fix mistake in CL:2375803. HDMI_DATA_EN_DB is needed for MST hub on
OPT3 DB, in addition to pi3hdx1204 retimer on OPT1 DB.
BUG=b:158266701
BRANCH=zork
TEST=none
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Ie97f6a59628177542b890bcd4327df1e0ffdc083
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2382631
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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According to USB PD spec, section 2.5.4, only VCONN source can
communicate with the cable plug. This CL checks if the port is the VCONN
before sending SOP'/SOP'' messages.
If there is a VCONN source failure, port retries swapping the VCONN times
before marking the VDM as failed/naked.
The CL also enables falling back to DP mode in case enter mode thunderbolt
fails.
BUG=b:148528713
BRANCH=None
TEST=Tested on volteer, the port sends SOP'/SOP'' VDMs to the cable
only if it's the VCONN source
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Change-Id: I5880104a7a42b3e7de9e472affd41e937d36f9a5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2368066
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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This patch fix HDMI_DATA_EN_DB not power on dali sku,
which will cause MST hub not powered.
BUG=b:150278507
BRANCH=zork
TEST=verify MST hub work in S0 on dali sku.
verify HDMI work in S0 on picasso sku.
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: Iebd7c610d71efde9dbb3d66d7405f1334084ce97
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2379363
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Pass tx_emsg[port].buf to VDM response implementation functions
Convert data objects count to bytes
VDM header in VDM response message should not use USB_VID_GOOGLE as SVID
to respond to all requests. Save SVID from received request and compose
response VDM header with this SVID.
BUG=b:148528713,b:157163664
BRANCH=none
TEST=Connect volteer to Gatkex DFP port, with CL:2370045, check VDM
response messages from Volteer have correct contents.
Signed-off-by: li feng <li1.feng@intel.com>
Change-Id: I7403af1449abfa4ebf6b43ded457e3654396aadb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2368067
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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This patch fix HDMI_DATA_EN_DB not power on dali sku,
which will cause MST hub not powered.
BUG=b:152841287
BRANCH=zork
TEST=verify MST hub work in S0 on dali sku.
verify HDMI work in S0 on picasso sku.
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I09177fc04d8255f84c4cd193404f5285d89979ff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2379366
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Add new battery config : AP19B5K.
BUG=b:166226645
BRANCH=master
TEST=Check found battery info in console and cutoff work.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: Ia22673f016b7cf5a581a40039113969b56b29089
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2379357
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Commit-Queue: Zhuohao Lee <zhuohao@chromium.org>
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support TBT/USB4 with all typeC port
BUG=b:162376062
BRANCH=none
TEST=checking with TBT is working on USB-C0/C1 at Gen3 speed
Change-Id: Ia9f3854d9319ff1c28167759622b3ba4b810372d
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2377047
Reviewed-by: Keith Short <keithshort@chromium.org>
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In current EC implementation, EC turns off PP5000_A in G3. Since
PPC is powered by PP5000_A, it needs special logic to handle the
re-power and re-initialization.
See b:154775121 for more discussion.
To simplify the logic, change the behavior to turn PP5000_A off
only when hibernate, so we won't need to worry about re-initialize
PPC anymore (resume from hibernate is a reboot, so it's also
covered here).
BUG=b:154775121
TEST=1) Run the test script in CL:2169443
2) Verify PD is functional whenever EC is awake.
BRANCH=none
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I07c03f9a8c0b77012d1284a283ce489e54b1a058
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2378940
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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ADC_BATT_ID is reassigned to BATT_PRES in Jacuzzi families.
Remove it from source code to prevent people using it.
BRANCH=kukui
BUG=none
TEST=make buildall
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I213b502413642c9bfff99443180ddb43debb2463
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2380842
Tested-by: Ting Shen <phoenixshen@chromium.org>
Auto-Submit: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Commit-Queue: Nicolas Boichat <drinkcat@chromium.org>
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ITE embedded TCPC doesn't support HW auto toggle, but stand alone TCPC
needs the config, so I let function pointer point to NULL, then this
port won't transit to TC_DRP_AUTO_TOGGLE state, if
CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE is defined.
BUG=none
BRANCH=none
TEST=on board drawcia and it81202_pdevb:
When CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE is defined,
ITE ports cc are toggled by TCPM switch unattach.SNK/SRC state
in TCPMv2.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Change-Id: I5c6cd337c7e91c4af7d408d5e631dc74d71de77a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2366417
Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL changes for both unsupported and supported auto toggle
TCPC on a board:
1.board level enable CONFIG_USB_PD_TCPC_LOW_POWER:
Exit LPM state for unsupported auto toggle TCPC port, when drp
state is TOGGLE_ON in S0.
2.board level enable CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE:
Don't transit to TC_DRP_AUTO_TOGGLE state for unsupported auto
toggle TCPC port.
BUG=none
BRANCH=none
TEST=on board drawcia, check unsupported auto toggle TCPC port:
1.connect with adapter/dongle, pd state to SNK/SRC_Ready
during G3 -> S0.
2.shut down to G3, connect with adapter and pd state to SNK_Ready.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Change-Id: Ic6afc84df1564b2cb19a9032bba0752091cbf7a0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2362371
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
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On halvor, we have a LED indicator with following:
Power LED:
System S0: White.
System S3: Blinking white (1 sec on, 1 sec off)
System S5/G3: Off.
Battery LED:
DC mode:
System S0: off.
System S5/G3: Off.
System battery low: Blinking Amber (1 sec on, 1 sec off)
AC mode:
Charging: Amber.
Full charged: White.
BUG=b/166057836
BRANCH=none
TEST=halvor test
1. Check battery LED on full charging / charging / discharging.
2. Check power LED on s0 / suspend / s5.
3. Check "ectool led" command for battery and power LED control.
4. Check battery LED on low battery state.
Change-Id: Ie6d6661c2b249336798099679635682e43aff5f3
Signed-off-by: Samsp_Liu <Samsp_Liu@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2366418
Tested-by: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
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The remaining 2 are qualifier for single/double tap we are not
interested in. They are not reset to 0 even after we process the
interrupt, so when gesture is enabled, we are stuck in the interrupt
routine for a while.
BMI260 does not have this problem as the interrupt register is now
explicitly 16 bit.
Gesture is currently enabled on eve that does not have
the loop on interrupt, so no other branch than ToT is affected.
BUG=b:164974014
BRANCH=none
TEST=Without, we would be stuck in bmi160 irq_hanlder:
(timestamp of int) (interrupt mask)
...
[5064.237873 a hw int: 769270447 - 2 0x00C00000]
[5064.238989 a hw int: 769270447 - 2 0x00C04000]
[5064.241277 a hw int: 769270447 - 2 0x00C00000]
[5064.242397 a hw int: 769270447 - 2 0x00C00000]
[5064.243527 a hw int: 769270447 - 2 0x00C00000]
[5064.244647 a hw int: 769270447 - 2 0x00C00000]
[5064.246419 a hw int: 769270447 - 2 0x00C00000]
... /
Qualifier -----/
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Change-Id: I2c8fd354eddfa412f644555dcdcdb77708a9e3c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2370152
Reviewed-by: Patryk Duda <pdk@semihalf.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Patryk Duda <pdk@semihalf.com>
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BUG=b:161957387
BRANCH=none
TEST=- EC's GPIOs go back to default while flashing (No power rails
are turned on).
- EC will be only reset once after flashing.
Change-Id: I776da7f5052219df18d570f23fb7fab93583c7fa
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1270299
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Instead of going to hibernate when the battery is critically low
we should cut off power entirely.
Even with the PMIC shut down the H1 chip consumes more power than
is healthy when the battery is already critically low, depleting it
to dangerously low voltage levels faster than it should.
BUG=b:63957122
BRANCH=eve
TEST=manual testing on Eve with critically low battery to ensure that
it is cut off instead of going into hibernate.
Change-Id: I2eaba3623385a4eb3daa39a2fa8aa08d3ec6366e
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/582543
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320003
Tested-by: Patryk Duda <pdk@semihalf.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
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Our current implementation will disable DBGR (debug mode) in system
reset, but this will break flashing sequence. So we make a change to
ensure flashing won't be broken under the above situation.
Note: DBGR is only applied to flashing sequence, a HW reset after
flashing will disable DBGR and allow normal system reset.
We also enable wait flashing sequence in this CL, so EC can check if
there’s a DBGR flag during initialization and proceed afterwards.
BUG=b:118584434, b:165515400
BRANCH=none
TEST=- The soft reset still works after flashing.
- EC can be flashed even if it is in continuous reboot loop.
Change-Id: I9cea2c4fef74de7afcffb203e02f79cb18a4c5bf
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1243878
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
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Now that the charger_* interfaces take charge indexes appropriately,
clean up the board code to no longer use chg_chip structure directly.
BRANCH=None
BUG=b:147440290
TEST=on drawlat, confirm sourcing out on both ports works
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I92925e487f90bc3965b868f3f7fc0d3175dc3df9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2376470
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add the charger number as an input for setting OTG output current and
enabling it, both in the charger driver and in
charge_set_output_current_limit(). Also add a clarifying note about the
intent of CHARGER_SOLO.
BRANCH=None
BUG=b:147440290
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I7656c19a87d8216f5efc72dcffa6d638064d3e2f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2376469
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Since OCPC has one charger chip per port, it can be assumed in the
charger_is_sourcing_otg_power() function that the port will be the same
as the charger number with this config enabled.
BRANCH=None
BUG=b:147440290
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Iff5130e9ac7c268d38fe75eb3eb1c9ea5864abd4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2376468
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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