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* Clear OWNERS for factory/firmware branchfactory-veyron-7505.BBrian Norris2021-09-102-10/+1
| | | | | | | | | | | | BUG=none TEST=none Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155121 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Owners-Override: Jora Jacobi <jora@google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* mec1322: Ensure flash operation has completed before returning.Shamile Khan2015-09-291-46/+8
| | | | | | | | | | | | | | | | | | | | | | | When flashrom performs a flash read following an erase and we do not wait in between for the erase to complete, we read 0x00 instead of 0xFF. Flashrom detects this and does not proceed further. Inserting a wait after erase solves this issue. Also added a wait following a flash write operation to preempt future issues, and moved spi_flash_wait() calls from Host Command APIs to lower level spi_flash_* functions. BUG=chrome-os-partner:43160 BRANCH=none TEST=Manually tested on Kunimitsu FAB3. flashrom -p ec -w ec.bin is successful Signed-off-by: Shamile Khan <shamile.khan@intel.com> Change-Id: I00925aa2da3709a6f3e73a40543b079112906e0a Signed-off-by: Shamile Khan <shamile.khan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/302683 Reviewed-by: Shawn N <shawnn@chromium.org>
* Kunimitsu: Fix VRMODECTRL for PMIC VCCIO controlKyoung Kim2015-09-292-1/+2
| | | | | | | | | | | | | | | | Added VRMODECTRL for VCCIO BUG=none TEST=Fab3 with new LSW for VCCIO BRANCH=master Change-Id: Ibe5350b535037e8101d2a77dca091479480e58e7 Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com> Reviewed-on: https://chromium-review.googlesource.com/302686 Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com> Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* gesture: fix double tap doesn't always work in suspendAlec Berg2015-09-291-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix bug where sometimes on suspend tap for battery would never work, but open a resume and suspend again it would work fine. Problem is that if suspended when accel circular buffer index is 1, then we would never run the detection algorithm, because the check for if the history buffer has been initialized is incorrect. This also fixes the algorithm so that on suspend, it requires the full sensor history buffer be filled up again before starting to detect the double tap. BUG=chrome-os-partner:45930 BRANCH=samus TEST=go in to suspend when history_index is 1 and verify that tap for battery works. wrote following console command to pause the circular buffer at a specific index. static int pause_index = -1; static int check_pause; static void gesture_chipset_resume(void) { /* disable tap detection */ check_pause = 1; } DECLARE_HOOK(HOOK_CHIPSET_RESUME, gesture_chipset_resume, GESTURE_HOOK_PRIO); void gesture_calc(void) { if (check_pause) { if (pause_index < 0 || history_idx == pause_index) { ccprintf("Paused at %d\n", pause_index); tap_detection = 0; pause_index = -1; check_pause = 0; } } ... static int command_tap_pause(int argc, char **argv) { char *e; int v; if (argc == 2) { v = strtoi(argv[1], &e, 0); if (*e) return EC_ERROR_PARAM1; pause_index = v; } return EC_SUCCESS; } DECLARE_CONSOLE_COMMAND(tappause, command_tap_pause, "", "", NULL); Change-Id: I2ba4ab2c807ec6ac1885a4829efedac3c83b32f1 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302648 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* cleanup: Remove redundant CONFIG_RAM_* configsShawn Nematbakhsh2015-09-292-23/+4
| | | | | | | | | | | | | | | | | RAM need not be preserved between jumps from the loader to RO/RW images, so there is no need for a separate region of loader RAM. Remove redundant CONFIGs which define this unneeded region. BUG=None TEST=Verify glados boots and sysjumps successfully. BRANCH=None Change-Id: I2567f17a973c6f9f00bcfd97a4581d6c4b6fd6f0 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302586 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32: Remove support for stm32ts60Shawn Nematbakhsh2015-09-293-58/+0
| | | | | | | | | | | | | | | | stm32ts60 support is incomplete and largely not validated, so remove support for the part. BUG=chrome-os-partner:45362 TEST=`make buildall -j` BRANCH=None Change-Id: Ib4c426a2cb2337b4deadeeab8bd195cac1ef81ff Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302497 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* board: ryu: Match Samus double tap behavior.Gwendal Grignou2015-09-294-5/+14
| | | | | | | | | | | | | | | | | | Increase the change of false positive, but make double feels like Samus: - increase time beetwen tap to 500ms - decrease tap threshold to 100mg (actually 62.5mg) - increase ODR during TAP. BRANCH=smaug BUG=b:24440423 TEST=check Ryu and Samus side by side, their tap behavior is more similar. run cts -c android.hardware.cts.SingleSensorTests Change-Id: I260ad95136cb2be71ef4d71efc4bee0b28afa8e0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302627 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* common: motion: Add timestamp before wakeup event.Gwendal Grignou2015-09-281-1/+9
| | | | | | | | | | | | | | | | Sandwich wake up event between timestamp. Otherwise HAL will think the event came from a long time ago. With two timestamp, the wake event timestamp will be - more - accurantly set at the time it occurs. BRANCH=smaug BUG=chrome-os-partner:45704 TEST=Pass com.android.cts.verifier.sensors.SignificantMotionTestActivity Change-Id: I6be76820d71d2571d069542564f569a623001190 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302642 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* common: motion: Fix setting of Significant motion.Gwendal Grignou2015-09-281-1/+2
| | | | | | | | | | | | | | | cl/296213 had another bug that prevent Significant motion gesture to be set: In set_activity, activity is a number, not a bitfield. BRANCH=smaug BUG=chrome-os-partner:45704 TEST=With ectool motionsense set_activity and list_activity, check we can set/reset the significant motion activity. Change-Id: Iff921f3f5edcee74ed3540139f13da301f149173 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302641 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* common: motion: Fix error calculating oversampling.Gwendal Grignou2015-09-281-1/+1
| | | | | | | | | | | | | | | | | cl:298688 was wrong and oversampling calculation, used to drop events that AP does not want was incorrect. We were comparing mHz with Hz. BUG=b:24367625 BRANCH=smaug TEST=Before, we would fail all android.hardware.cts.SingleSensorTests#testAccelerometer tests where frequency was lower than 100Hz. After, we pass thoses tests. Change-Id: I487feb4e235a21f78d367397b5890ebcc5864b22 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302176 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* ectool: Add "hibdelay" command.Aseda Aboagye2015-09-261-0/+33
| | | | | | | | | | | | | | | | | | | | | This commit adds the "hibdelay" command which will set the time before the EC hibernates. BUG=chrome-os-partner:45608 BUG=chrome-os-partner:44831 BRANCH=None TEST=Build and flash samus EC with hibernation delay host command added. Use ectool to set the hibernation delay and verify that the hibernation delay was changed. CQ-DEPEND=302197 Change-Id: I91141ee48a648c1052f0a3930a810ea4f551e0a4 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/302198 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* gpio: Merge config_module into config_pins.Aseda Aboagye2015-09-262-25/+31
| | | | | | | | | | | | | | | | | | | | | | gpio_config_module() and gpio_config_pins() had very similar code. This commit moves the functionality of gpio_config_module into gpio_config_pins. That is, gpio_config_pins() can now configure an entire module. This is accomplished by passing in GPIO_CONFIG_ALL_PORTS as the port parameter. BUG=chromium:533539 BRANCH=None TEST=Build and flash on samus. Verify that lightbar, charging, power button, sensors, all functional. TEST=make -j buildall tests Change-Id: I7c9122ebf7b0e2716af2d55b842c4806d8099a63 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/302479 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* nuc: Add initial wheatley board driverMulin Chao2015-09-259-0/+1612
| | | | | | | | | | | | | | Add initial board driver for wheatley platform BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: I9dccc284e1de10855079611be8593641d837cd64 Reviewed-on: https://chromium-review.googlesource.com/298743 Commit-Ready: Mulin Chao <mlchao@nuvoton.com> Tested-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ec_commands: Add "hibdelay" as an EC host command.Aseda Aboagye2015-09-252-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | Currently, the only way to prevent a system from hibernating is via the EC console command "hibdelay". This commit adds the host command equivalent so that it can be set elsewhere. The host command takes the amount of time in seconds to delay hibernation by and responds with the current time in the G3 power state, the time remaining before hibernation should be invoked, and the current setting of the hibernation delay. BUG=chrome-os-partner:45608 BUG=chrome-os-partner:44831 BRANCH=None TEST=Build and flash on samus. Issue the host command from EC console. Verify that the hibernation delay was updated by checking with the hibdelay command. Change-Id: I34725516507995c3c0337d5d64736d21a472866c Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/302197 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Handle signed RW images a bit cleanerBill Richardson2015-09-259-308/+61
| | | | | | | | | | | | | | | | | | | | | | | | | For signed EC RW images (CONFIG_RWSIG), there's no point in embedding the public key or signature into the image itself since it will just be replaced by the signer (either as the next step in the build process, or after the fact for MP releases). This takes that out and just points to where the pubkey and signature will be placed. BUG=none BRANCH=none TEST=make buildall I also checked the signatures with futility show -t build/*/ec.bin They still look good, and the one signed image I booted (Cr50) works as before. Change-Id: Ib39b7c508914851f81a1bebb2450e08ef0def76c Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302630 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Remove superfluous #definesBill Richardson2015-09-252-7/+6
| | | | | | | | | | | | | | | This just removes a couple places where a perfectly good CONFIG macro is simply renamed to something else. BUG=none BRANCH=none TEST=make buildall Change-Id: I97a4abe95736504fe97c468336426d0ecc48d62c Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302597 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* mec1322: More code space in RAMKyoung Kim2015-09-254-6/+6
| | | | | | | | | | | | | | | | | | | | | | 1. No need for loader data ram 2. 97K code size 3. shifting down RO/RW image location in RAM by 1Kbyte. (loader code space: 4k to 3k) BUG=none TEST=1. build image with big code additions.(like low power idle patch) and check if there is flash size related error message. 2. check if EC's RO image can boot from loader. 3. use EC console command, "sysjump RO/RW" and check if it works. 4. Verified in Cyan and Kunimitsu. BRANCH=none Change-Id: Ie4daf44cdba944e3e58894ca80183fcdb0fdbc7c Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com> Reviewed-on: https://chromium-review.googlesource.com/302149 Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com> Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* Kunimitsu: initialize PMIC for VCCIO decay on assertion of SLP_S0Kyoung Kim2015-09-252-1/+32
| | | | | | | | | | | | | | | | | PMIC configuration for VCCIO decay and mask PowerGood of some rails BUG=none TEST=Fab3 with new LSW for VCCIO check if VCCSTG is off / on as SLP_S0 is off and on. is pressed. BRANCH=master Change-Id: I00a131171354b3579d40309af700794a6b151f9d Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com> Reviewed-on: https://chromium-review.googlesource.com/302148 Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com> Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* lightbar: clear all segments before starting tap for batteryAlec Berg2015-09-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | | This makes sure to clear all segments before turning on lightbar for tap for battery. Without this, the previous colors are stored and flash briefly before starting the tap for battery pattern. BUG=chrome-os-partner:45835 BRANCH=smaug TEST=tested on ryu. go to s5, type 'lightbar seq tap' and see that the tap sequence starts without first blinking google colors. note that this doesn't affect samus because for samus in s5, the lightbar is not powered, so when we do tap for battery, we first power the lightbar and the registers are cleared. Change-Id: Ic7ae8c580005e786ba35656d8feeedac56e35cfd Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302147 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> (cherry picked from commit 962d0b2595b1dbb5ef162b7e6b4db7ce8a65e6c5) Reviewed-on: https://chromium-review.googlesource.com/302447
* ryu: fix max lightbar brightnessAlec Berg2015-09-252-10/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix max brightness for Ryu. The max brightness must be less than 0x80 because the top bit in the lightbar current registers is reserved. Writing the top bit seems to have undefined behavior. This fixes the hiccups in the tap for battery sequence which was ramping brightness to above 0x80 and producing weird results. BUG=chrome-os-partner:45835, chrome-os-partner:44029 BRANCH=smaug TEST=test tap for battery looks smooth. test that the google colors match the desired current levels: > lightbar ... 15 0f 06 16 0f 20 17 16 08 18 06 21 19 26 11 1a 1d 0b Change-Id: Iecf1c770f986064b9b4d2d3d54fab0ea1242af01 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302146 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> (cherry picked from commit 133dab0c36160d0e54820cce9e97071df34340f8) Reviewed-on: https://chromium-review.googlesource.com/302446
* motion_sense: Fix issues in SET_ACTIVITY / LIST_ACTIVITIESFurquan Shaikh2015-09-251-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | 1. ret always evaluated to INVALID_PARAM and so SET_ACTIVITY bailed out early and returned an error to host command. 2. No need to verify sensor id since SET_ACTIVITY / LIST_ACTIVITIES identify the correct sensor to operate on. BUG=chrome-os-partner:45710 BRANCH=None TEST=Compiles successfully. Disable double-tap works as expected. Change-Id: I58ae9cd5009fadedb3ea78a4eec0452124747707 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/301990 Trybot-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 2a3a120c8f7cca1e032f4be2a198748f0e8b5fb1) Reviewed-on: https://chromium-review.googlesource.com/302409 Commit-Ready: Gwendal Grignou <gwendal@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org>
* glados: Swap pericom usb2 charge detector portsShawn Nematbakhsh2015-09-241-3/+2
| | | | | | | | | | | | | | | | | | Swap the charge detector i2c ports since the association between pericom chips and ports seems backward. BUG=chrome-os-partner:45118 TEST=Plug usb2 keyboard into usb-c port through A-C adapter, verify keyboard is functional. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I7c78dc5f915126bb61cf27543ea1626c831e5981 Reviewed-on: https://chromium-review.googlesource.com/300643 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Ryan Lin <ryan.lin@intel.com> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* ryu: change charging temperature limitsVincent Palatin2015-09-241-5/+5
| | | | | | | | | | | | | | | | | Do not charge below 5 C or above 50 C. Still charge at 0.1C between 5 C and 10 C. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=chrome-os-partner:45631 TEST=none Change-Id: I6788088054ef4a5eb176eb2185b5e1c576128e09 Reviewed-on: https://chromium-review.googlesource.com/302232 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* cleanup: Remove CONFIG_FW_IMAGE_SIZEShawn Nematbakhsh2015-09-248-31/+24
| | | | | | | | | | | | | | | | | | Since CONFIG_RO_SIZE and CONFIG_RW_SIZE now exist (which may theoretically be different sizes), it is no longer useful to globally define the size of an image. BUG=chromium:535027 BRANCH=None TEST=`make buildall -j`. Also, verify glados / glados_pd continue to function as expected. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ie29959923bc5d02b4d7d6d507ff2191bcb7d24c8 Reviewed-on: https://chromium-review.googlesource.com/301743 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* driver: bmi160: Reenable FIFO when EC wants it.Gwendal Grignou2015-09-241-2/+5
| | | | | | | | | | | | | | | | Code has been added to not send data to AP ring when the AP does not want data, but we should still enable the BMI160 FIFO if the EC wants the data. BRANCH=smaug BUG=chromium:513458 TEST=Disable sensor at AP (sysfs frequency) enable in EC (accelrate). Check with accelinfo we are collecting sensor info. Change-Id: I962fecad0e8cea899e4d788d25982e8bc7e7fb88 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/301795 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Make builds repeatable.Bill Richardson2015-09-244-27/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | We have been using the time of compilation to determine the version string. This CL will keep doing that if the git repo has uncommitted changes, but if the repo is clean we'll just use the author date of the last commit. This ensures that the same source will produce bitwise-identical builds (assuming no toolchain changes, of course). BUG=chrome-os-partner:45616 BRANCH=none TEST=manual cd src/platform/ec make buildall mv build build.one make buildall md5sum build{,.one}/*/ec.bin | sort Observe that successive builds produce identical binaries. Change-Id: Ie2ef44b216586097589c9c15f12e05c87a53f991 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302140 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* flash_ec: restore boot_mode for all MCUsAlec Berg2015-09-241-6/+6
| | | | | | | | | | | | | | | | | | | Make sure to restore boot_mode gpio for all MCUs. Previously, only usbpd_boot_mode was restored, but not ec_boot_mode which is used on lucid. BUG=none BRANCH=none TEST=flashed lucid (ec_boot_mode), glados_pd (usbpd_boot_mode), and zinger (boot_mode) and verified that the boot_mode gpio was restored to off at the end of flashing. Change-Id: Ib6fcddcac6d00465e31a0e710bae3b8318bac659 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/301338 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* common: add command spixferGwendal Grignou2015-09-234-0/+68
| | | | | | | | | | | | | | | | Similar to i2c_xfer: allow access to a SPI device registers. We assume the protocol use is set MSB bit to the offset for read operation. id is the index of the device in spi_devices. BRANCH=smaug TEST=Read/Write SPI registers. BUG=none Change-Id: Id4aaffbb6f514fd47086aee240b556ea23298d33 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/289857 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Fix typo when building with CONFIG_SHAREDLIBBill Richardson2015-09-232-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board-specific board.h defines things like this: #define CONFIG_RO_SIZE 1000 #define CONFIG_RW_SIZE 1000 #define CONFIG_SHAREDLIB_SIZE 200 And in the linker scripts we define some preprocessor macros like so: #define FW_SIZE_(section) CONFIG_##section##_SIZE #define FW_SIZE(section) FW_SIZE_(section) So that we can say things like this: FLASH (rx) : ORIGIN = FW_OFF(SECTION), LENGTH = FW_SIZE(SECTION) Note that we have to use FW_SIZE, not FW_SIZE_ The difference is only noticeable when SECTION is #defined. If ${CFLAGS} has -DSECTION=RW Then the expansion is this: FW_SIZE_(SECTION) => CONFIG_SECTION_SIZE FW_SIZE_(RW) => 1000 There's no difference in the output for this particular CL, but we should use the correct macro anyway to avoid confusion. BUG=none BRANCH=none TEST=make buildall Change-Id: I61edc76a1aaeb1c675b384371700f37dda39ed47 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302150 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* board: ryu: Use CONFIG_SPI_ACCEL_PORT instead of numericalGwendal Grignou2015-09-231-1/+2
| | | | | | | | | | | | | | spi_devices array needs the SPI master port used. It is defined as CONFIG_, use it. BUG=none BRANCH=smaug TEST=Check the sensors still work. Change-Id: I6ce978caa32f4135dced59417a81ae280777fe57 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302021 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* oak: updates GPIO setting for rev4Ben Lok2015-09-232-4/+15
| | | | | | | | | | | | | | | | | | | | | Modify the GPIO seeting according to the Oak rev4 schematic. BRANCH=none BUG=none TEST=manual Confirm all reversion of oak can be built pass: make -j EXTRA_CFLAGS=-DBOARD_REV=4 BOARD=oak make -j BOARD=oak clean make -j EXTRA_CFLAGS=-DBOARD_REV=3 BOARD=oak make -j BOARD=oak clean make -j EXTRA_CFLAGS=-DBOARD_REV=2 BOARD=oak make -j BOARD=oak clean make -j EXTRA_CFLAGS=-DBOARD_REV=1 BOARD=oak Change-Id: Ib1051f29df9d1919f0ae3ecaf55dc0997ea29c3e Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/300728 Reviewed-by: Rong Chang <rongchang@chromium.org>
* tcpc: don't allow tcpc write command until initializedAlec Berg2015-09-211-0/+5
| | | | | | | | | | | | | | | | | | | | | Don't act on a TCPC write command until we are done initializing. This fixes an issue where if the TCPC reboots while the TCPM (EC in our case) is still functioning, then we can get into a weird state where we are changing the CC termination as we are still initializing, which can cause us to get stuck with a phantom connection (we apply one CC termination, but think we are applying the opposite termination, causing us to 'see' a connected device). BUG=none BRANCH=none TEST=load on glados. make sure dual-role toggling is on on the EC and reboot PD MCU a bunch of times and make sure the EC doesn't detect a phantom connection. Change-Id: I2dffc3c2a1ca70903e17db0e012e994835cb9962 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/300681 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* nuc: Fixed flash layout issue for npcxMulin Chao2015-09-216-55/+98
| | | | | | | | | | | | | | | | | | | | Fixed flash layout issue for npcx Modified drivers: 1. config_flash_layout.h: Fixed layout issue for npcx 2. flash_ec: add flashrom support for boards without JTAG in servo connector BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: I0b9b679c52b8a8e2a26c278b5024d0350fb77338 Reviewed-on: https://chromium-review.googlesource.com/300392 Commit-Ready: Mulin Chao <mlchao@nuvoton.com> Tested-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* cleanup: Fix mapped storage accessesShawn Nematbakhsh2015-09-212-4/+4
| | | | | | | | | | | | | | | | | | | 1. Don't assume that images are present in program memory, just because storage is mapped (npcx case). 2. Use CONFIG_MAPPED_STORAGE_BASE correctly, rather than PROGRAM_MEMORY_BASE. BUG=chrome-os-partner:23796 TEST=make buildall -j BRANCH=none Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I99c2b382def2a211241d401bbdc39a88ceedca5b Reviewed-on: https://chromium-review.googlesource.com/300254 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Mulin Chao <mlchao@nuvoton.com> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* gpio: i2c: Correctly restore pins after i2cunwedgeShawn Nematbakhsh2015-09-211-20/+19
| | | | | | | | | | | | | | | | Set pins as inputs when going to hi-Z, and restore them to default when returning to functional. BUG=chrome-os-partner:45520 TEST=`i2cunwedge` on samus, verify that i2c bus is still functional BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ie19d4e5afdee7f0b2437afdfaa8175ff77b73c78 Reviewed-on: https://chromium-review.googlesource.com/300785 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Define SECTION=* and SECTION_IS_* when compilingBill Richardson2015-09-212-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The linker scripts are passed through the preprocessor so that they can distinguish between RO and RW images. This change makes the same macros available when compiling, so that code can contain directives like #ifdef SECTION_IS_RO or #define FW_SIZE_(section) CONFIG_##section##_SIZE #define FW_SIZE(section) FW_SIZE_(section) int size = FW_SIZE(SECTION); BUG=none BRANCH=none TEST=make buildall Nothing uses this yet, so there's no change to the images. Change-Id: I6e03cd07c134f4b86aeddd9d516b74bbdb95b8a8 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/301255 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Remove old vboot cruft from Makefile.rulesBill Richardson2015-09-211-3/+1
| | | | | | | | | | | | | | | | | This removes an unused vboot recipe left over from long, long ago. It was added with commit 8101b71 (May 2012) to enable vboot on EC. It should have been removed with commit 45cd846 (Aug 2012), but wasn't. It hasn't been useful since then. BUG=none BRANCH=none TEST=make buildall Change-Id: I1176898064c4e714639dc63f041fb0fd85d73bab Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/301254 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Put chip-specific configs in config_chip.hBill Richardson2015-09-217-8/+48
| | | | | | | | | | | | | | | | | | | | include/config_std_internal_flash.h is an optional header that can be used to implement the most common EC flash layout. However, CONFIG_INTERNAL_STORAGE, CONFIG_MAPPED_STORAGE, and CONFIG_MAPPED_STORAGE_BASE are fixed by the SoC, so they belong in config_chip.h, not in the optional header. BRANCH=none BUG=chrome-os-partner:23796 TEST=make buildall Refactoring only, no behavioral differences. Change-Id: I114c3e194837041920e6f228a2bed6747be8231c Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/301330 Reviewed-by: Shawn N <shawnn@chromium.org>
* driver: bmi160: Fix for significant motion while in suspend.Gwendal Grignou2015-09-212-8/+11
| | | | | | | | | | | | | | | | | | | | - Add interrupt latching: notice that interrupt register was cleared before entering the task irq handler. Add a 5ms latching time address the issue. Check it was not a problem for regular operation. - Fix FIFO interrupt setting: interrupt when FIFO was full was missing from one register - Really disable FIFO when AP does not want data from sensors. BRANCH=smaug BUG=b:23570481 TEST=check that significant motion and double tap are reliable in S3. Change-Id: Iec3681da00462b1aa392056eecea4ee6862d42ee Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/298689 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* driver: bmi160: Allow double tap to be set by the host.Gwendal Grignou2015-09-212-9/+30
| | | | | | | | | | | | | | In S0, allow the host to enable/disable double tap. Set S0 accel frequency to 100Hz to track double tap event. BRANCH=smaug BUG=chrome-os-partner:44754 TEST=check CTS results are identical to previous runs. Check we can enable/disable double tap from the host. Change-Id: Ic36bdd77005a1152fd413fb3869c8a77ef680117 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/298685
* common: motion: Fix accelgyro interfaceGwendal Grignou2015-09-212-6/+6
| | | | | | | | | | | | Use const struct motion_sensor when needed. BRANCH=smaug BUG=chrome-os-partner:44754 TEST=compile Change-Id: Ib1e92b91439e6af83aa7b6b49ac9e6271d4ed3d9 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/298684
* common: motion: Add double tap gesture host interfaceGwendal Grignou2015-09-213-9/+25
| | | | | | | | | | | | | | Allow the host to enable/disable double tap. Send event when double tap is present. Also fix a bug when scanning for gestures. BRANCH=smaug BUG=chrome-os-partner:44754 TEST=compile. Check on Ryu. Change-Id: I50d008cd3823072ab1c1e2d21f1276cd2185d797 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/298683
* ryu: Enable Significant motionGwendal Grignou2015-09-212-10/+17
| | | | | | | | | | | | Enable significant motion in BMI160 and from the host. BRANCH=smaug BUG=b:23570481 TEST=On Ryu, check significant motion (not still) is detected. Change-Id: I7d524576f18829f79991d731c5691b3d2bba5d36 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/296215
* driver: bmi160: Add Significant motion support.Gwendal Grignou2015-09-212-0/+116
| | | | | | | | | | | | Add support for significant motion. BRANCH=smaug BUG=b:23570481 TEST=On Ryu, check significant motion (not still) is detected. Change-Id: I5760a1ba3624490a0297de82371b1d15f05df5dc Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/296214
* common: Add __fls functionGwendal Grignou2015-09-217-13/+16
| | | | | | | | | | | | | | | Returns the most significant bit set. Replace 31 - __builtin_clz(x), so x must be different from 0. Use get_next_bit when not on the performance path, on performance path set the bit field just after reading it. BRANCH=smaug BUG=none TEST=compile, check Ryu still works. Change-Id: Ie1a4cda4188f45b4bf92d0549d5c8fb401a30e5d Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/301300
* stm32: Define a larger task size for HOST_CMDGwendal Grignou2015-09-202-3/+6
| | | | | | | | | | | | | | The current largest task size is not big enough, we get stack overflow after one or several calibration requests. BRANCH=smaug BUG=chrome-os-partner:45570 TEST=After the change a loop of calibrate does not crash the EC. Change-Id: I9681a890eddf274ab496e8ca6249c7ebca5edab5 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/301215 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* driver: bmm150: fix repetiton registersGwendal Grignou2015-09-201-2/+2
| | | | | | | | | | | | | | Rereading the spec, the repetition registers are massaged by the chip to produce the repetition value: for XY: 1 + 2 * REPxy, Z axis: 1 + REPz BRANCH=smaug BUG=chrome-os-partner:39900 TEST=check the registers matches the spec. Change-Id: Ic8618d70c18b4f408e3c95acdbe7fcdf6d95e39e Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/299582 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* common: motion: Fix oversampling calculation.Gwendal Grignou2015-09-191-4/+6
| | | | | | | | | | | | | | | | | | Was setting frequency radix at 1 mHz. That would limit frequency to 32Hz, which is not enough for accelerometor. Set radix as a fixed point or float variable, to calculate the rate properly. BRANCH=smaug BUG=None TEST=Check that when Ryu set accelerometer to 100Hz internally (for double tap), that AP gets data when requested frequency is 15Hz. Change-Id: I84e0ea784f8bd04566aa91bc4300cf4ff30b350c Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/298688 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* driver: si114x: fix typoGwendal Grignou2015-09-191-1/+1
| | | | | | | | | | | | | If/When si1142/si1143 are used, we would upload 2/3 IR LED data. BRANCH=smaug BUG=None TEST=compile, data still valid for si1141. Change-Id: I39cd15d3c791ed514e4e122ddab3d3571edc43f9 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/298687 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* common: accel: Add error code for irq handlerGwendal Grignou2015-09-195-7/+16
| | | | | | | | | | | | | | | | | | When IRQ handler is not processing any event raised, return NOT_HANDLED. Without this change, any event would set the light sensor process timestamp and, if the light sensor frequency was lower than BM160 fifo interrupt frequency, we would never read from the light sensor. BRANCH=smaug BUG=chrome-os-partner:43800 TEST=Compile. Check that light sensor data get updated. Change-Id: I302f80c5cd9b4f3c926362fdafdc8b5074cabb60 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/298686
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