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* Clear OWNERS for factory/firmware branchfirmware-11297.250.BBrian Norris2021-09-102-10/+1
| | | | | | | | | | | | BUG=none TEST=none Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155131 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Owners-Override: Jora Jacobi <jora@google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* max14637: call bc12_detect in VBUS off can't update charge as availableMarco Chen2021-01-281-21/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Originally bc12_detect function not only detects BC12 status but also update result to charge manager. Now bc12_detect can be called not only when VBUS is on but also off because of CL:2626791. The result is that charge manager would report charging available even if VBUS is off. As a result, we split charger manager update from bc12_detect as the single function so bc12_detect can be called when VBUS is on or off but charger manager update for available charging will be triggered when VBUS is on. BUG=b:177845650, b:177265749, b:178509655 BRANCH=octopus TEST=make buildall -j 8 TEST=check online parameter in /sys/class/power_supply can report correct value when PD adapter or BC12 charger is plugged in/out. TEST=check `ectool usbpdpower` can report correct values for PD adapter and BC12 charger. Change-Id: Ifc4f23edb9272177a6b3637b812b86cf9bef2378 Signed-off-by: Marco Chen <marcochen@chromium.org> Signed-off-by: Marco Chen <marcochen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2652112 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 302eff661a321bee4bb6420c490f6610e8e48c23) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2654669 Reviewed-by: Henry Sun <henrysun@google.com>
* octopus: set CONFIG_BC12_MAX14637_DELAY_FROM_OFF_TO_ON_MS to 100msyu-an.chen2021-01-251-0/+2
| | | | | | | | | | | | | | | | | | | Set CONFIG_BC12_MAX14637_DELAY_FROM_OFF_TO_ON_MS to 100 ms BUG=b:177265749 BRANCH=octopus TEST=make buildall -j 8 Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: I175b8df258c92b155857a0b41d930fe157420a31 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644781 Tested-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org> Auto-Submit: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> (cherry picked from commit d032dc3c0eda33a3e0361e6f4794fc8e70e915ae) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644793
* max14637: Switch should not be kept open when PD adapter is disconnectedyu-an.chen2021-01-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Root Cause: D+ and D- of PD adapter are shorted so chip would detect PD adapter as the DCP. As a result, chip would set USB 2 switch open based on product spec. Later on once USB 2.0 storage is attached, DUT can't recognize it because USB 2.0 data path is blocked by chip now before introducing this CL. Solution: Whenever adapter or USB client device is disconnected from a port of DUT, we re-trigger the bc12_detect() so chip will be off then on for detecting the status again. In this case, the D+/D- are NC so chip will detect it as the SDP and keep this status afterward. When USB 2.0 storage is connected later, bc12_detect will not be called again due to DUT is in source role. At this moment, USB switch is closed so USB 2.0 path is good. And there is no BC12 detecting cycle happened so we will not hit issue resolved in CL:*2364342 as well. When adapter is connected again, bc12_detect will be triggered for detecting DCP / SDP / CDP. BUG=b:177265749 BRANCH=octopus TEST=make buildall -j 8 TEST=check lsblk , usb2 device is exist after reproduce step Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: I769e9f97daf86992259d8da0bbb38a1068bd8a5a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2626791 Tested-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org> (cherry picked from commit 8b5963199b0a7da1274b8ce6296745e01ebba079) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644792 Auto-Submit: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com>
* bobba: Add base accel/gyro config for icm-426xxDavid Huang2021-01-135-2/+106
| | | | | | | | | | | | | | Add icm-426xx config for new second source base accel/gyro. BUG=b:174628541 BRANCH=octopus TEST=Check ectool motionsense and get x,y,z data. Change-Id: I7ba4bd4b90e270cc39c4b01c5aab24d5d1c3f097 Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2592529 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Commit-Queue: Zhuohao Lee <zhuohao@chromium.org>
* icm426xx: reset data rate when initDavid Huang2020-12-291-0/+2
| | | | | | | | | | | | | | | When icm426xx init, reset data rate to enable sensor. BUG=chromium:1160266 BRANCH=main TEST=Check ectool motionsense get data after shutdown and power on. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I0a1042eaf6dbdb132c4bb50975eae3c6f0cfad00 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2598314 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
* driver: add icm426xx chip type defineJean-Baptiste Maneyrol2020-12-222-0/+4
| | | | | | | | | | | | | | | | | | | | | Add new enum motionsensor_chip and update ectool motionsense. BUG=chromium:1117541 BRANCH=None TEST=ectool motionsense info Cq-Depend: chromium:2317888 Signed-off-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> Change-Id: I07736d61bdb7332bfdc44c8f7294233e43a6e00d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2374647 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2584557 Commit-Queue: Zhuohao Lee <zhuohao@chromium.org> Tested-by: David Huang <david.huang@quanta.corp-partner.google.com> Auto-Submit: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* driver: add ICM-426xx driver supportJean-Baptiste Maneyrol2020-12-229-0/+1581
| | | | | | | | | | | | | | | | | | | | Add ICM-426xx accel/gyro driver code. BUG=chromium:1117541 BRANCH=None TEST=ectool motionsense fifo_read && tast run hardware.SensorRing Signed-off-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> Change-Id: I83fe48abc6aa9cde86576a777ac4272d90fac597 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2317888 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2584545 Tested-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Commit-Queue: Zhuohao Lee <zhuohao@chromium.org> Auto-Submit: David Huang <david.huang@quanta.corp-partner.google.com>
* i2c: add generic read/modify/write operationsDenis Brockus2020-12-152-0/+137
| | | | | | | | | | | | | | | | | | | | i2c_update is used to set or clear a mask i2c_field_update is used to clear out a field before the set BUG=none BRANCH=none TEST=make buildall -j Change-Id: I7f8f93f4894fb9635092931a93961d328eacfeb9 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1956437 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2584544 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Tested-by: David Huang <david.huang@quanta.corp-partner.google.com> Auto-Submit: David Huang <david.huang@quanta.corp-partner.google.com>
* casta: change CONFIG_BC12_MAX14637_DELAY_FROM_OFF_TO_ON to 100Marco Chen2020-12-071-0/+4
| | | | | | | | | | | | BUG=b:173166535 BRANCH=octopus TEST=build and flash to casta; verify whether BC12 can detect CDP/DCP/SDP correctly. TEST=`make buildall -j` Signed-off-by: Marco Chen <marcochen@chromium.org> Change-Id: I6e3b9d79416a0cdf8200dae16e22cf0b2564c391 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2573657
* max14637: add a config to define delay in ms from power off to onMarco Chen2020-12-072-1/+3
| | | | | | | | | | | | BUG=b:173166535 BRANCH=octopus TEST=Change delay to 100; build and flash casta; verify whether BC12 can detect CDP/DCP/SDP correctly. TEST=`make -j buildall` Signed-off-by: Marco Chen <marcochen@chromium.org> Change-Id: I08cd881a2413e540eaaab3789f98e28f39514ad5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2573656
* pd: Don't request LPM in DRP_TOGGLE if cc is not openScott Collyer2020-12-011-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, LPM_REQUESTED flag is always set in the DRP_AUTO_TOGGLE state. This is true even when the next state will be SNK_DISCONNECTED or SRC_DISCONNECTED. This setting makes sense for SNK_DISCONNECTED as when the AP is not in S0, then auto toggling will be disabled so the PD state machine should remain in SNK_DISCONNECTED until something is attached. But for the transition from DRP_TOGGLE to SRC_DISCONNECTED should only happen when either an adapter gets attached while the AP is in S0, or the chipset enters S0 with an adapter already attached. This 2nd case is problematic as if LPM_REQUESTED is set and there is no CC event pending, the PD task will get suspended (wait = -1) and therefore remain in SRC_DISCONNECTED. This CL modifies the existing logic to not set LPM_REQUESTED when something is attached as given by the CC1 and CC2 values. BUG=b:137697655, b:172985020 BRANCH=none TEST=Tested both EC reboot and resume from suspend with a USB stick connected via a type C->A adapter and verified that the PD state machine advances to PD_STATE_SRC_DISCOVERY as expected and the USB stick enumerates. Change-Id: I6afbd642ce38134ddabd20f7dc5e15f937b9810a Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1730967 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org> (cherry picked from commit bda667fd25c0247e01bc538be4dd191fb6b3a8cf) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2565223 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Tested-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* Fleex: enable 2nd ppc source syv682xelthanhuang2020-11-193-3/+59
| | | | | | | | | | | | | | | | | | | | | This patch adds 2nd ppc source syv682x base on GPIO97 status. BUG=b:160139798 BRANCH=octopus TEST=The GPIO97 high can switch PPC from NPX to syv682x code. Change-Id: If813ed6993338981417d7271bf0920f15bdb5e1a Signed-off-by: Matt_Wang <Matt_Wang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2291451 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: Matt Wang <matt_wang@compal.corp-partner.google.com> (cherry picked from commit f0ed846e721e7c7fc6fbf4b49a3afc485d8512ac) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2543576 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* Dorp: Add CosMX B00C4473A9D0002 batteryDevin Lu2020-11-172-0/+30
| | | | | | | | | | | | | | | BUG=b:173334879 BRANCH=firmware-octopus-11297.B TEST=Test on charging/discharging/battery cut off pass. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Ib204522d91d53cd82837e1c4a77ddcd1659ff640 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2537828 Reviewed-by: Diana Z <dzigterman@chromium.org> (cherry picked from commit af33a4479d3e42248db4716e7c3a08198e4bd216) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2543564 Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com>
* Casta : Write input current limit on AC removalYongBeum.Ha2020-10-231-0/+13
| | | | | | | | | | | | | | | | Input current limit is set to default when AC is removed. It needs to change input current on AC removal. BUG=b:169259388 BRANCH=firmware-octopus-11297.B TEST=None Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: Ia6d6a28bb418b475513bd541498646f2e1cc70dc Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2430906 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* Casta : Support Multi-ChargerYongBeum.Ha2020-10-2315-101/+236
| | | | | | | | | | | | | | | | Casta need to support 2 chargers(ISL9238 & BQ25710) BUG=b:168122776 BRANCH=firmware-octopus-11297.B TEST=Build, flash EC and check with each system that have BQ25710 and ISL9238 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I18758acbd0920132c2958bf9d238b4eac3fb5b73 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428358 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* Octopus: Add SSFC field for ChargerYongBeum.Ha2020-10-232-0/+17
| | | | | | | | | | | | | | Casta need to support 2 chargers(ISL9238 & BQ25710) BUG=b:168122776 BRANCH=firmware-octopus-11297.B TEST=None Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I6fdc7fefd5923ee1b168e6f0ec9defa19de7cb81 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428357 Commit-Queue: Marco Chen <marcochen@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* casta : remove rev0 configurationYongBeum.Ha2020-10-231-11/+0
| | | | | | | | | | | | | casta doesn't support rev0 board. BUG=None BRANCH=firmware-octopus-11297.B TEST=None Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I41fd8bbb6b4d26f0d5f633db8c37b5c46cce6422 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2473620 Commit-Queue: Marco Chen <marcochen@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Charger: Create charger driver structureDiana Z2020-10-2316-699/+2425
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With upcoming boards which use multiple charger chips, the EC codebase needs to be changed to assume chargers may have different I2C ports. This commit creates the driver structure and wrapper functions, which for now are hard-coded to chip 0 for equivalent behavior with previous code. A general charger config is created for all boards in charger.c for now, which uses the build information to fill in the structure. All boards will default to defining CONFIG_CHARGER_SINGLE_CHIP, which in turn defines a CHARGER_SOLO which can be used by drivers which have code that needs to determine charger numbers. For boards which have multiple chips, they may undefine this config and should generate build errors if their driver is still using the hardcoded charger reference of CHARGER_SOLO. Older drivers may continue using CHARGER_SOLO in non-static functions until they're needed in a multiple charger board. For boards which may be supporting different I2C configurations for the charger over board versions, they may define CONFIG_CHARGER_RUNTIME_CONFIG to fill in these fields after boot. BRANCH=none BUG=b:147672225 TEST=builds, chargers on hatch and octopus work Change-Id: I390ede494226252e512595c48099fa1288ffe93e Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008451 Reviewed-by: Jett Rink <jettrink@chromium.org> Signed-off-by: YongBeum Ha <ybha@samsung.com> Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2407620 Commit-Queue: Marco Chen <marcochen@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* garg360: add LTE SKU IDDevin Lu2020-10-151-2/+2
| | | | | | | | | | | | | | | | Add SKU ID for LTE. BUG=b:170708728 BRANCH=firmware-octopus-11297.B TEST=make buildall Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Ia041a533982aa408c2f77de61b72089229602879 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2473623 Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com> (cherry picked from commit 1b4f3397354d84b307de5db359f127c2e2be3854) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2474975
* Bipship: Add CosMX B00C4473A9D0002 batteryDevin Lu2020-10-132-0/+30
| | | | | | | | | | | | | | | BUG=b:170531238 BRANCH=firmware-octopus-11297.B TEST=Test on charging/discharging/battery cut off pass. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I64745eeecf97c1e47abde707c61591ead0527985 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2459987 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Henry Sun <henrysun@google.com> (cherry picked from commit 1e41b8c4b09c42898358a67db8f75a50181c3621) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2465619 Commit-Queue: Henry Sun <henrysun@google.com>
* it83xx/keyboard: enable push-pull for KSO2Dino Li2020-10-132-1/+5
| | | | | | | | | | | | | | | | | | | | | | This change enables push-pull for EC's KSO2 if CONFIG_KEYBOARD_COL2_INVERTED is enabled (H1 inverts signal of column 2 to keyboard). BUG=b:169715234 BRANCH=octopus TEST= EC is able to drive KSO2 which connected to H1 to 3.3V. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I61e07a15be2c5275363f358bf539c3311305d845 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2437722 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> (cherry picked from commit 2f16162c2bc80c94c8dd2a652cbd682c3a499746) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2449513 Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com>
* max14637: fix build error in firmware-octopus-11297.BJongpil Jung2020-10-081-1/+1
| | | | | | | | | | | | | | | | | | | | | firmware-octopus-11297.B doesn't have CL:1991844. When we cherry-pick CL:2086731 into firmware-octopus-11297.B, we will meet build error. To fix build error, we need to use pd_get_role instead of pd_get_power_role. BUG=b:169292275,b:147833952 BRANCH=firmware-octopus-11297.B TEST=emerge-hatch chromeos-ec Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com> Change-Id: I47cfea16bacdccbb26089084472b6d540fa75ea0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2121883 Reviewed-by: Bob Moragues <moragues@chromium.org> Commit-Queue: Bob Moragues <moragues@chromium.org> (cherry picked from commit 50f778e1fd21ce63de1939d70bee3f1b1dd8124a) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2364343 Tested-by: Inno.Park <ih.yoo.park@samsung.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* max14637: Modify driver to have chip_enable active by defaultScott Collyer2020-10-081-21/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The max14637 provides client mode bc1.2 detection, and the driver enables bc1.2 detection or turns off the IC bases on VBUS changes. However, the driver does not current differentiate between VBUS resulting for the port acting as a sink or source. The result is that bc1.2 detection is also tirggered when the port is acting as a source. This can cause interop issues with other devices which aren't expecting bc1.2 detection singaling in this case. This CL modifies the driver so that the max14637 enable is on by default. This results in the bc1.2 driver being mostly a NOP when the port power role is a source. If the port power role is a sink, then the enable line is pulsed low so that bc1.2 client detection is triggered as expected. BUG=b:169292275,b:147833952 BRANCH=firmware-octopus-11297.B TEST=Verfied that the device which previously was not enumerating, does enumerate. Test both legacy chargers to ensure that client bc1.2 works as expected. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I8bfd243e312c7238a6668edcdfcde2ac0ae5d580 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2086731 Reviewed-by: Shelley Chen <shchen@chromium.org> Commit-Queue: Shelley Chen <shchen@chromium.org> Tested-by: Shelley Chen <shchen@chromium.org> (cherry picked from commit e8dc03b3cb24df99f41311e842a5641425cfa871) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2364342 Tested-by: Inno.Park <ih.yoo.park@samsung.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Bob Moragues <moragues@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* BQ25710 : Change Voltage StepYongBeum.Ha2020-10-071-1/+1
| | | | | | | | | | | | | | Voltage Step of MAX voltage is 8mV. BUG=b:169390177 BRANCH=None TEST=None Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I299ac62b62ebde802211e1a323b227e1a1d9b3c4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428360 Reviewed-by: Justin TerAvest <teravest@chromium.org> Commit-Queue: Justin TerAvest <teravest@chromium.org>
* Battery: Apply faked state of charge to remaining capacityDaisuke Nojiri2020-10-031-6/+22
| | | | | | | | | | | | | | | | | | Currently, only the state of charge is modified by battfake command. This patch applies the faked state of charge to the remaining capacity as well. BUG=b:163721887 BRANCH=Octopus TEST=Verified Fleex wakes up host on BATTERY_LEVEL_CRITICAL. TEST=Verified powerd reports faked state of charge. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I34eb409bab129804a983abbe2a1d021298ce044e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432865 Reviewed-by: Todd Broch <tbroch@chromium.org> (cherry picked from commit f366710eb8076fb45609ca4a3878cf6f7796c1e5) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2447310
* pd_protocol: Don't DRP toggle lower than S0.Aseda Aboagye2020-09-302-23/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently our USB PD protocol stack has "low power mode" tightly coupled with PD_STATE_DRP_AUTO_TOGGLE. In addition, it has the side effect of us dual role toggling (and resolving as sources) even though we have no intention of being a source. (e.g. DRP toggle in S0, once we suspend we're still toggling, even after shutting down to S5, we're still toggling.) This commit makes it such that we not dual role toggle in those lower power states, but instead behave properly as a sink and present only the Rd's. It also fixes a bug where if a port was previously sourcing in S0 and remained sourcing in suspend, if the sink was unplugged the port would be stuck presenting Rp's until a sink was plugged and unplugged again. BUG=chromium:902437 BUG=b:119055792 BUG=b:164930723 BRANCH=firmware-nocturne-10984.B TEST=Flash nocturne, use twinkie verify port does not dual role toggle in suspend or off. TEST=Verify that TCPC goes into low power mode in SNK_DISCONNECTED. TEST=Verify that charging works in suspend and off. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1320909 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Change-Id: Ie44581a1a1a82cf29a786b57a71ce70760862ca2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1667940 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org> Auto-Submit: Scott Collyer <scollyer@chromium.org> (cherry picked from commit c00ca2d3d8e8662dd048f107999f09fee4a301f4) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2437575 Tested-by: Raymond Chung <raymondchung@ami.corp-partner.google.com> Reviewed-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Raymond Chung <raymondchung@ami.corp-partner.google.com> Commit-Queue: Philip Chen <philipchen@chromium.org>
* Reland "phaser: Add PPC syv682x config"jerry2.huang2020-09-303-3/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a reland of a4aef3c715c9f678af9e1304b054ec4e7e6668c7 Original change's description: > phaser: Add PPC syv682x config > > Supoprt PPC SYV682X on Phaser-R series > > BUG=b:160940803 > BRANCH=firmware-octopus-11297.B > TEST=make buildall > > Change-Id: I7e0c66cc0626eda92985ebc40430039ba2094ae8 > Signed-off-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2413972 > Reviewed-by: Marco Chen <marcochen@chromium.org> > (cherry picked from commit fc1e2c342c9da90e5629c4344373b63802e09997) > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2425985 > Reviewed-by: Henry Sun <henrysun@google.com> > Commit-Queue: Henry Sun <henrysun@google.com> > Tested-by: Henry Sun <henrysun@google.com> Bug: b:160940803 Change-Id: I801c4fb178ba68cba73333f6eae8288d347768d3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438079 Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org> Tested-by: Marco Chen <marcochen@chromium.org>
* Revert "phaser: Add PPC syv682x config"Henry Sun2020-09-243-71/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit a4aef3c715c9f678af9e1304b054ec4e7e6668c7. Reason for revert: will need to do additional fix on the build. Original change's description: > phaser: Add PPC syv682x config > > Supoprt PPC SYV682X on Phaser-R series > > BUG=b:160940803 > BRANCH=firmware-octopus-11297.B > TEST=make buildall > > Change-Id: I7e0c66cc0626eda92985ebc40430039ba2094ae8 > Signed-off-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2413972 > Reviewed-by: Marco Chen <marcochen@chromium.org> > (cherry picked from commit fc1e2c342c9da90e5629c4344373b63802e09997) > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2425985 > Reviewed-by: Henry Sun <henrysun@google.com> > Commit-Queue: Henry Sun <henrysun@google.com> > Tested-by: Henry Sun <henrysun@google.com> Bug: b:160940803 Change-Id: I4403af067a6f8aac67ca237cb93db27302503432 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2425994 Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com> Tested-by: Henry Sun <henrysun@google.com>
* phaser: Add PPC syv682x configjerry2.huang2020-09-243-3/+71
| | | | | | | | | | | | | | | | | | Supoprt PPC SYV682X on Phaser-R series BUG=b:160940803 BRANCH=firmware-octopus-11297.B TEST=make buildall Change-Id: I7e0c66cc0626eda92985ebc40430039ba2094ae8 Signed-off-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2413972 Reviewed-by: Marco Chen <marcochen@chromium.org> (cherry picked from commit fc1e2c342c9da90e5629c4344373b63802e09997) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2425985 Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com> Tested-by: Henry Sun <henrysun@google.com>
* Meep: Enable SSFC for PPC on C1 portDevin Lu2020-09-112-17/+56
| | | | | | | | | | | | | | | | BRANCH=firmware-octopus-11297.B BUG=none TEST=Set SSFC value for SYV682x and NX20P348x for two daughterboards. Make sure port can be charged. Remove SSFC field and make sure board is able to recongize correct ppc type by PPC ID. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I1be1c5cf23f1fd7f049fdc3879f16334547ec16a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396097 Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402848 Commit-Queue: Henry Sun <henrysun@google.com>
* Octopus: Add SSFC field for PPCDevin Lu2020-09-113-6/+23
| | | | | | | | | | | | | | | | Octopus already supported SSFC with CL:2377058. This patch extends SSFC field of CBI for PPC. BRANCH=firmware-octopus-11297.B BUG=none TEST=EC log of Meep device can output value of SSFC in CBI. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I1d0815a29673d535e53fdb7efe6b756999bc9f3a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396096 Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402847 Commit-Queue: Henry Sun <henrysun@google.com>
* Meep: Set SYV682x high voltage path ilimit to 5.5ADevin Lu2020-09-111-0/+2
| | | | | | | | | | | | | BUG=b:162221222 BRANCH=firmware-octopus-11297.B TEST=EC console ppc_dump <port> to make sure setting. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I3840e6a86563d2e7faa6eb3c12c51925718ef306 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396098 Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402846 Commit-Queue: Henry Sun <henrysun@google.com>
* Meep: Fix triggering condition for PPC interrupt of SYV682ADevin Lu2020-09-112-10/+23
| | | | | | | | | | | | | | | | Apply CL:2309522 to meep. BUG=none BRANCH=firmware-octopus-11297.B TEST=1. make BOARD=meep. 2. Verify USBC charger is able to charging. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I7407e360bb1521e4a9c5be38111508545a970733 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396095 Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402845 Commit-Queue: Henry Sun <henrysun@google.com>
* meep: enable 2nd TCPC source PS8755 for port 1Marco Chen2020-09-022-0/+21
| | | | | | | | | | | | | | | | | | | | | | | The original TCPC in the port 1 is PS8751 and this CL adds another option of PS8755. These two are all supported by ps8xxx.c and the board function board_get_ps8xxx_product_id is implemented to judge the source by checking the SSFC bits field in the CBI. BUG=b:159082424, b:163922535 BRANCH=octopus TEST=verify DUT with PS8755 or PS8751 in the sub-board can work correctly in sink and source roles. Signed-off-by: Marco Chen <marcochen@chromium.org> Change-Id: I0cba58eb7b22c95aac1344f1b3a68ce5dac43ab0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2377060 Reviewed-by: Diana Z <dzigterman@chromium.org> (cherry picked from commit 868d1c87c241e22b0c353e342486689caf554b9f) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2388362 Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com>
* Octopus: fix the hook priority of cbi_ssfc_init to INIT_I2C + 1Marco Chen2020-09-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | CL:2385015 is a cherry-picked version from ToT where the i2c_init is changed to be earlier then hook task. Therefore the hook priority can be HOOK_PRIO_FIRST for cbi_init_ssfc. In Octopus firmware branch, the i2c_init is still called in HOOK_PRIO_INIT_I2C. As a result, we need to change the hook priority of cbi_init_ssfc; otherwise the i2c module is not initialized before the call of cbi_init_ssfc. BRANCH=octopus BUG=b:163922535 TEST=make sure EC can boot up correctly and not be blocked in cbi_ssfc_init. Signed-off-by: Marco Chen <marcochen@chromium.org> Change-Id: I2932865793a37fefd16915304f018547379ae643 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2387682 Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com> Tested-by: Henry Sun <henrysun@google.com>
* ps8xxx: support multiple chips in the runtimeMarco Chen2020-09-013-111/+290
| | | | | | | | | | | | | | | | BUG=b:159082424 BRANCH=none TEST=verify the same EC image can work on devices with PS8751 or PS8755 for src / snk roles. Signed-off-by: Marco Chen <marcochen@chromium.org> Change-Id: I3a743666a4ccbcae37ecb6f0d6657122cf9c5a69 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2304237 Reviewed-by: Jett Rink <jettrink@chromium.org> (cherry picked from commit d4013027f0f1c95397363b21761085c0d08a6825) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2373850 Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Jett Rink <jettrink@chromium.org>
* driver/tcpm/ps8xxx: Consistent DCI disable methodDevin Lu2020-09-011-46/+19
| | | | | | | | | | | | | | | | | This patch make consistent with DCI disable method for PS8705/PS8805/PS8815, they are in the similar chip group. BUG=b:161202452 BRANCH=none TEST=make buildall -j. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Ia919dab9fb6afd72e3b693d94fe8abee628e2f40 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2313056 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2326070 Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* driver/tcpm: add support for PS8755Devin Lu2020-09-014-9/+21
| | | | | | | | | | | | | | | | The patch adds support for the Parade Tech PS8755 TCPC/SuperSpeed mux. It is similar chip group as PS8705/PS8805/PS8815. BUG=b:159042756, b:159082424 BRANCH=none TEST=make buildall -j. make BOARD=jinlon with this new CONFIG. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I38fa02704cc352da0e27eae8cd8bbce89a807975 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2315968 Commit-Queue: Marco Chen <marcochen@chromium.org> Reviewed-by: Marco Chen <marcochen@chromium.org>
* ps8805: Follow the sequence to enable the DCI register accessWai-Hong Tam2020-09-011-4/+23
| | | | | | | | | | | | | | | | | Follow the sequence in the programming guide to enable the DCI register access, even they are always enabled in the firmware. BRANCH=None BUG=b:161202452, b:147772854 TEST=Tested Trogdor negotiate >5V charging and source power to USB devices. Change-Id: Ia121855cf097fe4b517ceefa461568fbec67b63d Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2304264 Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2315967 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Commit-Queue: Marco Chen <marcochen@chromium.org>
* ps8xxx: add helper function to access alternate I2C pagesCaveh Jalali2020-09-012-4/+4
| | | | | | | | | | | | | | | | | | | | | this provides a helper function for computing the I2C page address of alternate I2C pages available on the ps8xxx family of chips. [This is 8-bit I2C address scheme used for firmware branch] BRANCH=none BUG=b:158857815,b:159289062 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I121ec9f2beaadf3e4e3c429d177fe38eb2976be8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2271700 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2315966 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* PS8805: Do not enable and disable DCI registersWai-Hong Tam2020-09-011-17/+3
| | | | | | | | | | | | | | | | | | | | | | PS8805 is not like PS8751, which needs to rewrite the TCPC reg A0 bit 0 to enable the DCI registers. The DCI registers are always accessible. Also there is a bug on firmware, like 0x8, 0xC, 0xD, that rewriting the reg A0 bit 0 to 1 will make the TCPC I2C not accessible. BRANCH=None BUG=b:147772854 TEST=Verified on Trogdor, fw 0xC, 0xD, and 0xF, the TCPC I2C is accessible. Change-Id: Ie554d2b4022397801423fb3670305bf536b2cc20 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2015641 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2315965 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* driver/tcpm: Add support for PS8705Aseda Aboagye2020-09-014-2/+48
| | | | | | | | | | | | | | | | | | | | | The commit adds support for the Parade Tech PS8705 TCPC/SuperSpeed mux. It is similar to other Parade TCPCs in its family. BUG=b:158760026 BRANCH=None TEST=`make -j buildall` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I23288757f2baf56742958357b5ee6bac5cffa02f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2243314 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2315964 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* ps8xxx: add support for the ps8815Caveh Jalali2020-09-014-7/+25
| | | | | | | | | | | | | | | | | | | | | | | this adds support for the ps8815 variant of the parade TCPC. this chip is very similar to its predecessors like the ps8751 and ps8805 and can be supported by the same driver. at this point, the TCPM can talk to the chip but we don't properly detect chargers - the CC line states seem wrong and CC status changes do not trigger an ALERT in the ps8815. BRANCH=none BUG=b:144397088,b:147459088 TEST=EC detects the chip on boot. Change-Id: If86abd1fa21cf8f33f28c4ce89050b29e9408532 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1969524 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2315963 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Commit-Queue: Marco Chen <marcochen@chromium.org> Reviewed-by: Marco Chen <marcochen@chromium.org>
* ps8xxx: disable DCI modeCaveh Jalali2020-09-014-18/+110
| | | | | | | | | | | | | | | | | | | | | | | | DCI mode is auto-enabled by default. we don't actually support DCI (intel specific SoC debug path), so we can explicitly disable DCI mode. doing so, saves about 40mW on the 3.3v rail when USB2 devices or USB-C to USB-A dongles are left plugged in. this is particulary relevant in sleep mode as this accounts for a significant portion of the system power consumption. BUG=b:119875949 BRANCH=none TEST=verified power consumption drops using sweetberry, USB devices still functional across suspend/resume. Change-Id: Id13630425c78965d2ac4f2e97715374ae0640d23 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1732231 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2315962 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* TCPC: Make tcpc_config handle other bus typesDaisuke Nojiri2020-09-0138-164/+362
| | | | | | | | | | | | | | | | | | | | | | | | | Currently, tcpc_config assumes TCPCs are on I2C bus. ITE's EC has an embedded TCPC. This patch adds bus_type field to struct tcpc_config_t so that a TCPC location on other type of bus can be specified. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: Ieac733011700b351e6323f46070dcf46d9e1154b Reviewed-on: https://chromium-review.googlesource.com/1640305 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2315961 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* tcpm: Refactor tcpc_config to include a flags fieldScott Collyer2020-09-0121-58/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | tcpc_config contained a field for both the alert polarity and open drain/push pull configuration. There is also a possible difference in TCPC reset polarity. Instead of adding yet another field to describe this configuration, it would be better to convert alert polairty, open drain and reset polarity into a single flags field. This CL modifies the tcpc_config struct to use a single flags field and adds defines for what existing flag options can be. BUG=b:130194031 BRANCH=none TEST=make -j buildall Change-Id: Ifb7e7604edb7021fb2d36ee279049eb52fefc99e Signed-off-by: Scott Collyer <scollyer@google.com> Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1551581 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2315960 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* cbi: add Second Source Factory Cache (SSFC) CBI fieldMarco Chen2020-09-015-2/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SSFC field will be leveraged to record what second source is used in the DUT by probing components in the factory or RMA. Firmware code should refer to this field to judge what driver should be configured for a specific component. For example, the board code can arrange what sensor driver should be set into motion_sensors array if there are multiple sources of base or lid sensor. As the definition of FW_CONFIG, it describe which "features" the firmware code should enable or disable. For example, whether lid / base sensors should be enabled or not but not care about what second source is in this DUT. Conflict of Cherry-picking: Since FW_CONFIG and PCB_SUPPLIER are not cherry-picked, the SSFC field is amended from CBI_TAG_SSFC = 8 to 6. BRANCH=none BUG=b:163285687 TEST=call `cbi-util` to create the cbi image with SSFC and show created content. TEST=`make buildall -j` TEST=`make runhosttests -j` Change-Id: Icb4aa00ae47ab025198e7fd5edd6aab96a4bf53e Signed-off-by: Marco Chen <marcochen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2344268 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org> (cherry picked from commit 0212d4a3ce01452ddaba46f076f90e9a5e90e589) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2386685 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* cbi: Support PCB supplier fieldAbe Levkoy2020-09-015-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | Add support for PCB_SUPPLIER, to distinguish boards of the same type with different PCB suppliers. BUG=b:140244489 TEST=ectool cbi set 7 0 1 0; ectool cbi get 7 TEST=cbi on EC console after writing with ectool TEST=/usr/share/userfeedback/scripts/cbi_info after writing with ectool TEST=cbi-util create --pcb_supplier 1 ...; cbi-util show ... BRANCH=none Change-Id: Ieadba91694f4775cc86c2c4b09cdf0874b9ad444 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2108710 Reviewed-by: Jett Rink <jettrink@chromium.org> Tested-by: George Engelbrecht <engeg@google.com> Commit-Queue: George Engelbrecht <engeg@google.com> (cherry picked from commit f28e4caa00393a2bf16f37c929d7b5a95e654e90) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2387685 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org> Tested-by: Marco Chen <marcochen@chromium.org>
* cbi: add FW_CONFIG CBI fieldJett Rink2020-09-015-1/+33
| | | | | | | | | | | | | | | | | | | | | | | This field will be used to describe which "features" or path the firmware code should enable or disable. Firmware code should look at the firmware configuration value to make code decision for un-discoverable hardware connections or layouts that differ within the same firmware binary. Firmware should no longer use SKU_ID/VARIANT_ID to make decisions, only this new FW_CONFIG field. BRANCH=none BUG=b:145519081 TEST=Created cbi image with FW_CONFIG field Change-Id: I1db8e7638a15343173ea5061e9038a7d53bda090 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1945821 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 25002abca7e900d6473b40354c8bc79c4dfa11c7) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2387684 Tested-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
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