| Commit message (Collapse) | Author | Age | Files | Lines |
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In Zephyr v2.7, DT_ENUM_TOKEN is deprecated in favor of
DT_STRING_TOKEN. Additionally, DT_ENUM_UPPER_TOKEN is deprecated in
favor of DT_STRING_UPPER_TOKEN.
See the v2.7 release notes for details:
https://docs.zephyrproject.org/latest/releases/release-notes-2.7.html
Since we backported the DT_STRING_* macros to our v2.6 branch, let's
switch to them ahead of time to prepare for the v2.7 uprev.
Note: the DT_STRING_* macros are compatible with Zephyr's device tree
enums, but also allow non-enum properties to be used in the same
fashion. This commit does the bare minimum for compatibility with
v2.7, i.e., just swap the macros without dropping enum properties
anywhere. We should investigate whether we want to continue using the
enum properties or abandon some of them for any string in the future.
BUG=b:198824039
BRANCH=none
TEST=zmake testall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I1efd8f99bc7d93504c0ab94510406cd36ad24cd3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3144536
Reviewed-by: Keith Short <keithshort@chromium.org>
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In Zephyr 2.7+, CONFIG_UART_SHELL_ON_DEV_NAME is removed in favor of
using the zephyr,shell-uart device chosen by the UART driver. Since
we choose zephyr,shell-uart on all of our boards, we are clear to make
this change ahead of the v2.7 uprev.
Also see https://github.com/zephyrproject-rtos/zephyr/pull/37902.
BUG=b:198824039
BRANCH=none
TEST=zmake testall
TEST=compile posix-ec with v2.7_rc1
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Ic066ce0617fa900ae7c1c96a2cbece0b698764bc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3142750
Reviewed-by: Keith Short <keithshort@chromium.org>
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This commit is for motion sensor combine(BMI160 & BMI260),Avoid redefine
gesture function `list_activites`.
BUG=b:195908820
TEST=make -j BOARD=coachz
Verify build on SIT board
BRANCH=Trogdor
Signed-off-by: pengjunhao5 <pengjunhao5@huaqin.corp-partner.google.com>
Reviewed-by: tongjian <tongjian@huaqin.corp-partner.google.com>
Reviewed-by: yudengwu <yudengwu@huaqin.corp-partner.google.com>
Change-Id: If31442d0c00745d124b20188b4e5fad8a9a1d173
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3133188
Reviewed-by: Jian Tong <tongjian@huaqin.corp-partner.google.com>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This patch add 5v regulator thermistor.
BUG=b:193395015
BRANCH=none
TEST=verify 5v regulator thermistor can be read.
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I1fc0cd6b5341f18100ac80e24cb884d53df7e4a0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3132555
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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This patch move thermal sensor and setting to variant,
let variant have their own setting.
BUG=none
BRANCH=none
TEST=make BOARD=dewatt, make BOARD=guybrush,
make BOARD=nipperkin
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: Ibf37a0a45d1a728abc5ed88dde230f0561698bbc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3132547
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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Add eel to variants to enable GMR sensor for tablet mode function.
BUG=b:199033321
TEST=make
BRANCH=trogdor
Signed-off-by: Siyu Qin <qinsiyu@huaqin.corp-partner.google.com>
Change-Id: I5aeea9ec67f9f28b9e823876cf89a2dc8998f114
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3143406
Reviewed-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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Use 32k clock instead of ULPOSC can significantly reduce the power
consumption of SCP under S3 stage, and still able to kick SCP WDT.
BRANCH=none
BUG=b:197937562
TEST=low scp power in S3 stage
Change-Id: If2f68a5b11e93c7e6badf2e4893f649700b5af2e
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3131409
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
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When interrupts are disabled we should follow the same path like in
case when we are in interrupt context. This will fix infinite loop when
calling uart_flush_output() (eg. when ASSERT is triggered) with disabled
interrupts
BUG=b:190597666
BRANCH=none
TEST=Trigger ASSERT when interrupts are disabled. Make sure that panic
message is shown. Perform this test on following cores:
cortex-m - this is the most common core, eg. bloonchipper
minute-ia - this is used for Intel Sensor Hub (cros_ish)
eg. drallion board
riscv-rv32i - hayato (asurada family) has EC chip based on risc-v
nds32 - ampton (octopus family) has EC chip based on it
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: If88881c6444a40a9c6459d8a6ff42f3ad4c4d750
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953234
Commit-Queue: Marcin Wojtas <mwojtas@google.com>
Tested-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Switching task with disabled interrupts leads to Hard Fault on
Cortex-M0 because:
- SVCall exception have configurable priority (full list can be found
at 2.3.2 Exception types PM0215 p.23)
- We are using 'cpsid i' to disable interrupts. This instruction sets
PRIMASK bit (3.7.2 CPSID CPSIE PM0215 p.62)
- When PRIMASK bit is set, all exceptions with configurable priority
are disabled (PM0215 p.16), so SVCall is masked too
If Hard Fault is inevitable, it will be a good idea to catch this
earlier. It will save time spent debugging why Forced Hard Fault
happens. In functions responsible for enabling, disabling or making
task ready we postpone task switch when interrupts are disabled
BUG=b:190597666
BRANCH=none
TEST=Compile and flash EC on boards with Cortex-M0 and make
sure that it works properly.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: Id3be74e977ae5d5eed79aad78ee378fa413ed4ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953229
Commit-Queue: Marcin Wojtas <mwojtas@google.com>
Tested-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Switching task with disabled interrupts leads to Forced Hard Fault on
Cortex-M3/M4/M7 because:
- SVCall exception have configurable priority (full list can be found
at 2.4.2 Exception types PM0253 Rev 5 p.40)
- We are using 'cpsid i' to disable interrupts. This instruction sets
PRIMASK bit (3.12.2 CPS PM0253 Rev 5 p.176)
- When PRIMASK bit is set, all exceptions with configurable priority
are disabled (PM0253 Rev 5 p.25), so SVCall is masked too
- SVCall is escalated to Forced Hard Fault because "A fault occurs
and the handler for that fault is not enabled" (PM0253 Rev 5 p.48)
If Hard Fault is inevitable, it will be a good idea to catch this
earlier. It will save time spent debugging why Forced Hard Fault
happens. In functions responsible for enabling, disabling or making
task ready we postpone task switch when interrupts are disabled
BUG=b:190597666
BRANCH=none
TEST=Compile and flash EC on boards with Cortex-M3/M4/M7 and make
sure that it works properly.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I50976154b0cf0307c5334f6f03e4b3bc137a4ffc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953228
Commit-Queue: Marcin Wojtas <mwojtas@google.com>
Tested-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add a function that will provide information if interrupts are enabled.
This information will be used to fix shortcomings in common code for
UART buffering and usleep().
BUG=b:190597666
BRANCH=none
TEST=make -j buildall
TEST=make runhosttests
TEST=Note for running tests: this patch only adds function
implementation so, to test this it is necessary to add some code
which uses the function eg. console command which prints
information if interrupt is enabled.
Minute-ia core: It is necessary to compile firmware for
ISH (Intel Sensor Hub) which is available on drallion board
(eg. chromeos6-row1-rack9-host19). Firmware must be placed in
/lib/firmware/intel/drallion_ish.bin (partition must be writeable,
if not use /usr/share/vboot/bin/make_dev_ssd.sh on DUT tu unlock
it, don't forget about reboot). After copying firmware to
/lib/firmware/intel/ it is necessary to reboot DUT. After reboot
use `ectool --name=cros_ish version` to check if correct version
is running.
NDS32 core. This core is used in it8320dx chip which is present in
ampton (octopus family). EC can be compiled using
'make BOARD=ampton' and flashed using
'chromeos-firmwareupdate -e ec.bin', but EC software sync needs to
be disabled using 'set_gbb_flags.sh 0x200'
Riscv-rv32i core, hayato (asurada family) uses it81202 as EC which
is based on risc-v. EC can be compiled using 'make BOARD=hayato'
and flashed using 'chromeos-firmwareupdate -e ec.bin', but EC
software sync needs to be disabled using 'set_gbb_flags.sh 0x200'
Cortex-M, this is the most common core. Just compile EC for
platform which contains Cortex-M core (eg. bloonchipper) and test
if it works.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I502553cd57e6ce897d5845a3aad01a44a9058405
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953227
Commit-Queue: Marcin Wojtas <mwojtas@google.com>
Tested-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Fix kano led pwm count.
Kano only have one led.
BUG=none
BRANCH=none
TEST=make buildall -j succeed.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: Ib2ece8a1ab3591ab91bfb4c8b95701cce7789cb5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139856
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
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Change the RTC driver from the Zephyr MTC driver to
the Zephyr PCF85063A driver.
BRANCH=none
BUG=b:194710429
TEST=ectool rtcset 30000
ectool rtcget
Current time: 0x0000753d (30013)
ectool rtcsetalarm 10
after ~10 (measured with a timer) printed on
ec console: [160.248900 event set 0x0000000002000000]
I tested the alarm up to one hour.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I6e6f8bb65cb515e0997687ff4beef7620506a57d
herorbrine_npcx9: Configure PCF85063A RTC Alert
Configure the PCF85063A RTC Alert pin so that
it can interrupt the EC on an alarm event.
BRANCH=none
BUG=b:194710429
TEST=ectool rtcset 30000
ectool rtcget
Current time: 0x0000753d (30013)
ectool rtcsetalarm 10
after ~10 (measured with a timer) printed on
ec console: [160.248900 event set 0x0000000002000000]
I tested the alarm up to one hour.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I58ac585c2d566d306625dd8034377925eba36293
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3140328
Reviewed-by: Keith Short <keithshort@chromium.org>
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Export these declarations that get DT parameters to the header file.
BUG=b:198305804
BRANCH=none
TEST=none
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Change-Id: I6580aa2b6ae69c3727da20840148c6bc66169c0e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139529
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Add hibernate flag. Before system reset, it should be distinguished as
hard reset or hibernate reset and saved in BBRAM.
BUG=none
BRANCH=none
TEST=none
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Change-Id: I0e06f3d1bea89ead1795cc07677e22e841643a97
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139528
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Use the zephyr_cc_option function instead of modifying CMAKE vars.
BUG=b:178731498
TEST=zmake testall in docker container
BRANCH=None
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: I97e6481e9ba3fb865e7ad49e029dfa50731a7fe6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3140779
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
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felwinter configure battery parameters.
BUG=b:197593415
BRANCH=none
TEST=make -j BOARD=felwinter
Signed-off-by: Owen_Ou <Owen_Ou@compal.corp-partner.google.com>
Change-Id: Ieab8b91a4c89c9050cdbc69f77428a941f2cd9b9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3114328
Tested-by: Owen Ou <owen_ou@compal.corp-partner.google.com>
Auto-Submit: Owen Ou <owen_ou@compal.corp-partner.google.com>
Reviewed-by: Ko Ko <ko_ko@compal.corp-partner.google.com>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
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BUG=b:197301321
BRANCH=main
TEST=make -j BOARD=taeko
Signed-off-by: amber.chen <amber.chen@lcfc.corp-partner.google.com>
Change-Id: I6af1230f75c11b8fa766ef779b9e64e15ad7eb3f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3122695
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
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Remove duplicated Kconfig option for EC_BATTERY_REVIVE_DISCONNECT
BRANCH=main
BUG=none
TEST=Verify that this Kconfig option still exists
Change-Id: I02d8ef4912cff8c4388b2490c73e06b5bffd151a
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3141597
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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There was a comment that described the temperature value as if it was
in 0.1 steps of C degrees, where it was in pure C degrees.
It was converted from steps of 0.1 K to 1 oC.
BRANCH=main
BUG=none
TEST=No need to
Change-Id: I0545588bc29465f2346a30182b89063f5e24fea5
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3111365
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Tested-by: Keith Short <keithshort@chromium.org>
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This commit adds asurada/hayato's batteries definitions to device tree
and removes old battery.c usage in Zephyr.
BRANCH=main
BUG=b:183544739
TEST=Compile and flash CrOS EC firmware to hayato.
It should work the same as without this commit.
TEST=Compile and flash Zephyr, battery should be detected
correctly and its model should be logged in EC console.
Change-Id: I009a1b6d25e72e1c0145f5e8dda38243dfb9a8c8
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3107389
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Tested-by: Keith Short <keithshort@chromium.org>
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This commit adds herobrine's batteries definitions to device tree
and removes old battery.c usage in Zephyr.
BRANCH=main
BUG=b:183544739
TEST=Compile and flash Zephyr, battery should be detected
correctly and its model should be logged in EC console.
Change-Id: I1783715b72863fb947077f8dbde396071433bb44
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3107388
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Tested-by: Keith Short <keithshort@chromium.org>
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This commit adds lazor's batteries definitions to device tree
and removes old battery.c usage in Zephyr.
BRANCH=main
BUG=b:183544739
TEST=Compile and flash CrOS EC firmware to lazor.
It should work the same as without this commit.
TEST=Compile and flash Zephyr, battery should be detected
correctly and its model should be logged in EC console.
Change-Id: I937f7b56cb5acdea949a655cc2a107f360cbf535
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3107387
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Tested-by: Keith Short <keithshort@chromium.org>
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This commit adds trogdor's batteries definitions to device tree
and removes old battery.c usage in Zephyr.
BRANCH=main
BUG=b:183544739
TEST=Compile and flash CrOS EC firmware to trogdor.
It should work the same as without this commit.
TEST=Compile and flash Zephyr, battery should be detected
correctly and its model should be logged in EC console.
Change-Id: I75c30b4d278dbb88ff4e0776924d9b85d3d0b4ad
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3107386
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Tested-by: Keith Short <keithshort@chromium.org>
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This commit adds possibility to define board's batteries in device
tree. Default battery is defined by adding "default_battery" as node's
label.
It also adds common batteries definitions that can be used using
compatible string.
If no 'batteries' node is defined in device tree, custom board's
logic must be used and old "named-batteries" should be defined.
BRANCH=main
BUG=b:183544739
TEST=This commit shouldn't change behaviour of any build.
Compiling and flashing CrOS EC and Zephyr should
work without problems.
Change-Id: I94f0121f45eb061f1358fadbcd7d8006c08b0bea
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3107385
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Fix a rounding error. See documentation for details. It is important
to include the detailed documentation as it provides strong details
for why these flags are necessary. It will avoid confusion in the
future.
BRANCH=none
BUG=b:178731498
TEST=zmake configure --test zephyr/test/accel_cal (both in chroot and
in gitlab docker).
Change-Id: Ie040f49dfaacb84dc10b76481a16213be6a2f09e
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139254
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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This commit is for second source motionsensor combine(BMI160 & BMI260),
We use chip id to detect which MotionSensor is on the board but flash
is not enough so we reduce some console cmd.
BUG=b:195908820
TEST=make -j BOARD=coachz
Verify build on SIT board
BRANCH=Trogdor
Signed-off-by: pengjunhao <pengjunhao5@huaqin.corp-partner.google.com>
Reviewed-by: tongjian <tongjian@huaqin.corp-partner.google.com>
Reviewed-by: yudengwu <yudengwu@huaqin.corp-partner.google.com>
Change-Id: I396052cb5996858507864c5201c2d93f1a885618
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139717
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Jian Tong <tongjian@huaqin.corp-partner.google.com>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Zephyr PCF85063A RTC driver
BRANCH=none
BUG=b:194710429
TEST=ectool rtcset 30000
ectool rtcget
Current time: 0x0000753d (30013)
ectool rtcsetalarm 10
after ~10 (measured with a timer) printed on
ec console: [160.248900 event set 0x0000000002000000]
I tested the alarm up to one hour.
Hibernation test:
$ rtc
RTC: 0x00047624 (292388.00 s)
$ hibernate
Hibernating until wake pin asserted.
# Wait approx. 30s before pressing power button
[Reset cause: hibernate wake-pin]
$ rtc
RTC: 0x00047645 (292421.00 s)
# 292421s - 292388s = 33s
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I3d5eb7d209dd63df54049a02165076f393d53be1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3115449
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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Enable CONFIG_DEBUG_ASSERT_BRIEF for RO to reduce flash size. Only
applying to RO since that is where space is most limited.
BUG=None
TEST=Build all
BRANCH=None
Change-Id: I29ba1496c75a5cd1ee2e9484f67ce3f08fbda982
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3136038
Reviewed-by: Brian J. Nemec <bnemec@chromium.org>
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We should run all tests on gitlab, that could have caught the breakage
of accel_cal much sooner.
BUG=None
TEST=Pushed to gitlab coverage branch
BRANCH=None
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: I72ba56361b9c796df770ceee7965bd674d9378a7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139096
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Tested-by: Jeremy Bettis <jbettis@chromium.org>
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Added new coverage job to gitlab.
BUG=None
TEST=Pushed to gitlab coverage branch
BRANCH=None
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: I2dd20ee94934b71426e00e8d45b2670f106048ae
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3119210
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Auto-Submit: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
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The coverage report removes the chroot prefix from the paths, but we
need to use the module_paths instead of checkout so it will work on
gitlab.
BUG=None
TEST=Pushed to gitlab coverage branch
BRANCH=None
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: I0ff47d71f95deae55714988f69d710ba95b71e6f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139095
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Auto-Submit: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
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bb_retimier init function is tested with I2C communication errors and
wrong values of BB retimer vendor/device ID.
Init function checks state of AP, so CONFIG_PLATFORM_EC_POWERSEQ is
enabled. CONFIG_PLATFORM_EC_POWERSEQ_INTEL and
CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL are disabled to reduce code
that needs to be mocked.
BUG=b:184856919
BRANCH=none
TEST=make configure --test zephyr/test/drivers
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Ibaed931f54a797d70fa86297b3eb0181ab2a689d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3140205
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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host_command_hibernation_delay() should return enum ec_status and
correct value of this type to indicate success is EC_RES_SUCCESS
BUG=none
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I50902829a7ef5d09786ab81bff9d791bac0dfad6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3140204
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=none
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I3999dbd4300eca80effed7a2d42e153c0ad59543
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3140203
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Align following emulators to use common I2C code:
- bb_retimer
- bma255
- bmi (both 160 and 260)
- smart_battery
- tcs3400
BUG=none
BRANCH=none
TEST=make configure --test zephyr/test/drivers
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I7515407b867487574a29dcae3456d96920a24979
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3140202
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Emulators of I2C devices have similar handling of I2C messages, locking
mechanism for multithread code, custom user functions and user triggered
failing on specific register. These functionalities are exported to
common code which will replace current functions in emulators of I2C
devices.
BUG=none
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Ib2c1a6596127dad1250d0051a312a837fc03ce20
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3140201
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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1.Remove CONFIG_SYSTEM_UNLOCKED
2.Remove CONFIG_USB_PD_DEBUG_LEVEL
BUG=b:196012456
BRANCH=volteer
TEST=make BOARD=chronicler -j 8
Signed-off-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com>
Change-Id: I7c020fa9b95ce3339442a0158216d5d6ad04c863
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3102327
Tested-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com>
Auto-Submit: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com>
Reviewed-by: Isaac Lee <isaaclee@google.com>
Commit-Queue: Isaac Lee <isaaclee@google.com>
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Enable support cec function
BUG=b:197474873
BRANCH=None
TEST=make builadall -j
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I6e626425853ef7261efdb8f40905ddcbfd4f48f1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139615
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Commit-Queue: Zhuohao Lee <zhuohao@chromium.org>
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There are two FIFO buffers for USB-PD packet reception. One is located
in TCPC, another was added in EC layer in crrev/c/1185727 . There are
scenarios that may lead to overflow.
In these scenarios, the EC RX circular buffer overflows without clearing
the TCPC ALERT# signal. This in turn results in a tight-loop in the TCPC
interrupt handler, leading to port "suspend".
This CL is a reduced hotfix to mitigate this scenario. Further CL is
needed to perform proper TCPCI spec-compliant overflow handling.
BRANCH=none
BUG=b:192382194
TEST=1. Connect CB282K via DP to G5 dock on old FW
2. Connect G5 dock to AKEMI on TCPMv1
3. Allow MST VDM:Attention communication to occur
4. Observe EC console prints via SuzyQ
Change-Id: Ic579a3763fc595b8250d4ca78c3942675450295a
Signed-off-by: Nathan K <nkolluru@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3135041
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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bb_retimer driver is tested using BB retimer emulator. Set mode function
is tested with different usb mux mode and cable configuration.
BUG=b:184856919
BRANCH=none
TEST=zmake configure --test zephyr/test/drivers
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I106435262ccd9123c4fe3cb9063cce68d777cb84
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3110087
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
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Code calling task_get_current() requires to return from this function
valid task ID. To test this code, new TASK_ID_TEST_RUNNER is introduced.
Test can set current thread as test runner and guarantee that
task_get_current() return valid task ID.
BUG=b:184856919
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Id5470e5337ab2419aad07f0f22de5f1576e870c3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3110086
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Move charger config from baseboard to board.
Change Kano charger to isl9241.
BUG=none
BRANCH=brya
TEST=make buildall -j succeeded.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: Ia97424bbcf0654127e21c47d6834ad6c2c6163ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3132556
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
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The is_cable_speed_gen2_capable() function should use information about PD
revision instead of checking the VDM version.
BUG=None
BRANCH=None
TEST=None
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I95a8bf977020b3756e5c82fde523c8ae29c455aa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3113970
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Add BB retimer emulator on i2c bus. Emulator properties can be defined
using device tree or runtime emulator API. Emulator checks if RO
registers and reserved bits are accessed correctly. API allows to set
custom read/write i2c messagess handlers to emulate complex behaviour.
BUG=b:184856919
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I4b641a90e6fb55e89aaee388c0ac04ab7bf367ba
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3110085
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
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This CL fixes the config options used to ignore the hardware write
protection signal to the CBI EEPROM. Honeybuns is only using this to
store the user MF prefence bit. The config option that had been used
to flip the polarity of WP_L (the default write protect signal) has
been removed.
BRANCH=quiche
BUG=b:164157329
TEST=Verfied that MF preference bit is stored in CBI.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I4f5cbe4b20dd2347e71429dadaf9f0c103b222de
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139097
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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Add Kconfig options CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8805 and
CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8815 to enable/disable the workaround
for PS8805/PS8815 firmware reporting the incorrect device ID.
BUG=none
BRANCH=none
TEST=zmake testall
TEST=On herobrine, verify that "ectool pdchipinfo 0" reports a device ID
0x02.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I16367ae5276e974671b034294275104d5831df21
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3140325
Commit-Queue: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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Define vivaldi keybd for gooey.
BRANCH=keeby
BUG=b:198113136
TEST=make buildall -j
Test the top row on gooey
Test the Alt + VolUp + r combo on gooey
Test the Esc + Refresh + Power combo on gooey
Test all the other keys also
Signed-off-by: arthur.lin <arthur.lin@lcfc.corp-partner.google.com>
Change-Id: I359db5fcc47abd94415cb66d7ffdbf9c77a346ae
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139618
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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BUG=b:198226222
BRANCH=none
TEST=make -j BOARD=primus
Signed-off-by: Terry Chen <terry_chen@wistron.corp-partner.google.com>
Change-Id: Ibcd2bd8d8fac5efdf6816442ccb9b786dafa4f7e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3134886
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
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This CL read (load operation) an EC's extended interrupt enable register
one time after configured. The load operation will ensure chip-level's
interrupt has been disabled before enabling CPU interrupt.
This CL will also assert failure if EC get interrupt number 0 in ISR.
BRANCH=dedede
BUG=b:197308582
TEST=No system reboot on storo during the drop test.
Change-Id: I593d78626d1e3bb92e5316d1ff78f0ee54711741
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3124483
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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