| Commit message (Collapse) | Author | Age | Files | Lines |
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BUG=none
TEST=none
Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155164
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Owners-Override: Jora Jacobi <jora@google.com>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
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This fixes a bug in gpio_clear_pending_interrupt, where
all pending interrupts are unintentionally cleared.
This is not in the code path for normal gpio interrupt
handlers, since the normal interrupt clearing occurs in
gpio_interrupt (right below this function).
BRANCH=none
BUG=chromium:1059520
TEST=none
Signed-off-by: Craig Hesling <hesling@chromium.org>
Change-Id: I4d6fe7947f4d76cf3b57dfbf3bb926e41851c80c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2101208
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
(cherry picked from commit c2c2c083fef813e3e3c70f8c13a1418717ba682d)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2106627
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Nuvoton specification list shared memory windows starting at index 1,
instead of the usual 0. Change code to match the spec.
BUG=none
BRANCH=master, eve-campfire
TEST=load, ectool version works.
Change-Id: If06a9402d973648ff1dfe64c5235a52d6be2aa8f
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1377572
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Gwendal Grignou <gwendal@google.com>
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This reverts commit d7850824797ce72b95265c0cf5b9b97856cbdb8d and
cbd826 "eve: Support dynamic mapping for legacy layout." and
all eve-specific legacy keyboard hacks.
We will use real drivers instead of hacking EC.
BUG=b:72200093
TEST=emerge-eve chromeos-ec
BRANCH=eve
Change-Id: I46d9b7396e198acdc7e5640441cb06704864e058
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1355639
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Sometimes common code needs __hw_clock_source_read, add it.
The implementation is similar of what common/timer.c does to create a ts
for get_time(), but in reverse.
TEST=Unit tests pass again for the next CL
BRANCH=master
BUG=None
Change-Id: I10564abedabe88e4789723bc97bac170ae020c69
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1055191
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit fda59e57ff0b1ad29786d35abb5ba189011fb479)
Reviewed-on: https://chromium-review.googlesource.com/c/1325170
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Grace Kihumba <gkihumba@chromium.org>
Tested-by: Grace Kihumba <gkihumba@chromium.org>
Trybot-Ready: Grace Kihumba <gkihumba@chromium.org>
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The ChromeOS supports both Alt+Search and Search+Alt as Capslock,
and we should allow both in legacy mode.
BUG=None
TEST=make BOARD=eve; manually tested
BRANCH=eve
Change-Id: I853738e4ec1563cd38d1b8882b47d2cf980ebee4
Reviewed-on: https://chromium-review.googlesource.com/1170727
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Hung-Te Lin <hungte@chromium.org>
Tested-by: Hung-Te Lin <hungte@chromium.org>
Trybot-Ready: Hung-Te Lin <hungte@chromium.org>
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BUG=None
TEST=make BOARD=eve; tested that Win works.
BRANCH=eve
Change-Id: I431bf58f3260708b8ede736bf25e8dbf2570ed1b
Reviewed-on: https://chromium-review.googlesource.com/1170724
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Hung-Te Lin <hungte@chromium.org>
Tested-by: Hung-Te Lin <hungte@chromium.org>
Trybot-Ready: Hung-Te Lin <hungte@chromium.org>
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Apply CL:1166742 to simplify (and speed up) scancode processing.
BUG=None
TEST=make BOARD=eve
BRANCH=eve
Change-Id: Idc4aa77978146fe971bfdf17406325ca4b98b953
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1166750
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For Eve, we want to enable dynamic mapping with few layout changes:
1. Map ASSIST to WIN(Left) since it's having a similar location.
2. Map MENU to APP.
3. Map SEARCH to Fn.
4. When Fn is hold, remap F1~F10 to similar functions as in Chrome OS.
5. (Chrome OS shortcuts) Fn+.=Ins, Fn+BS=Del, Fn+Alt=CapsLock
6. (Keys not for ChromeOS) Fn+B=Break, FN+P=Pause
BUG=b:72200093
BRANCH=eve
TEST=Builds and boot properly.
Change-Id: I0b02c709c780b468bc9bd70c053e85a07733ac50
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1164726
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Add two more functions to help implementing dynamic mapping.
int makecode_match(...) tells if a given make code (and code set)
matches a makecode_entry (which contains a list of make codes in each
code set).
int16_t makecode_translate(...) returns a translated make code if the
given make code (and code set) matches the given translation table.
BUG=b:72200093
BRANCH=eve
TEST=Builds and boot properly.
Change-Id: I0c8b0cd2330b970b41a408874a1ec9b3feab9e52
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1164725
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A new CONFIG_KEYBOARD_DYNAMIC_MAPPING allows AP firmware to select
different keyboard mappings. This is different from SCANCODE_MUTABLE and
is very helpful if the system has to boot in different mode and map
keyboards in different ways, for example only enabling Fn keys in AP
legacy mode.
SCANCODE_MUTABLE is more for "difference that won't change once EC
boots" while DYNAMIC_MAPPING is for "difference changes per each AP
reboot".
In AP firmware, to select mapping it should invoke the ACPI
EC_ACPI_MEM_KB_MAPPING_TYPE (0x0a) with expected mapping type.
A board that wants to enable dynamic mapping should provide
implementations of following functions:
void keyboard_board_mapping_changed(int mapping);
And when using 8042 protocol, the new mapping can be implemented by
providing a board specific translation function:
uint16_t keyboard_board_translate(...);
BUG=b:72200093
BRANCH=eve
TEST=Builds and boot properly.
Change-Id: If512931066aab6efa1467b038de46c6982af8bec
Signed-off-by: David Huang <David.Huang@quantatw.com>
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1084368
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The keyboard command should be 'on | off' instead of '0 | 1'.
BUG=None
TEST=make test
Change-Id: If6abfb5be3b372b612ef5b084c7b9f1f3d440a87
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1164975
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When a charge port is selected and VBUS is 5V, the inrush current causes
VBUS to droop which could signal a sink disconnection.
To mitigate this problem, charge port selection is delayed until VBUS
is stable or 1s has passed. Before 1s has passed, PD will hopefully have
negotiated a VBUS voltage of at least 9V.
This CL is also a workaround for the issue outlined in b:74753447
Signed-off-by: Sam Hurst <shurst@chromium.org>
BUG=b:69439094
BRANCH=None
TEST=`make -j buildall`
Manual tested with Belkin Express Dock and Moshi audio adapter.
Test Belkin with following configuration:
PORT0: PORT1:
Belkin OPEN
OPEN Belkin
Belkin Blackcat
Blackcat Belkin
Belkin EC terminal output:
Port 0:
[654.645288 TCPC p0 Exit Low Power Mode]
C0 st14
C0 st15
C0 st17
C0 st18
C0 st19
Requested 5000 V 3000 mA (for 900/900 mA)
C0 st20
C0 st21
C0 st22
C0 st23
C0 st24
C0 st23
C0 st26
C0 st27
C0 st28
C0 st29
[655.375668 New chg p0]
C0 st5
[655.380708 Ramp reset: st1]
[655.381704 CL: p0 s8 i500 v5000]
[655.392598 New chg p0]
[655.393574 Ramp reset: st1]
[655.394504 CL: p0 s2 i3000 v5000]
C0 Req [4] 15000mV 3000mA
[655.512126 New chg p0]
[655.514456 Ramp reset: st1]
C0 st715219 CL: p0 s0 ]
C0 st8
[655.639762 Ramp reset: st1]
[655.640301 CL: p0 s0 i3000 v15000]
[656.688735 AC on]
[657.385539 Ramp p0 st5 3000mA 3000mA]
[657.471108 Battery 70% / 7h:36 to empty]
[659.721858 charge_request(8800mV, 5376mA)]
[660.973258 charge_request(8800mV, 3712mA)]
[697.506594 Battery 71% / 1h:1 to full]
Port 1:
[729.384242 TCPC p1 Exit Low Power Mode]
C1 st2
C1 st3
C1 st14
C1 st15
C1 st17
C1 st18
C1 st19
Requested 5000 V 3000 mA (for 900/900 mA)
C1 st20
C1 st21
C1 st22
C1 st23
C1 st24
C1 st23
C1 st26
C1 st27
C1 st28
C1 st29
[730.339719 New chg p1]
[730.340602 Ramp reset: st1]
[C1 st5
730.341457 CL: p1 s8 i500 v5000]
[730.356552 New chg p1]
[730.357311 Ramp reset: st1]
[730.358095 CL: p1 s2 i3000 v5000]
C1 Req [4] 15000mV 3000mA
[730.478577 New chg p1]
[730.480986 Ramp reset: st1]
[730.481829 CL:Cp1 s0 i500 v15]
C1 st8
[730.607116 Ramp reset: st1]
[730.607813 CL: p1 s0 i3000 v15000]
[731.654877 AC on]
[732.345420 Ramp p1 st5 3000mA 3000mA]
[732.589802 Battery 71% / 10h:28 to empty]
[734.340030 charge_request(8800mV, 5376mA)]
[735.091263 charge_request(8800mV, 3712mA)]
[767.879314 Battery 72% / 1h:1 to full]
Tested Moshi with followint configuration:
Port0: Port1:
Moshi-pwr OPEN
OPEN Moshi-pwr
Moshi-pwr Blackcat
Blackcat Moshi-pwr
Moshi-audio OPEN
OPEN Moshi-audio
Moshi-audio Blackcat
Blackcat Moshi-pwr
Moshi-pwr-audio OPEN
OPEN Moshi-pwr-audio
Moshi-pwr-audio Blackcat
Blackcat Moshi-pwr-audio
Moshi EC terminal output:
[2330.883267 TCPC p0 Low Power Mode]
[2330.883664 TCPC p0 reset!]
[2330.916049 TCPC p0 Low Power Mode]
[2330.916475 TCPC p0 reset!]
[2330.934010 TCPC p0 Exit Low Power Mode]
C0 st14
C0 st15
C0 st17
C0 st18
C0 st19
Requested 5000 V 3000 mA (for 3000/3000 mA)
C0 st20
C0 st21
C0 st22
C0 st23
C0 st24
C0 st23
C0 st26
C0 st23
C0 st27
C0 st28
C0 st29
[2332.398132 New chg p0]
[2332.398883 Ramp reset: st1]
[2332.399745 CL: p0 s8 i500 v5000]
C0 st5
[2332.476132 New chg p0]
[2332.476933 Ramp reset: st1]
[2332.477705 CL: p0 s2 i3000 v5000]
C0 Req [4] 15000mV 2970mA
[2332.493597 New cCg p0C0 st7
]
[2332[2332.5001C0 st8
[2332.674727 Ramp reset: st1]
[2332.675510 CL: p0 s0 i2970 v15000]
[2333.668216 AC on]
[2334.403481 Ramp p0 st5 2970mA 2970mA]
[2334.450155 Battery 80% / 11h:18 to empty]
[2335.448877 charge_request(8800mV, 5376mA)]
[2336.699875 charge_request(8800mV, 3712mA)]
[2356.466385 Battery 81% / 1h:1 to full]
Change-Id: Iba909c252094c0e5ca4cf974aabcfe1eaf002efd
Reviewed-on: https://chromium-review.googlesource.com/1157554
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Commit-Queue: Duncan Laurie <dlaurie@google.com>
Tested-by: Duncan Laurie <dlaurie@google.com>
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BUG=b:111195071
TEST=unittest
BRANCH=eve-campfire
Change-Id: I42cc9103e722748988953c4a3896578dcd2ea12e
Reviewed-on: https://chromium-review.googlesource.com/1140016
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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BUG=b:79898176
TEST=make runtests
BRANCH=eve-campfire
Change-Id: I61193a28c407e0751fa75987cfa6aeb534fa3a91
Reviewed-on: https://chromium-review.googlesource.com/1122148
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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BRANCH=eve
BUG=b:111195071
TEST=BOARD=eve make (8042 keyboard)
BOARD=poppy make (mkbp keyboard)
make runtests
Change-Id: I23ab359323cd3bef86a07d11ab03c4d163132929
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1134808
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This reverts commit 4e3d2579bc4d7ad82cb87e955da666af38ba12b8.
Reason for revert: Re-using 32-bit host events instead. See b/110292722
Original change's description:
> common: allow report disabling of host events
>
> Adds a mechanism that allows a board to disable interrupting the AP /
> kernel when the status of any one of the EC_HOST_EVENTS included in
> CONFIG_HOST_EVENT_REPORT_MASK changes state. Default state enables
> reporting of all events; a board can override this by defining
> CONFIG_HOST_EVENT_REPORT_MASK in its board.h file.
>
> NOTE: The host_set_events() and host_clear_events() routines no longer
> interrupt the AP if none of the host events the AP is interested in
> changed state.
>
> BRANCH=none
> BUG=chromium:637061
> TEST=make buildall passes
>
> Change-Id: Ifbea6a76a13c56c3f499d193ee39dc5fee7ca977
> Signed-off-by: Nick Vaccaro <nvaccaro@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/502078
> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
> (cherry picked from commit e9215ba711d337e4cfc9524c4ef07b03a813c8fb)
> Reviewed-on: https://chromium-review.googlesource.com/989860
> Reviewed-by: Joel Kitching <kitching@chromium.org>
> Commit-Queue: Joel Kitching <kitching@chromium.org>
> Tested-by: Joel Kitching <kitching@chromium.org>
> Trybot-Ready: Joel Kitching <kitching@chromium.org>
Bug: chromium:637061
Change-Id: Idb30d9f5aca5997f408b963b06fd7ac417519496
Reviewed-on: https://chromium-review.googlesource.com/1113790
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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This reverts commit 47771cdaa84c9a4d24934a4459ee6b22722d996d.
Reason for revert: Re-using 32-bit host events instead. See b/110292722
Original change's description:
> host_event: Move host events and mask handling into common code
>
> Instead of duplicating the handling of host events and host event
> masks in chip lpc drivers, add routines in common code to provide
> basic functions like setting/getting of masks, setting/getting of
> events and handling of masks transitions across sysjump.
>
> BUG=None
> BRANCH=None
> TEST=make -j buildall. Verified following:
> 1. Event masks are correctly retained across sysjumps.
> 2. Wake from S3 works fine.
> 3. Wake from S0ix works fine.
> 4. SCI generated correctly.
>
> Change-Id: I37d6a888e4dc4e6c88a0b725881e63990b1a8c75
> Signed-off-by: Furquan Shaikh <furquan@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/707771
> Reviewed-by: Shawn N <shawnn@chromium.org>
> (cherry picked from commit b9e07ce1bfa42ea2a5e7564575b0072c13811c31)
> Reviewed-on: https://chromium-review.googlesource.com/989861
> Reviewed-by: Joel Kitching <kitching@chromium.org>
> Commit-Queue: Joel Kitching <kitching@chromium.org>
> Tested-by: Joel Kitching <kitching@chromium.org>
> Trybot-Ready: Joel Kitching <kitching@chromium.org>
Bug: None
Change-Id: Iabfe89f413c3abed78534baa817032c780264dc3
Reviewed-on: https://chromium-review.googlesource.com/1113789
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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This reverts commit 3970502067f625f41f96ae9d155270b0f50bfaba.
Reason for revert: Re-using 32-bit host events instead. See b/110292722
Original change's description:
> ec_features: Move feature flags out of ec_command into its own unit
>
> Prepare for exposing the feature flags through EC ACPI memory space by
> moving the definitions and collection function into its own unit.
>
> BUG=b:64705535
> BRANCH=none
> TEST=builds and returns the same value
>
> Change-Id: Ie393d732612f47e547a15cc72974974e27bb4824
> Signed-off-by: Patrick Georgi <pgeorgi@google.com>
> Reviewed-on: https://chromium-review.googlesource.com/633925
> Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
> Tested-by: Patrick Georgi <pgeorgi@chromium.org>
> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
> (cherry picked from commit 6844e4c2793b736b873f97510238ae6ed03c0772)
> Leaving out change from CL:540667 in common/host_command.c (renamed
> in this CL to common/ec_features.c), which marks EC_FEATURE_PMU as
> obsolete.
> Reviewed-on: https://chromium-review.googlesource.com/989862
> Reviewed-by: Joel Kitching <kitching@chromium.org>
> Commit-Queue: Joel Kitching <kitching@chromium.org>
> Tested-by: Joel Kitching <kitching@chromium.org>
> Trybot-Ready: Joel Kitching <kitching@chromium.org>
Bug: b:64705535
Change-Id: I8f235a338ea6202ca1a29bc70f26bdbc239bac25
Reviewed-on: https://chromium-review.googlesource.com/1113788
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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This reverts commit d5b068339e08b61864c4bd2ec1a89dad4e0da2de.
Reason for revert: Re-using 32-bit host events instead. See b/110292722
Original change's description:
> ec_features / coral: Allow disabling keyboard backlight feature
>
> Allow reporting that keyboard backlight doesn't exist even when the code
> is compiled in. Useful if there are multiple device models that should
> share firmware.
>
> BUG=b:64705535
> BRANCH=none
> TEST=none
>
> Change-Id: I700f87ab098f69c38dc538b66b720d70e23b278d
> Signed-off-by: Patrick Georgi <pgeorgi@google.com>
> Reviewed-on: https://chromium-review.googlesource.com/633926
> Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
> Tested-by: Patrick Georgi <pgeorgi@chromium.org>
> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
> (cherry picked from commit 09136dea764dbe482392c29b3c8d1763149df3e6)
> Reviewed-on: https://chromium-review.googlesource.com/989863
> Reviewed-by: Joel Kitching <kitching@chromium.org>
> Commit-Queue: Joel Kitching <kitching@chromium.org>
> Tested-by: Joel Kitching <kitching@chromium.org>
> Trybot-Ready: Joel Kitching <kitching@chromium.org>
Bug: b:64705535
Change-Id: I75db2a8e219205c8b00f208b31b08e49d2457724
Reviewed-on: https://chromium-review.googlesource.com/1113787
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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This reverts commit 161f09ca3e9726c122e0d1b8e05aecb3d1f2959c.
Reason for revert: Re-using 32-bit host events instead. See b/110292722
Original change's description:
> host_event_commands: Add support for always reporting masks
>
> Add a new mask type (ALWAYS_REPORT mask) that is set by default to
> certain host events that should always be reported to the host
> irrespective of the state of SCI, SMI and wake masks. This mask
> includes host events like critical events resulting in shutdown or
> reboot, events that are consumed by BIOS, etc.
>
> Now that ALWAYS_REPORT mask is added, this change also updates the way
> EC manages set/query operations for host events:
> 1. During set operation, EC will check if the host event is present in
> any of the 4 masks - SCI, SMI, wake and always report. If yes, then it
> is set in hostevents.
> 2. During query operation, EC will extract the lowest set event from
> hostevents, clear it and return it back to the host.
>
> In order to reflect the above change in EC behavior, a new feature bit
> is used EC_FEATURE_UNIFIED_WAKE_MASKS. This allows the host to decide
> when wake mask needs to be set before checking for host events.
>
> BUG=None
> BRANCH=None
> TEST=make -j buildall. Also verified following:
> 1. Wake from S3 works as expected. Host is able to log correct wake
> sources (Verified power button, lid open, base key press and tablet
> mode change on soraka).
> 2. Wake from S5 works as expected. Host is able to log correct wake
> sources (Verified power button, lid open on soraka).
> 3. Wake from S0ix works as expected (Verified power button, lid open
> on soraka).
> 4. Software method to trigger recovery still works fine:
> reboot ap-off
> hostevent set 0x4000
> powerb
>
> Change-Id: Ifcc9b0a974373e169b8f2f35120fcef9f66d47d8
> Signed-off-by: Furquan Shaikh <furquan@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/719578
> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
> (cherry picked from commit 5bd5f1b1fa005dbe1cc3c763919270e01a38b8d2)
> Reviewed-on: https://chromium-review.googlesource.com/989864
> Reviewed-by: Joel Kitching <kitching@chromium.org>
> Commit-Queue: Joel Kitching <kitching@chromium.org>
> Tested-by: Joel Kitching <kitching@chromium.org>
> Trybot-Ready: Joel Kitching <kitching@chromium.org>
Bug: None
Change-Id: I2326f2bdaf22434cb5096ed17d793f98e399d4f1
Reviewed-on: https://chromium-review.googlesource.com/1113786
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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This reverts commit 61cb81aed63dec095af4a7590bcfa23b7bd8c89d.
Reason for revert: Re-using 32-bit host events instead. See b/110292722
Original change's description:
> host_event: Perform lpc_init_mask before keyboard/button init
>
> keyboard/button init are responsible for checking if user requested
> manual recovery. However, by this time, hook init is not run and hence
> host event set operation for manual recovery is dropped. This change
> adds a call to lpc_init_mask before keyboard/button init operations
> are performed.
>
> BUG=b:68189465
> BRANCH=None
> TEST=Verified that manual recovery works fine. Recovery using software
> command works too:
> reboot ap-off
> hostevent set 0x4000
> powerb
>
> Change-Id: I4ba4ac480f78daafb2006a2b77250687b19a838d
> Signed-off-by: Furquan Shaikh <furquan@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/735799
> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
> Reviewed-by: Shawn N <shawnn@chromium.org>
> (cherry picked from commit 708f6f1f21d4cee970c6bf7dadefee3936af228d)
> Reviewed-on: https://chromium-review.googlesource.com/989865
> Reviewed-by: Joel Kitching <kitching@chromium.org>
> Commit-Queue: Joel Kitching <kitching@chromium.org>
> Tested-by: Joel Kitching <kitching@chromium.org>
> Trybot-Ready: Joel Kitching <kitching@chromium.org>
Bug: b:68189465
Change-Id: I9213094aff40edf03aa5b7e8ffdf3d43e5aea708
Reviewed-on: https://chromium-review.googlesource.com/1113785
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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This reverts commit dbbb19c051be37ef8b1d8aed0674fb5dfd73345b.
Reason for revert: Re-using 32-bit host events instead. See b/110292722
Original change's description:
> lpc: Add and use lpc_resume_clear_masks
>
> Add a new LPC helper routine lpc_resume_clear_masks that can be used
> to clear SCI, SMI and wake masks upon resume from S3. This is done to
> mask the events until host explicitly unmasks them.
>
> It also ensures that these masks do not get reset on resume from S0ix
> where the host does not re-configure these masks.
>
> BUG=b:68669668
> BRANCH=None
> TEST=Verified following:
> 1. make -j buildall
> 2. On resume from S0ix, SCI mask is not reset.
> 3. On resume from S3, SCI mask is reset and then set again by host request.
>
> Change-Id: I32db77d81e2ddf046edb1ef74852c5ac50075b8f
> Signed-off-by: Furquan Shaikh <furquan@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/745533
> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
> (cherry picked from commit 7d66541b462a5b86ab051ce1a4ad5404496a991c)
> Reviewed-on: https://chromium-review.googlesource.com/989866
> Reviewed-by: Joel Kitching <kitching@chromium.org>
> Commit-Queue: Joel Kitching <kitching@chromium.org>
> Tested-by: Joel Kitching <kitching@chromium.org>
> Trybot-Ready: Joel Kitching <kitching@chromium.org>
Bug: b:68669668
Change-Id: I75c3c2d0c3a97f57871200587ad1164a45cb18fb
Reviewed-on: https://chromium-review.googlesource.com/1113784
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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This reverts commit d0decbf1d041cda667c08506fe045b75e2f343b9.
Reason for revert: Re-using 32-bit host events instead. See b/110292722
Original change's description:
> host_events: Bump up host events and masks to 64-bit
>
> With the upcoming change to add a new command to get/set/clear host
> events and masks, it seems to be the right time to bump up the host
> events and masks to 64-bit. We are already out of available host
> events. This change opens up at least 32 bits for new host events.
>
> Old EC commands to operate on host events/masks will still deal with
> lower 32-bits of the events/mask. On the other hand, the new command
> being added will take care of the entire 64-bit events/masks. This
> ensures that old BIOS and kernel versions can still work with the
> newer EC versions.
>
> BUG=b:69329196
> BRANCH=None
> TEST=make -j buildall. Verified:
> 1. hostevent set 0x4000 ==> Sets correct bit in host events
> 2. hostevent clear 0x4000 ==> Clears correct bit in host events
> 3. Kernel is able to query and read correct host event bits from
> EC. Verified using evtest.
> 4. Coreboot is able to read correct wake reason from EC. Verified
> using mosys eventlog list.
>
> Change-Id: I286aef0f35cec10754ef7d662f883e999c22d235
> Signed-off-by: Furquan Shaikh <furquan@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/770925
> Reviewed-by: Randall Spangler <rspangler@chromium.org>
> (cherry picked from commit c9cd870600b12123dddc88814446327337557369)
> Leaving out change under CONFIG_HOSTCMD_RTC #ifdef in
> chip/stm32/clock-f.c.
> Reviewed-on: https://chromium-review.googlesource.com/989867
> Reviewed-by: Joel Kitching <kitching@chromium.org>
> Commit-Queue: Joel Kitching <kitching@chromium.org>
> Tested-by: Joel Kitching <kitching@chromium.org>
> Trybot-Ready: Joel Kitching <kitching@chromium.org>
Bug: b:69329196
Change-Id: If9d9bcf49e09c854211528f15ae0caef6ccf1ffe
Reviewed-on: https://chromium-review.googlesource.com/1113783
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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This reverts commit c7624254e5ce4da284df9daec696a9dc621cf019.
Reason for revert: Re-using 32-bit host events instead. See b/110292722
Original change's description:
> host_event_commands: Fix off-by-one error
>
> This CL fixes two issues:
> 1. Host events are 1-based. So, if event0 is being requested to be set
> in host_event_set_bit, nothing needs to be done.
> 2. To check if event needs to be set in upper 32-bit, check if the
> event # is >32 and not >=32. (This issue was identified by coverity ID
> 179990).
>
> BUG=b:69329196
> BRANCH=None
> TEST=make -j buildall
>
> Change-Id: I18b42285bfe187e9f5a32a10a5e1475cdc43f816
> Signed-off-by: Furquan Shaikh <furquan@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/791862
> Reviewed-by: Randall Spangler <rspangler@chromium.org>
> Reviewed-by: Shawn N <shawnn@chromium.org>
> (cherry picked from commit c1654d300d2894198f4ca88a7d8426da49d191b5)
> Reviewed-on: https://chromium-review.googlesource.com/989868
> Reviewed-by: Joel Kitching <kitching@chromium.org>
> Commit-Queue: Joel Kitching <kitching@chromium.org>
> Tested-by: Joel Kitching <kitching@chromium.org>
> Trybot-Ready: Joel Kitching <kitching@chromium.org>
Bug: b:69329196
Change-Id: Id613b02c14ded555cdab9a2e230444df93e91682
Reviewed-on: https://chromium-review.googlesource.com/1113782
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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This reverts commit 3fee26c572273802cab028c2f66f20e5a84b6d87.
Reason for revert: Re-using 32-bit host events instead. See b/110292722
Original change's description:
> hostevents: Reclaim EC_HOST_EVENT_EXTENDED bit
>
> Now that we have support for 64-bit events, there is no need to
> reserve a bit in lower 32 bits for extended events.
>
> BUG=b:69329196
> BRANCH=None
> TEST=make -j buildall
>
> Change-Id: Ib3a36124199e902b013abde6ae683a1dbcc0f7ac
> Signed-off-by: Furquan Shaikh <furquan@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/791863
> Reviewed-by: Randall Spangler <rspangler@chromium.org>
> Reviewed-by: Shawn N <shawnn@chromium.org>
> (cherry picked from commit c5dfb7945c5b4a76781665cf059382b4c11a1622)
> Reviewed-on: https://chromium-review.googlesource.com/989869
> Reviewed-by: Joel Kitching <kitching@chromium.org>
> Commit-Queue: Joel Kitching <kitching@chromium.org>
> Tested-by: Joel Kitching <kitching@chromium.org>
Bug: b:69329196
Change-Id: I274a83e296b3d299258d2920dac1b63dd6b44a66
Reviewed-on: https://chromium-review.googlesource.com/1113781
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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This reverts commit 5a140f7eeedcf2e23f9f8b1f19c77ac7465492c3.
Reason for revert: Re-using 32-bit host events instead. See b/110292722
Original change's description:
> ec_commands: Add a new host event for extended events
>
> Since we are out of host event bits, add a bit to indicate extended host
> event exists. This is put in as a placeholder for now so that we don't
> lose out the last available hostevent bit.
>
> BUG=chrome-os-partner:59352
> BRANCH=None
> TEST=Compiles successfully
>
> Signed-off-by: Furquan Shaikh <furquan@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/407804
> Reviewed-by: Randall Spangler <rspangler@chromium.org>
> (cherry picked from commit e3298150ea492440204d92adf0065190faa91f05)
>
> Change-Id: I2028cc6371a5c9d436f553374f9929bc034859d0
> Reviewed-on: https://chromium-review.googlesource.com/1013764
> Reviewed-by: Randall Spangler <rspangler@chromium.org>
> Commit-Queue: Joel Kitching <kitching@chromium.org>
> Tested-by: Joel Kitching <kitching@chromium.org>
> Trybot-Ready: Joel Kitching <kitching@chromium.org>
Bug: chrome-os-partner:59352
Change-Id: I8639baa39acd7a3ea74e667f0e6f81c523a2301d
Reviewed-on: https://chromium-review.googlesource.com/1113780
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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This reverts commit 54d5355a471c54b5bf38f32b9ac76040144416d0.
Reason for revert: Re-using 32-bit host events instead. See b/110292722
Original change's description:
> host_event_commands: Fix lpc_get_next_host_event for 64-bit events
>
> __builtin_ffs takes an int as argument, and, therefore, does not
> find bits >= 32. Fix this up when CONFIG_HOST_EVENT64.
>
> BUG=b:69329196
> BRANCH=fizz,poppy
> TEST=Patch coreboot to add bit 33 in SCI mask, add EC code to send
> such events, EC does not watchdog anymore
>
> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/989514
> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
> (cherry picked from commit da1b429c79ac591fb077a705ac41cb188a2500a9)
>
> Change-Id: Id400538bb88019c02137b1605b71865ac61d450b
> Reviewed-on: https://chromium-review.googlesource.com/1013900
> Reviewed-by: Joel Kitching <kitching@chromium.org>
> Commit-Queue: Joel Kitching <kitching@chromium.org>
> Tested-by: Joel Kitching <kitching@chromium.org>
> Trybot-Ready: Joel Kitching <kitching@chromium.org>
Bug: b:69329196
Change-Id: I3d2ae6e729ee2be676175f4df61ee2e9fecd7798
Reviewed-on: https://chromium-review.googlesource.com/1113779
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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__builtin_ffs takes an int as argument, and, therefore, does not
find bits >= 32. Fix this up when CONFIG_HOST_EVENT64.
BUG=b:69329196
BRANCH=fizz,poppy
TEST=Patch coreboot to add bit 33 in SCI mask, add EC code to send
such events, EC does not watchdog anymore
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/989514
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit da1b429c79ac591fb077a705ac41cb188a2500a9)
Change-Id: Id400538bb88019c02137b1605b71865ac61d450b
Reviewed-on: https://chromium-review.googlesource.com/1013900
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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Since we are out of host event bits, add a bit to indicate extended host
event exists. This is put in as a placeholder for now so that we don't
lose out the last available hostevent bit.
BUG=chrome-os-partner:59352
BRANCH=None
TEST=Compiles successfully
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/407804
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit e3298150ea492440204d92adf0065190faa91f05)
Change-Id: I2028cc6371a5c9d436f553374f9929bc034859d0
Reviewed-on: https://chromium-review.googlesource.com/1013764
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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Now that we have support for 64-bit events, there is no need to
reserve a bit in lower 32 bits for extended events.
BUG=b:69329196
BRANCH=None
TEST=make -j buildall
Change-Id: Ib3a36124199e902b013abde6ae683a1dbcc0f7ac
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/791863
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
(cherry picked from commit c5dfb7945c5b4a76781665cf059382b4c11a1622)
Reviewed-on: https://chromium-review.googlesource.com/989869
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
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This CL fixes two issues:
1. Host events are 1-based. So, if event0 is being requested to be set
in host_event_set_bit, nothing needs to be done.
2. To check if event needs to be set in upper 32-bit, check if the
event # is >32 and not >=32. (This issue was identified by coverity ID
179990).
BUG=b:69329196
BRANCH=None
TEST=make -j buildall
Change-Id: I18b42285bfe187e9f5a32a10a5e1475cdc43f816
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/791862
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
(cherry picked from commit c1654d300d2894198f4ca88a7d8426da49d191b5)
Reviewed-on: https://chromium-review.googlesource.com/989868
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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With the upcoming change to add a new command to get/set/clear host
events and masks, it seems to be the right time to bump up the host
events and masks to 64-bit. We are already out of available host
events. This change opens up at least 32 bits for new host events.
Old EC commands to operate on host events/masks will still deal with
lower 32-bits of the events/mask. On the other hand, the new command
being added will take care of the entire 64-bit events/masks. This
ensures that old BIOS and kernel versions can still work with the
newer EC versions.
BUG=b:69329196
BRANCH=None
TEST=make -j buildall. Verified:
1. hostevent set 0x4000 ==> Sets correct bit in host events
2. hostevent clear 0x4000 ==> Clears correct bit in host events
3. Kernel is able to query and read correct host event bits from
EC. Verified using evtest.
4. Coreboot is able to read correct wake reason from EC. Verified
using mosys eventlog list.
Change-Id: I286aef0f35cec10754ef7d662f883e999c22d235
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/770925
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit c9cd870600b12123dddc88814446327337557369)
Leaving out change under CONFIG_HOSTCMD_RTC #ifdef in
chip/stm32/clock-f.c.
Reviewed-on: https://chromium-review.googlesource.com/989867
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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Add a new LPC helper routine lpc_resume_clear_masks that can be used
to clear SCI, SMI and wake masks upon resume from S3. This is done to
mask the events until host explicitly unmasks them.
It also ensures that these masks do not get reset on resume from S0ix
where the host does not re-configure these masks.
BUG=b:68669668
BRANCH=None
TEST=Verified following:
1. make -j buildall
2. On resume from S0ix, SCI mask is not reset.
3. On resume from S3, SCI mask is reset and then set again by host request.
Change-Id: I32db77d81e2ddf046edb1ef74852c5ac50075b8f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/745533
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 7d66541b462a5b86ab051ce1a4ad5404496a991c)
Reviewed-on: https://chromium-review.googlesource.com/989866
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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keyboard/button init are responsible for checking if user requested
manual recovery. However, by this time, hook init is not run and hence
host event set operation for manual recovery is dropped. This change
adds a call to lpc_init_mask before keyboard/button init operations
are performed.
BUG=b:68189465
BRANCH=None
TEST=Verified that manual recovery works fine. Recovery using software
command works too:
reboot ap-off
hostevent set 0x4000
powerb
Change-Id: I4ba4ac480f78daafb2006a2b77250687b19a838d
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/735799
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
(cherry picked from commit 708f6f1f21d4cee970c6bf7dadefee3936af228d)
Reviewed-on: https://chromium-review.googlesource.com/989865
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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Add a new mask type (ALWAYS_REPORT mask) that is set by default to
certain host events that should always be reported to the host
irrespective of the state of SCI, SMI and wake masks. This mask
includes host events like critical events resulting in shutdown or
reboot, events that are consumed by BIOS, etc.
Now that ALWAYS_REPORT mask is added, this change also updates the way
EC manages set/query operations for host events:
1. During set operation, EC will check if the host event is present in
any of the 4 masks - SCI, SMI, wake and always report. If yes, then it
is set in hostevents.
2. During query operation, EC will extract the lowest set event from
hostevents, clear it and return it back to the host.
In order to reflect the above change in EC behavior, a new feature bit
is used EC_FEATURE_UNIFIED_WAKE_MASKS. This allows the host to decide
when wake mask needs to be set before checking for host events.
BUG=None
BRANCH=None
TEST=make -j buildall. Also verified following:
1. Wake from S3 works as expected. Host is able to log correct wake
sources (Verified power button, lid open, base key press and tablet
mode change on soraka).
2. Wake from S5 works as expected. Host is able to log correct wake
sources (Verified power button, lid open on soraka).
3. Wake from S0ix works as expected (Verified power button, lid open
on soraka).
4. Software method to trigger recovery still works fine:
reboot ap-off
hostevent set 0x4000
powerb
Change-Id: Ifcc9b0a974373e169b8f2f35120fcef9f66d47d8
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/719578
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 5bd5f1b1fa005dbe1cc3c763919270e01a38b8d2)
Reviewed-on: https://chromium-review.googlesource.com/989864
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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Allow reporting that keyboard backlight doesn't exist even when the code
is compiled in. Useful if there are multiple device models that should
share firmware.
BUG=b:64705535
BRANCH=none
TEST=none
Change-Id: I700f87ab098f69c38dc538b66b720d70e23b278d
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/633926
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 09136dea764dbe482392c29b3c8d1763149df3e6)
Reviewed-on: https://chromium-review.googlesource.com/989863
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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Prepare for exposing the feature flags through EC ACPI memory space by
moving the definitions and collection function into its own unit.
BUG=b:64705535
BRANCH=none
TEST=builds and returns the same value
Change-Id: Ie393d732612f47e547a15cc72974974e27bb4824
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/633925
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit 6844e4c2793b736b873f97510238ae6ed03c0772)
Leaving out change from CL:540667 in common/host_command.c (renamed
in this CL to common/ec_features.c), which marks EC_FEATURE_PMU as
obsolete.
Reviewed-on: https://chromium-review.googlesource.com/989862
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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Instead of duplicating the handling of host events and host event
masks in chip lpc drivers, add routines in common code to provide
basic functions like setting/getting of masks, setting/getting of
events and handling of masks transitions across sysjump.
BUG=None
BRANCH=None
TEST=make -j buildall. Verified following:
1. Event masks are correctly retained across sysjumps.
2. Wake from S3 works fine.
3. Wake from S0ix works fine.
4. SCI generated correctly.
Change-Id: I37d6a888e4dc4e6c88a0b725881e63990b1a8c75
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/707771
Reviewed-by: Shawn N <shawnn@chromium.org>
(cherry picked from commit b9e07ce1bfa42ea2a5e7564575b0072c13811c31)
Reviewed-on: https://chromium-review.googlesource.com/989861
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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Adds a mechanism that allows a board to disable interrupting the AP /
kernel when the status of any one of the EC_HOST_EVENTS included in
CONFIG_HOST_EVENT_REPORT_MASK changes state. Default state enables
reporting of all events; a board can override this by defining
CONFIG_HOST_EVENT_REPORT_MASK in its board.h file.
NOTE: The host_set_events() and host_clear_events() routines no longer
interrupt the AP if none of the host events the AP is interested in
changed state.
BRANCH=none
BUG=chromium:637061
TEST=make buildall passes
Change-Id: Ifbea6a76a13c56c3f499d193ee39dc5fee7ca977
Signed-off-by: Nick Vaccaro <nvaccaro@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/502078
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
(cherry picked from commit e9215ba711d337e4cfc9524c4ef07b03a813c8fb)
Reviewed-on: https://chromium-review.googlesource.com/989860
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>
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Deep Sleep states (DS3, DS5) are a special mode of the Intel PCH chipset
that has very limited wake capabilities and breaks a number of common
user expected behahviors.
In particular, when in Deep S3 the USB ports are turned off and cannot
continue to charge, wake the system, or maintain their internal state
as they will lose 5V power. This is particularly painful with gnubby
devices as they will need unlocked after every DS3 suspend/resume cycle.
The only external signal that the PCH uses to determine whether or not
to enter Deep Sx states is the ACPRESENT (aka ACOK) pin.
Currently this pin is simply buffered from the charger and will be
asserted whenever a charger is connected. This change extends the EC
control over the pin to also assert ACPRESENT if either Type-C port is
currently supplying VBUS.
Now when a USB device is inserted the system will be enter S3 state,
but not go into Deep S3 state. This allows the USB device to continue
to charge, maintain it's internal state, and wake the system.
BUG=b:64406191
BRANCH=eve
TEST=verify GPIO_PCH_ACOK pin from the EC in different scenarios and
test that system goes into S3 or DS3 state as expected:
1) no charger, no USB device: ACOK not asserted, DS3 enabled
2) charger but no USB device: ACOK asserted, DS3 disabled
3) no charger but USB device: ACOK asserted, DS3 disabled
4) charger and USB device: ACOK asserted, DS3 disabled
Change-Id: I1cd132459194382e418970d29b1b195d8132cfad
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/914660
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we need to properly restart the anx3429 after a firmware update.
simply initializing the chip doesn't seem to get it to reload its
firmware - at least not the portion of the chip that implements the
firmware version register. so, we explicitly power down and reset the
chip before reinitializing it to force it to run the new firmware.
the chip also needs a 10ms "off" time so the reset is properly seen by
the chip, so i did a light refactoring of the code paths that reset
the anx3429.
TEST=used 2 different firmware blobs and verified it switches between
them during software sync.
BRANCH=none
BUG=b:35586895
Change-Id: I11447c4039108a7530028c57cd5ce5ef6a78912a
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Original-Commit-Id: c1e5671e561c82c9532cb29b17fc7cf4061ab20a
Original-Change-Id: I967898dd906f21bdc5bc4ce9c1dff9f873d198c1
Original-Signed-off-by: Caveh Jalali <caveh@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/631976
Reviewed-on: https://chromium-review.googlesource.com/914659
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add a subcommand to the PD_CONTROL message to power up a specific
TCPC. in practice, this typically just takes the TCPC out of sleep
mode for cases where sleep mode is controlled by the EC.
under the covers, board_set_tcpc_power_mode() gets a weak function
definition so we don't need to special case this everywhere.
TEST="make buildall" passes; "make tests" passes for reef.
BRANCH=none
BUG=b:35586895
Change-Id: Ic1ed6a70c79f5e7c78099cd0ceb3dfdc2a0489e0
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Original-Commit-Id: 28bfc8037156ba0f9c8189ef6e8b7c8a7d22d4cc
Original-Change-Id: Ib50e265d11eca10c3714049d8cfdf2657eff48c1
Original-Signed-off-by: Caveh Jalali <caveh@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/596796
Original-Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/914658
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fetching the chip firmware version toward the end of the chip
anx74xx_tcpm_init() sequence is a good place to do this. we need this
info in any case and this is a safe place to access device registers
and cache the values. subsequent chip firmware queries typically
return the cached value. also, tcpci_tcpm_init() is already
structured this way.
TEST=verified with follow-up CL that firmware update succeeds and new
version is reported
BRANCH=none
BUG=b:35586895
Change-Id: If3a7ac37dc978db655b5dfb9c9df0756d08162d9
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Original-Commit-Id: e4997a631e129df3d171da16de9504810891744c
Original-Change-Id: Ic3fd07bbf8a220bfd506d59d8a1f3ea25b14e94c
Original-Signed-off-by: Caveh Jalali <caveh@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/634513
Original-Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/914657
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TEST="make buildall" succeeds, "make runtests" passes for reef.
returning SUCCESS instead of UNIMPLEMENTED from .release() means the
pd_task() is allowed to reinitialize the TCPC when coming out of
PD_STATE_SUSPENDED or similar scenario.
TEST=verified anx3429 firmware update succeeds, USB port still usable
for charging after update.
BRANCH=none
BUG=b:35586895
Change-Id: I6adbede4a9860ab339691afdb6a8161a8e1de5c9
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Original-Commit-Id: 68dfee896ea433bd55e081e07f26b3534fd11bb9
Original-Change-Id: I1a624ccf25dfa6468de72f8564f936bc0a35edb1
Original-Signed-off-by: Caveh Jalali <caveh@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/596797
Original-Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/914656
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this makes the PD_CONTROL_DISABLE subcommand of EC_CMD_PD_CONTROL port
specific like all the other subcommands already are.
the only place depthcharge uses PD_CONTROL_DISABLE is in anx7688.c and
that code already passes the correct chip ID along, so this will not
affect the current use case. ectool already does the right thing as
well.
TEST=used ectool to verify each port can be disabled independently.
BRANCH=none
BUG=b:64956885
Change-Id: I6ef34b93d70beed8f97d540b7f5c944ef6e23ec2
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Original-Commit-Id: 2668e5aeea93915c3720b7522e4a116cf6a20550
Original-Change-Id: I6514eb300793b8958ed78846298ec5b95f78e6dc
Original-Signed-off-by: Caveh Jalali <caveh@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/616259
Original-Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/914655
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similar to the USB_PD_TCPC case, add release/init operations when the
pd_task enters/leaves the PD_STATE_SUSPENDED state. one use case for
PD_SUSPEND is to get exlusive access to the TCPC for things like
firmware update, so the release/init operation is needed to get the
TCPC and driver into a good state.
updated all tcpm_drv style drivers. for backward compatibility, "old"
drivers that may not handle init/release properly simply return
EC_ERROR_UNIMPLEMENTED for tcpm_release(). pd_task() uses this as a
signal that it should not try to re-init() the driver.
TEST=tested in combination with follow-on CLs to do TCPC firmware
update on electro. also built for kevin, eve, sand which are
some of the other boards using these drivers.
"make buildall -j" passes.
BRANCH=none
BUG=b:35586896
Change-Id: I8cc98b488c5ee96cf4f0b07518aa58d3e224ff5c
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Original-Commit-Id: c74c0785927ab7770143d5ff503b4c0ca9df9ff1
Original-Change-Id: I3d2964a79e710428f7a6e7004d68ab424af85be8
Original-Signed-off-by: Caveh Jalali <caveh@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/544660
Original-Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/914654
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If during PMIC initialization, it is identified that there was a VR
fault, then dump fault registers 0x16 and 0x17 to EC console. This
information is very useful during debugging sudden power losses in
field and so it is printed out to EC console.
Additionally, add panic reason with these register values as panic
data so that OS can provide this information in cros ec
panicinfo. This helps in retaining the information even if EC console
logs overflow.
BUG=b:65026806
BRANCH=eve
TEST=Verified that on a VCCIO shutdown, PMIC VR fault is
reported: "PMIC VRFAULT: PWRSTAT1=0x80 PWRSTAT2=0x00"
Change-Id: Ic53c9c2ed9e94ed92ff42005ae68f4ab22afb49d
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Original-Commit-Id:
Original-Change-Id: I48d522d6d67310b9a8d6c213e1144674372aef6e
Original-Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/914653
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SYSTEM_IMAGE_RW_B hasn't been globally treated as a RW copy.
This change makes EC treat it also as a RW copy.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: I1cea259e3c7170f61fdc7acee2c6e1d6de547ae4
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Original-Commit-Id: 5da63f4ea2c93e6b059d8c50ff01dbe53a13dec2
Original-Change-Id: Iae5a9090cdf30f980014daca44cdf8f2a65ea1f2
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/656337
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/914652
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suzy-qable advertises 1.5A, but its actual capability depends on the
host USB port it is attached to. Since suzy-qable is ubiquitous and
other DTS sources may behave in the same way, ramp the input current
limit in order to find a reasonable maximum.
BUG=chromium:770296
BRANCH=None
TEST=Attach suzy-qable to kevin and reef, verify that neither OCs and EC
console via cr50 is available on reef. Also verify donette chargers
kevin at 3A and does not ramp.
Change-Id: I1a73a17f4228c4590a40d5209db7e98a5857ae0a
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Original-Commit-Id: 165f7d6f3bad4d49f977e1c5efad326f11007bf0
Original-Change-Id: Idd0683ede3a44111a01da6b4faab52f388ee82fd
Original-Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/693295
Original-Commit-Ready: Shawn N <shawnn@chromium.org>
Original-Tested-by: Shawn N <shawnn@chromium.org>
Original-Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/914651
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