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* Clear OWNERS for factory/firmware branchfirmware-falco_peppy-4389.BBrian Norris2021-09-101-0/+1
| | | | | | | | | | | | BUG=none TEST=none Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155167 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Owners-Override: Jora Jacobi <jora@google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* Peppy: Change charge voltage for batteryDavid.Huang2017-01-181-0/+5
| | | | | | | | | | | | | Change battery charge voltage for peppy battery. BRANCH=peppy BUG=chrome-os-partner:60681 TEST=Use console command "charger" to check charge voltage. Change-Id: I5b4b6ad3fdedd95762899ac77d9da95fd420481f Signed-off-by: David Huang <David.Huang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/417439 Reviewed-by: Shawn N <shawnn@chromium.org>
* Revert "Peppy: Support force lid open"Hsu Henry2014-12-093-56/+1
| | | | | | | | | | This reverts commit 4f8f5fcd297df309e32cf12316a51745a4362317. Change-Id: Ifa871683db271a2cc414151d6df169b32ef3dffa Reviewed-on: https://chromium-review.googlesource.com/234079 Reviewed-by: Mohammed Habibulla <moch@chromium.org> Commit-Queue: Mohammed Habibulla <moch@chromium.org> Tested-by: Mohammed Habibulla <moch@chromium.org>
* Peppy: Support force lid openHenry Hsu2014-10-033-1/+56
| | | | | | | | | | | | | | | | Factory test process need lid switch no function or keep lid opened BUG=chrome-os-partner:32425 BRANCH=peppy TEST=Run command "ectool forcelidopen 1" and "reboot". Then lid close quickly, the system boot as lid opened. Deault value or run command "ectool forcelidopen 0" make the device normal. Change-Id: I94527b7ef7f9efe779c6b86f3eab651f99af6000 Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/220740 Reviewed-by: Mohammed Habibulla <moch@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Falco: Shut down immediately if 5V regulator tripsChromeOS Developer2014-07-312-1/+16
| | | | | | | | | | | | | | | | | | | This is to prevent the shared 5V/3.3V regulator from latching a fault that requires removing the battery to clear. BUG=chrome-os-partner:30575 BRANCH=falco TEST=Tested with cable that connects +5V to D- through 10Ohms. Plug in during S0 -> no change. Plug in during S0 -> system shuts down. Plug in during S0 and then suspend -> system shuts down. Note that it will take two presses of the power button to boot back up. Change-Id: Ibe6d816ba50e3347afc84ad248fc1ea9e4a089a1 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210038 Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
* Peppy: Shutdown immediately if PP5000 rail goes down unexpectedlyChromeOS Developer2014-03-082-3/+7
| | | | | | | | | | | | | | BUG=chrome-os-partner:25833 BRANCH=peppy TEST=Trip the PP5000 VR by over-volting the rail. Verify that the system shuts down rather than the EC becoming unresponsive due to loosing PP3300_EC unexpectedly. Check both S0 and S3 cases. Change-Id: I1e95e029b6831ac50671338c1fc927237f8560fd Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/189039 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Peppy: Shutdown immediately if PP5000 rail goes bad in S0.ChromeOS Developer2014-03-053-1/+20
| | | | | | | | | | | | | BUG=chrome-os-partner:25833 BRANCH=peppy TEST=Trip the PP5000 VR by over-volting the rail. Verify that system shuts down rather than the EC becoming unresponsive in a semi-hibernated state. Change-Id: I1fd6e9aa7f15385797188720222802266ce2a72c Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/188886 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* CHERRY-PICK: Fix bug with hibernate delay when running off batteryAlec Berg2014-02-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | Fixes hibernate delay logic for chipset x86. With this change the machine will go in to hibernate one hour after going into G3 when running off battery. BUG=chrome-os-partner:25661 BRANCH=none TEST=Used console command hibdelay to set a reasonable hibernate delay time and tested all combinations of running off battery vs. AC and shutting off before or after the machine has been on for a hibdelay amount of time. Change-Id: I8adbd407b85598abdfc4d021f292e05896d06899 Original-Change-Id: Idd94d3677669dcd405732195b8cbbc1edca1e171 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172512 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/186300 Tested-by: Dave Parker <dparker@chromium.org> Commit-Queue: Dave Parker <dparker@chromium.org>
* CHERRY-PICK: lm4: fix enabling RTC alarmRandall Spangler2014-02-132-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | All hibernate register writes must wait for the WC bit. When we're enabling the RTC alarm, it's important to wait for the WC bit afterwards, too, or else we could go into deep sleep before the write to HIBIM is committed. Also make sure that the normal hibernate() path enables the RTC alarm if it has a timeout. This bug wasn't noticed until the low-power idle code called system_reset_rtc_alarm(), since before then HIBIM was initialized to 1 and just stayed there. BUG=chrome-os-partner:25661 BRANCH=anywhere we use low power idle (wolf/leon, too) TEST=with hacked firmware, note that HIBIM=1 just before the wfi instruction in chip/lm4/clock.c Change-Id: I6fff333ca15dfca6f25c9103a73f4c8f1cbe05ac Original-Change-Id: Ie01b106ac6a6c5894811f9a333715b22ef896f82 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175013 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/186269 Tested-by: Dave Parker <dparker@chromium.org> Commit-Queue: Dave Parker <dparker@chromium.org>
* CHERRY-PICK: lm4: Fixed low power idle doesn't always wake up.Alec Berg2014-02-132-12/+32
| | | | | | | | | | | | | | | | | | | | | | | | | Temporary fix to the bug in which we miss wake events when in deep sleep with the LFIOSC (32kHz) clock and the EC is cold. This fix involves simply using a faster clock, 250kHz, when in low speed deep sleep. This fix consumes more power but solves the bug. Renamed EC console command dsleepmask to dsleep. BUG=chrome-os-partner:25661 BRANCH=none TEST=Go in to low speed deep sleep by going into either S3 or G3 and letting the EC console timeout. Then freeze-spray the EC chip. Wake up the EC via the console and make sure that the idlestats show that we have not missed a deadline. Change-Id: Ida96cd04c1af9b114270f9a2eff002e419984e7c Original-Change-Id: I4f9844f1937bc8c95cf1540502f7d8fb4cbc097e Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175614 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/186268 Commit-Queue: Dave Parker <dparker@chromium.org> Tested-by: Dave Parker <dparker@chromium.org>
* CHERRY-PICK: lm4: Fixes low power bug after a sysjumpAlec Berg2014-02-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | This fixes a bug in which after a sysjump, the sleep_mask is reset, and the EC is allowed to go into a low power mode even though the AP is still running. This causes numerous problems, must notable of which is that a flashrom write fails with an EC protocol mismatch error. BUG=chrome-os-partner:25661 BRANCH=none TEST=Execute a flashrom write and make sure the system does not use the low power code immediately after. Change-Id: If3936595ec9d6f599824b58af43bc3ca68d82d7d Original-Change-Id: I4d50282da0c5ba5b6488ed14a267a4d8cafe09a7 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/174943 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/186267 Commit-Queue: Dave Parker <dparker@chromium.org> Tested-by: Dave Parker <dparker@chromium.org>
* CHERRY-PICK: lm4: Use low speed clock in deep sleep.Alec Berg2014-02-1319-22/+384
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changed the low power idle task to use the low speed clock in deep sleep. The low power idle task is currently only enabled for Peppy, Slippy, and Falco. This change decreases power consumption when the AP is not running. Note that the low speed clock is slow enough that the JTAG cannot be used and the EC console UART cannot be used. To work around that, this commit detects when the JTAG is in use and when the EC console is in use, and will not use the low speed clock if either is in use. The JTAG in use never clears after being set and the console in use clears after a fixed timeout period. BUG=chrome-os-partner:25661 BRANCH=None TEST=Passes all unit tests. Tested that the EC console works when in deep sleep. Tested that it is possible to run flash_ec when in deep sleep and using the low speed clock. Change-Id: I50451b1aa744cfc57b2b6b7e2af875adce733d65 Original-Change-Id: Ia65997eb8e607a5df9b2c7d68e4826bfb1e0194c Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/173326 Reviewed-on: https://chromium-review.googlesource.com/186266 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dave Parker <dparker@chromium.org> Tested-by: Dave Parker <dparker@chromium.org>
* CHERRY-PICK: lm4: Add a low power idle task.Alec Berg2014-02-1323-141/+558
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | First implementation of a low power idle task for the LM4 chip. The low power mode is selected by defining CONFIG_LOW_POWER_IDLE in a board.h file. This commit turns it on for Peppy, Slippy, and Falco only because those are the only boards tested. When using the low power idle task, the chip goes in to deep sleep when it can. Deep sleep disables clocks to most peripherals and puts the onboard flash and RAM into a low power mode. The chip is woken out of deep sleep using the RTC in the hibernate module. Increased the idle task stack size to handle more involved idle task. In board.c, the array of GPIO info can be used to select which GPIO points can wake up the EC from deep sleep. Currenlty selected are the power button, lid open, AC present, PCH_SLP_S3, and PCH_SLP_S5. Additionally the port with the KB scan row GPIO point is also enabled to wake up the EC from deep sleep. Signed-off-by: Alec Berg <alecaberg@chromium.org> BUG=chrome-os-partner:25661 BRANCH=none TEST=Passes all unit tests. Runs on slippy, peppy, and falco with no noticeable side affects. Verified that the power consumed by the EC is lower when in S3, S5 and G3 by scoping the sense resistor powering the chip. Change-Id: I48112d4ce74fe0a272a1cc3a09e3d1b9b3ce6c25 Original-Change-Id: I83fa9a159a4b79201b99f2c32678dc4fc8921726 Reviewed-on: https://chromium-review.googlesource.com/172183 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/186265 Commit-Queue: Dave Parker <dparker@chromium.org> Tested-by: Dave Parker <dparker@chromium.org>
* CHERRY-PICK: lm4: Modified clock gating to allow easy expansion to low power.Alec Berg2014-02-1317-73/+265
| | | | | | | | | | | | | | | | | | | | | | | | | Created a new function to enable or disable clocks to various peripherals. This new function makes it easy to specify if you want the clock enabled in run mode, sleep mode, and/or deep sleep mode. Added infrastructure to specify which GPIOs should interrupt the EC from deep sleep. BUG=chrome-os-partner:25661 BRANCH=none TEST=Passes all unit tests. Ran on a peppy and verified that the clock gate control registers in run mode (LM4_RCGC regs) were the same before and after this change. Change-Id: Ice3a23e2d6fcaff4033eac84e11054f24c7d796e Original-Change-Id: Ia5009ac8c837f61dca52fe86ebdeede2e1a7fe4d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172454 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/186264 Commit-Queue: Dave Parker <dparker@chromium.org> Tested-by: Dave Parker <dparker@chromium.org>
* CHERRY-PICK: Clean up configuring GPIO alternate functionsRandall Spangler2014-02-1348-326/+533
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO alternate functions used to be configured throughout the code, which made it hard to tell which ones you needed to configure yourself in board.c. It also sometimes (chip/lm4/i2c.c) led to GPIOs being configured as alternate functions even if they weren't used on a given board. With this change, every board has a table in board.c which lists ALL GPIOs which have alternate functions. This is now the only place where alternate functions are configured. Each module then calls gpio_init_module() to set up its GPIOs. This also fixes a bug where gpio_set_flags() ignored most of the flags passed to it (only direction and level were actually used). On stm32f, gpio_set_alternate() does not exist, and pins are configured via direct register writes from board.c. Rather than attempt to change that in the same CL, I've stubbed out gpio_set_alternate() for stm32f, and will fix the register writes in a follow-up CL. BUG=chrome-os-partner:25661 BRANCH=peppy (fixes I2C1 being initialized even though those pins are used for other things) TEST=boot link, falco, pit, spring Change-Id: Ic0d94d38d82f50d7714fed6cc764d4b0b1370f5c Original-Change-Id: I40f47025d8f767e0723c6b40c80413af9ba8deba Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/64400 Reviewed-on: https://chromium-review.googlesource.com/186263 Commit-Queue: Dave Parker <dparker@chromium.org> Tested-by: Dave Parker <dparker@chromium.org>
* Falco, Peppy: Restrict I2C host passthrough when WP enabledChromeOS Developer2014-02-122-0/+2
| | | | | | | | | | | | | BUG=chrome-os-partner:25201 BRANCH=None TEST=Run 'ectool i2cread 8 0 0x16 0' to read a byte from the battery with write protect enabled. Should return "EC result 4" error. Change-Id: Ie5e3c06b478537c87f1e1da7e1445adf60f442de Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/185948 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Peppy: Lower temp thresholds to match updated PECI TjMaxChromeOS Developer2013-12-181-2/+2
| | | | | | | | | | | | | | | | | | | BRANCH ONLY! Temps in the fan table are lowered by 5 degreess to match the corrected TjMax temp at 100C (from 105C). Also updates the the warning, cpu power off, and system power off thresholds to be less than TjMax. BUG=chrome-os-partner:24455 BRANCH=peppy TEST=Manual. Run a device w/o heatsink attached until it shuts down at 97C. Change-Id: I100e212b6d20756256a19aff15d426d4f7ea3d34 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/180556 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Falco: Lower temp thresholds to match updated PECI TjMaxChromeOS Developer2013-12-181-2/+2
| | | | | | | | | | | | | | | | | | | BRANCH ONLY! Temps in the fan table are lowered by 5 degreess to match the corrected TjMax temp at 100C (from 105C). Also updates the the warning, cpu power off, and system power off thresholds to be less than TjMax. BUG=chrome-os-partner:24455 BRANCH=falco TEST=Manual. Run a device w/o heatsink attached until it shuts down at 94C. Change-Id: I23e4f8d67fc4cba0fe08a206e8fd778bde761dc4 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/180555 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* CHERRY-PICK: Change PECI_TJMAX to a board config optionChromeOS Developer2013-12-186-8/+17
| | | | | | | | | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:24455 BRANCH=none TEST=Manual: Verify that CONIFG_PECI_TJMAX set per-board matches the value queried over the PECI bus with the restricted "peciprobe" command. Original-Change-Id: I8e99a23a66f26d6101e01cc751d0a8ca79686321 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179682 Reviewed-by: Alec Berg <alecaberg@chromium.org> Conflicts: board/bolt/board.h board/falco/board.h board/peppy/board.h chip/lm4/peci.c Change-Id: Ia0e8c1c7ef1204c09c57bc6581bbccbee06161cf Reviewed-on: https://chromium-review.googlesource.com/180554 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dave Parker <dparker@chromium.org> Tested-by: Dave Parker <dparker@chromium.org>
* CHERRY-PICK: lm4: Fix potential false over-temperature on entry to S0Alec Berg2013-12-181-1/+9
| | | | | | | | | | | | | | | | | | | | | | | This fixes a rare problem in which the EC could shutdown due to a false over-temperature when entering S0 on Haswell architectures. The fix involves requiring two valid reads of the temperature sensor (out of the last 4 readings) in order to report it. BUG=chrome-os-partner:24204 BRANCH=none TEST=See bug report for a patch that recreates the bug at a significantly higher rate then it would occur on its own. Using that patch, I implemented this fix, and made sure that there were no false over-temperatures reported. Change-Id: I8a8441ad3f6b05cdf02637e6de094a96c37854a6 Original-Change-Id: I0454eca1b96fd2fa1833b080026ed8f1caeeddc4 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/177963 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/180553 Commit-Queue: Dave Parker <dparker@chromium.org> Tested-by: Dave Parker <dparker@chromium.org>
* falco: Adjust low-battery LED blink threshold (again)Bill Richardson2013-10-221-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Something changed somewhere, and now we're off by a few points again. The battery LED is supposed to start blinking when the charge is under 12%, but that level is pretty fuzzy. For example: I force the battery level to 11% using the EC console: > battfake 11 Reporting fake battery level 11% > The host's power_supply_info command shows: percentage: 10.9884 display percentage: 11.3282 but clicking on the battery icon on the GUI says 9% - 0-:48 left So we're off by two percentage points. However, at 20%: > battfake 20 Reporting fake battery level 20% > I get percentage: 19.9943 display percentage: 20.6127 and 19% - 1:30 left which is much closer. It's still nonlinear, though. If I force the battery to 15%, the GUI reports 14%. If I force the battery to 14%, the GUI reports 11%. Whatever. We'll put the EC's threshold at 14%, so that the light starts blinking when the GUI is below 12%. Note that the GUI only updates about once a minute or so, so you'll have to be patient. BUG=chrome-os-partner:22159 BRANCH=falco TEST=manual Let the battery discharge, watch for the light to start flashing when the GUI says it's down to 12% or so. Change-Id: I6924070419dda1ff0fc16e43404c37db1a38f9c9 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/174105 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* CHERRY-PICK: Wake keyboard task when lid opensRandall Spangler2013-10-011-0/+13
| | | | | | | | | | | | | | | | | | | | | | | If keyboard scanning is active when the lid closes, it will disable scanning put the scan task to sleep. We need a corresponding task wake when the lid opens, or scanning will be stuck off (until something else happens, like poking the power button). BUG=chrome-os-partner:22190 BRANCH=peppy TEST=Hold down a key. Use a magnet to trigger the lid switch. Scanning should stop while the lid is "closed", and restart when the magnet is moved to "open" the lid again. Change-Id: I9ee357077f63626384ba942215f48d4d3658aa14 Original-Change-Id: I0a900f17f65b75cbdb45950cea7f50190d2bf9b1 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/170993 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/171301 Tested-by: Dave Parker <dparker@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Queue: Dave Parker <dparker@chromium.org>
* CHERRY-PICK: Haswell: Add control for touchscreen resetDave Parker2013-09-191-0/+17
| | | | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:22076 BRANCH=peppy TEST=Manual. Verify touchscreen operational in S0. Original-Change-Id: Ife2d4e11142195bddf202933430ec8af243b1309 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/167150 Reviewed-by: Randall Spangler <rspangler@chromium.org> Conflicts: common/chipset_haswell.c Change-Id: I8998c2b998d49882e9019942b87f5050369ba64b Reviewed-on: https://chromium-review.googlesource.com/170072 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Dave Parker <dparker@chromium.org> Commit-Queue: Dave Parker <dparker@chromium.org>
* falco: delay LCD VCC enable by 270msDuncan Laurie2013-09-164-17/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | Much like the backlight signal the LCD VCC enable signal needs to be delayed to ensure the panel timings are correct. It's problematic because the LVDS bridge is a black box. The signals need to be scoped to ensure everything eventually matches up. BUG=chrome-os-partner:21234 BRANCH=falco TEST=Built and booted. Panels still come up. Dexter determined the proper delay. Original-Change-Id: I6e61d1dfa9ad03be1735d05d8d8ff2549a7b0db2 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/167620 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 06aebc4f95179ba4a642623081168d590ab7700c) Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Change-Id: I401c43ac463f754f064e353099814feae3db2452 Reviewed-on: https://chromium-review.googlesource.com/169651 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Queue: Duncan Laurie <dlaurie@chromium.org> Tested-by: Duncan Laurie <dlaurie@chromium.org>
* Falco: correct input current limit for 45W adapter, Turbo offBill Richardson2013-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | Change the charger's Input Current Register setting for the 45W adapter to match the latest spec. BUG=chrome-os-partner:20739 BRANCH=Falco,ToT TEST=manual Connect a 45W adapter, run the "battery" and "charger" commands on the EC console. When the battery charge is below 10% (turbo off), the "I_in" value displayed by the "charger" command should be 1536. Before it was 2560. Change-Id: I0483b5408aa2da352cd3aeda58e1656c095d86b2 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/169323 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Falco: Always update charger's input current limit.Bill Richardson2013-09-131-11/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I was just updating the input current limit when turbo mode was enabled and disabled. However, it turns out that the charger can decide to change the setting all by itself if the inrush current is too high. This happens pretty much every time that the AC is applied. We didn't notice this while the AP was on, but when the AP was off we were exiting the watch_adapter_closely() function too soon and so we missed the transition. This CL fixes that. But just to be safe, instead of only updating when we think we need to, we're going to just update the value every time we check on the adapter. That way if we happen to miss a change due to a race condition or transient, we'll catch it the next time through the loop. BUG=chrome-os-partner:20739 BRANCH=Falco,ToT TEST=manual Before this CL, you can run "sbc 0x3f" on the EC console while plugging and unplugging the AC adapter. When the AP is off and AC is reapplied, you'd see the reported value mysteriously change. After this CL, it doesn't. Change-Id: I5661c548cccd4eb24ba4d8a0b8cd070acc2e49ef Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/169322 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Add mutex around chipset_throttle_cpu() (BRANCH ONLY)Bill Richardson2013-09-091-5/+20
| | | | | | | | | | | | | | | | | This adds a mutex around chipset_throttle_cpu(), so that multiple tasks don't interfere with each other. BUG=chromium:287985 BRANCH=Falco TEST=none We've never observed any problems here, but it could have happened. This should prevent it. Everything should continue to work as before. Change-Id: I2170a1b7af244c894100e525ed73a1b068d21e5b Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/168579 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Add command for Haswell to pause in s5 at shutdownBill Richardson2013-09-066-2/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At normal AP shutdown, Haswell systems skip S5 entirely and go directly to G3. It's sometimes handy to pause in S5 as the other systems do, for things like power-cycle tests that use the RTC to do a delayed wake from S5. This CL adds a console command and a host command to enable/disable that pause in S5. The default is to skip S5, and the override value is not persistent across EC reboots, so whenever the EC hibernates or reboots (Refresh + Power, software sync), you'll have to re-enable it again. BUG=chrome-os-partner:22346 BRANCH=falco,ToT TEST=manual On Haswell systems only. To enable the pause in S5 at shutdown, do either of these: EC console: gsv s5 1 root shell: ectool pause_in_s5 on Shut the AP down politely, and it should pause in S5 for 10 seconds before continuing to G3. You can see this by watching the EC console. To disable the pause in S5 at shutdown, do any of these: EC console: gsv s5 0 root shell: ectool pause_in_s5 off or press Refresh + POWER Boot the system, then politely shut down. This time it should go directly to G3 without pausing in S5. Original-Change-Id: I324e6e2373bc20b61a731b4ef443d7bb8edb6b83 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/168086 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 2a31e2ac4bc899de7dfbfcca191376ce7063fd2c) Change-Id: Iea1db204e904385e9615e3a379af53810f17ad5a Reviewed-on: https://chromium-review.googlesource.com/168378 Commit-Queue: Bill Richardson <wfrichar@chromium.org> Tested-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Add a generic get/set host commandBill Richardson2013-09-066-1/+160
| | | | | | | | | | | | | | | | | | | | | | | | | This adds EC_CMD_GET_SET_VALUE to the list of host commands. We have a bunch of single-value getter/setter commands, which is wasteful. This is a start towards unifying them into a simpler command. BUG=chromium:285358 BRANCH=ToT,falco TEST=none There's nothing to test just yet. This just adds the command and some basic interfaces. A future commit will make use of it. Original-Change-Id: Iee986b9d273b422bb06f3a0c9b7af50617f03d7f Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/168083 Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 3f2eba22c5d3e771904f6451a4b63a41cc6964cb) Change-Id: Ifec6597af2cf49497ec885f807a84b996acff21c Reviewed-on: https://chromium-review.googlesource.com/168377 Commit-Queue: Bill Richardson <wfrichar@chromium.org> Tested-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Handle multiple independent sources for CPU throttlingBill Richardson2013-09-0519-34/+907
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | When both the thermal task and the power/charger task have different ideas on whether the CPU should be throttled, we need to OR their opinions so that either can start throttling, but both have to agree to stop it. This CL changes the chipset_throttle_cpu() function to also take a "source" argument, so we can handle multiple opinions. As it turns out, this same also problem existed in the Falco-specific power logic by itself, but was largely masked by the threshold settings. We handle that now, too. BUG=chrome-os-partner:20739 BRANCH=falco, ToT TEST=manual This change adds a bunch of tests to ensure that all this works, so try cd src/platform/ec make BOARD=falco runtests And of course, try it on the actual hardware under the appropriate loads. Change-Id: Id651e2cdc8dbd435aad6e21c5d2ce4b932a55f88 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/168088 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Implement emulator clock fast-forwardingVic Yang2013-09-042-4/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running an unit test, the emulator is sitting in idle task for most of the time. Since we don't have interrupt support now, the emulator is just waiting for the next wake-up timer to fire. To save time, we can actually just figure out which task is the next to wake up, and then fast-forward the system clock to that time. With this, all tests run faster and we can remove time-scaling for all current tests. This improves not only run time but also stability. If one day we have interrupt support, then we will have to modify this to take into account the fact that an interrupt might wake a task before any wake-up timer fires. BUG=chrome-os-partner:19235 TEST=Run all tests in parallel for 1000 times. BRANCH=None Original-Change-Id: I4cd33b041230267c110af015d425dd78d124f963 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/167801 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 74b6f7687293b27b276d7bc2a5c0aea9b29a6649) Change-Id: I50152a32b24745b89c8494c71914136e61eef2e4 Reviewed-on: https://chromium-review.googlesource.com/168121 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Queue: Bill Richardson <wfrichar@chromium.org> Tested-by: Bill Richardson <wfrichar@chromium.org>
* Peppy: Correct adc calculation of charger currentDave Parker2013-08-301-4/+6
| | | | | | | | | | | | | | | BUG=chrome-os-partner:22405 BRANCH=peppy TEST=Run 'adc' command. Measure charger current reported against actual current. Change-Id: I77b4f23cd945be6e0a6251832e95a9423566604d Original-Change-Id: I1772a781d9d0100e69a5fd1e9a9590252ccd88d6 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/167732 Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org> Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
* Peppy: Set battery pre-charge current to worst case value.Dave Parker2013-08-301-1/+1
| | | | | | | | | | | | | | | | Which in this case is the max across batteries we plan to ship. BUG=chrome-os-partner:20801 BRANCH=peppy TEST=Difficult to test without a deeply discharged battery. Change-Id: I23f8783f9b0188c911a446d8cf5110df48a294d0 Original-Change-Id: Ieeb8fafc1768accb3cd2cd85a919b232aab77343 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/167731 Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org> Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
* CHERRY-PICK:Update Peppy keyboard mask for Japanese keyboardsDave Parker2013-08-301-1/+1
| | | | | | | | | | | | | | BUG=chrome-os-partner:21798 BRANCH=peppy TEST=Run evtest. Verify correct key codes returned. Change-Id: I183d7ad847eb58ab9e6fddbc1c9a18ffdb72ca11 Original-Change-Id: I48b7524608c546d67eb7975de7ff48874df4568b Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/65624 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/167661 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* CHERRY-PICK:Update keyboard scanmatrix for Japanese keyboards.Dave Parker2013-08-302-7/+7
| | | | | | | | | | | | | | | | BUG=chrome-os-partner:21798 BRANCH=peppy TEST=Run evtest. Push every key. Verify correct key code reported. Change-Id: Ied22321f0a7d4da9dc82b8b5b1d21e517d8c879a Signed-off-by: Dave Parker <dparker@chromium.org> Original-Change-Id: Ic6e4a38608f4bc8c66f487998912a7921ddb03cb Reviewed-on: https://chromium-review.googlesource.com/65623 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Yung-chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/167660 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* CHERRY-PICK:Peppy: Make power LED turn amber when entering suspendDave Parker2013-08-301-15/+31
| | | | | | | | | | | | | | | | | | | This fixes some jank in how the power LED works when going into suspend. Previously the power LED could turn off for up to three seconds before flashing amber when entering suspend. BUG=chrome-os-partner:21622 BRANCH=peppy TEST=Manual. Enter suspend and observe that LED goes from blue to amber without turning off first. Change-Id: If6ee19fc13d4c09a514069d97aa9fb0b72385c40 Original-Change-Id: Ib0bf9e998d250b0731405394d3ebb50d90de7cda Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/167388 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/167578 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* Peppy: Enable PP5000 while checking initial keyboard stateChromeOS Developer2013-08-291-0/+23
| | | | | | | | | | | | | | | | | | | | BRANCH ONLY! Not for ToT. Active ESD components on the keyboard scan matrix require 5V power. These components must be powered to read the keyboard state correctly. Check the keyboard 5mSec after powering the 5V rail to wait for the keyboard state to settle down. BUG=chrome-os-partner:22127 BRANCH=peppy TEST=Manual. Boot normally. Boot normally with Esc + F3 + Power + another key. Boot into recovery with Esc + F3 + Power. Change-Id: I064cf6eb98b47c897079f145e945b4ab3ae4ef23 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/66835
* Falco: LED should flash white when battery is < 12%, not 7%.Bill Richardson2013-08-271-1/+6
| | | | | | | | | | | | | BUG=chrome-os-partner:22159 BRANCH=Falco, ToT TEST=manual Let the battery run down. Below 12%, the LED should blink white. Change-Id: I3be2da69a113134456420b1a305e4a0c159c0022 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/167080
* 8042: Wake the keyboard scan task when keystrokes are enabledDuncan Laurie2013-08-261-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the keyboard_scan_task is the only place that calls keyboard_raw_enable_interrupt(1) it is possible for the keyboard to be left with interrupts disabled/pending if the keyboard scan task is asleep. This change will wake the keyboard_scan_task when the 8042 keystroke_enable(1) is called, which will wake up the task and it will call into enable the keyboard interrupt and clear pending interrupts. I thought keyboard_enable() might be a better place to do this but that seems to cause a hung task when flashing firmware... This condition happens semi-regularly on resume on Falco and Peppy devices. There may be a better approach here so for now I am only commiting this to the Falco/Peppy firmware branch but a similar or better fix is probably needed in TOT. BUG=chrome-os-partner:22169 BRANCH=falco,peppy TEST=manual: many suspend/resume cycles on falco with the physical lid to ensure that the keyboard is still functional. Change-Id: I2f56f9c07b852c4b03b090d0da6b7128804962ab Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66986 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Add abstract "cond_t" type to detect state transitions.Bill Richardson2013-08-233-1/+202
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We often need to watch for transitions between one state and another, so that we can issue warnings or take action ONCE. This abstracts that "have I already reacted to this" stuff into a single set of functions. For example, this code reads a GPIO every time through the loop, but it only generates an event when the GPIO value changes from 0 to 1: cond_t c; cond_init_false(&c); while(1) { int val = read_some_gpio(); cond_set(&c, val); if (cond_went_true(&c)) host_event(SOMETHING_HAPPENED); sleep(1); } BUG=none BRANCH=falco,peppy TEST=manual Note: This doesn't really need cherry-picking from ToT (it was a prerequisite for another CL that we decided NOT to backport), but it doesn't hurt. Other than the tests, nothing uses this. It's easier to just pull it in than to keep treating it as an exception. To test: make BOARD=falco runtests Original-Change-Id: I42393fcf3c4eb71b9551118a0f442d55c0691315 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/65071 (cherry picked from commit 0c8c2e453ab3960f315050fbb9808f438398624f) Change-Id: I44fe9a660016f3aa2ea2c7f8eb5c3e698d8f618f Reviewed-on: https://gerrit.chromium.org/gerrit/66838 Commit-Queue: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Tested-by: Bill Richardson <wfrichar@chromium.org>
* Falco: throttle if battery current drain is too highBill Richardson2013-08-234-0/+179
| | | | | | | | | | | | | | | | | | | | | | | I missed this requirement the first time. Now it's here. Also adding a test for it as well. BUG=chrome-os-partner:20739 BRANCH=falco TEST=manual make BOARD=falco runtests Original-Change-Id: I88aac8d12d09f7970b04c4aa02b6986b5ea16306 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66684 Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 8c7a18616f216fe4c6df2d7fc2b3fc6319c385fd) Change-Id: I868ff17b722d27eb6e86ef9f2fce1ce295ac7760 Reviewed-on: https://gerrit.chromium.org/gerrit/66832 Commit-Queue: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Tested-by: Bill Richardson <wfrichar@chromium.org>
* Remove default values for undefined tasks from charge state moduleDuncan Laurie2013-08-221-7/+0
| | | | | | | | | | | | | | | | | | | | | | Due to the order of pre-processing, TASK_ID_CHARGER and TASK_ID_SWITCH aren't defined even if they are in the ec.tasklist for a board. BUG=chrome-os-partner:21565 BRANCH=falco,peppy TEST=Turn device off, remove AC power. Plug AC power back in. Charging LED should light in ~1 second. Original-Change-Id: I20ebbec71ca5e5dc8ab34da946d3dfeb91fc7849 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66466 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 046d6256712e35ea0bc9eae4acf0363a9f8895d4) Change-Id: I21b493e5990aa765ea347afa8bd9187f66596975 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66651
* Change peppy battery led error blink timingDuncan Laurie2013-08-221-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (led turn on 1 sec and turn off 3 sec) BRANCH=peppy BUG=none TEST=manual Disconnect internal battery to check battery led blink timing. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Conflicts: common/led_peppy.c Original-Change-Id: I1417073448505aa5dca2e0e999185b5a9b53410e Signed-off-by: David Huang <David.Huang@quantatw.com> Reviewed-on: https://gerrit.chromium.org/gerrit/63891 Reviewed-by: Dave Parker <dparker@chromium.org> Reviewed-by: Hsu Henry <Henry.Hsu@quantatw.com> Tested-by: Dave Parker <dparker@chromium.org> Commit-Queue: Dave Parker <dparker@chromium.org> (cherry picked from commit 3f1380c624a4ece2f5ea131ca63be39d6559b339) Change-Id: I21c73cc20482583b3eca1440e1806276aa0f8546 Reviewed-on: https://gerrit.chromium.org/gerrit/66650 Tested-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Queue: Duncan Laurie <dlaurie@chromium.org>
* falco: delay backlight enable by 420msDuncan Laurie2013-08-223-2/+90
| | | | | | | | | | | | | | | | | | | | | | | | In order to meet the panel power sequencing requirements the backlight enable needs to be delayed by 420ms. As the EC has direct control over the panel backlight, it's difficult to align with the reset of the panel signals which are controlled by an LVDS bridge. In order to not affect other boards the backlight implementation has been moved within falco's board directory. BUG=chrome-os-partner:21234 BRANCH=falco TEST=Built with a printf to verify rough timing transitions. Original-Change-Id: I5d6cd2989f17cc5c188d307f6ceacb52341a87b4 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66238 Reviewed-by: Bill Richardson <wfrichar@chromium.org> (cherry picked from commit 02ec04d215059464cf7acc6accdec720fc4c7c8c) Change-Id: Ia0ae5d3413eee461d522e975685fa9efb95d2bc9 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66649
* Add fan power enable GPIO for PeppyDuncan Laurie2013-08-224-2/+10
| | | | | | | | | | | | | | | | BUG=chrome-os-partner:21847 BRANCH=peppy TEST=Manual. Check state of GPIO_P5000_FAN_EN with lid open and lid closed. Can also check with meter via TP109. Original-Change-Id: I8a64c14d53dd84a5d586c0abb04ccb71de0e78b3 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/65674 (cherry picked from commit 39421848c6bfe0881fc8e6eca3a5656a91662638) Change-Id: I6137650ccd33edd85ad213d7b57aa032e9c0ab2c Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66648
* Lock BOOTCFG to safe values for all LM4sBill Richardson2013-08-2210-40/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BOOTCFG register configures a couple of important things: whether to allow jumping into the builtin ROM bootloader at reset, and whether or not to allow JTAG access for programing and debugging. The default is "no" and "yes". But the BOOTCFG register can be locked so that it can't be changed again, which means that if the wrong values are put into it, the system is pretty much bricked. On Link, we wrote a BOOTCFG value that allowed a GPIO to be used as a bypass to optionally trigger the ROM bootloader, but on Slippy and its derivatives that GPIO is not pulled up. If you program the Link values into BOOTCFG on a Slippy, the system is stuck in the ROM bootloader more or less forever. This change disables that GPIO, keeps JTAG enabled, and locks those settings for all LM4 chips (it's a chip config now, not a board config). We've never actually used the GPIO to invoke the ROM bootloader, but we have managed to brick a number of systems just by having it enabled, so we're going to lock it into a safe configuration now. BUG=chrome-os-partner:19247 BRANCH=falco,peppy TEST=manual Reflash, boot, power cycle (actually unplug the EC from AC and battery) a few times. It should continue to work. Original-Change-Id: Iaf1a81d6814104421a56425490e3d5164ea9b617 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66538 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 5d1eeefdbcf16e9eb18540b7b6ed4aff8609c4d9) Change-Id: I755286a6c7855034e7eeeb9ca4c1e33fd8a7c0a5 Reviewed-on: https://gerrit.chromium.org/gerrit/66656 Commit-Queue: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Tested-by: Bill Richardson <wfrichar@chromium.org>
* Tweak thermal points again.Bill Richardson2013-08-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Step Fan RPM trigger point (CPU Tj) unit K / 'C Step 1 2700 under 328K / 55'C Step 2 3000 328K / 55'C Step 3 3300 333K / 60'C Step 4 3600 338K / 65'C Step 5 3900 343K / 70'C Step 6 4200 348K / 75'C Step 7 4500 358K / 85'C Step 8 5000 368K / 95'C BUG=chrome-os-partner:20805 BRANCH=falco,peppy ONLY! Not ToT! TEST=manual Heat it up, watch what happens. Change-Id: I4decd46c2ea916d857861a266f95007c39588beb Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66260 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* falco: Use PROCHOT to throttle instead of asking host nicelyDuncan Laurie2013-08-192-2/+9
| | | | | | | | | | | | | | | | | | Rather than trying to be graceful when throttling just use the big PROCHOT hammer. The chipset_throttle_cpu() function is implemented and the falco specific charger code now calls this instead of the host_throttle_cpu() function. BUG=chrome-os-partner:20739 BRANCH=falco TEST=manual: emerge-falco chromeos-ec Change-Id: I2fb80e3b346d700a86f531da23699e5fa37ba881 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66258 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Poll and cache g781 temperature valuesDuncan Laurie2013-08-196-19/+38
| | | | | | | | | | | | | | | | | BUG=chromium:271236 BRANCH=falco,peppy TEST=Run 'ectool temps all' Verify temp. values are present for the g781. Original-Change-Id: I2ea8aff9e256167bf04abc959f971da94fc51e77 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/65597 Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit e1f20537e52ae2f0725c588ff0caeab5159394a0) Change-Id: I0cd72114d494cb89724528af01f0df5cb0724235 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66257
* Peppy: set fan/thermal steps (BRANCH ONLY)ChromeOS Developer2013-08-192-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NOTE: This CL is for the branch only. It does NOT go into ToT. This sets the thermal steps and fan speeds as requested: Step Fan RPM trigger point (CPU Tj) unit K / 'C Step 1 0 under 320K / 47'C Step 2 3200 320K / 47'C Step 3 3700 330K / 57'C Step 4 4000 337K / 64'C Step 5 4400 344K / 71'C Step 6 4900 351K / 78'C Step 7 5500 358K / 85'C Step 8 6500 368K / 95'C This also sets the CPU hot points to the following: 373K / 100C => assert PROCHOT 378K / 105C => give the CPU three second to cool off, then shutdown 383K / 110C => shutdown immediately BUG=chrome-os-partner:21971 BRANCH=peppy ONLY! Not ToT! TEST=manual Change-Id: I832d4c29aecc96f7b844c41ab8ca698618e592f1 Reviewed-on: https://gerrit.chromium.org/gerrit/66141 Tested-by: Dave Parker <dparker@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Dave Parker <dparker@chromium.org>
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