summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
...
* cr50: Add SPI hashing commandRandall Spangler2018-02-193-24/+487
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows hashing or dumping SPI flash from the Cr50 console even on a locked device, so you can verify the RO Firmware on a system via CCD. See design doc: go/verify-ro-firmware (more specifically, "Cr50 console commands for option 1") BUG=chromium:804507 BRANCH=cr50 release (after testing) TEST=manual: # Sample sequence spihash ap -> requires physical presence; tap power button spihash 0 1024 -> gives a hash; compare with first 1KB of image.bin spihash 0 128 dump -> dumps first 128 bytes; compare with image.bin spihash 128 128 -> offset works spihash 0 0x100000 -> gives a hash; doesn't watchdog reset spihdev ec spihash 0 1024 -> compare with ec.bin spihash disable # Test timeout spihash ap # Wait 30 seconds spihash 0 1024 -> still works # Wait 60 seconds; goes back disabled automatically spihash 0 1024 -> fails because spihash is disabled # Presence not required when CCD opened ccd open spihash ap -> no PP required spihash 0 1024 -> works spihash disable # Possible for owner to disable via CCD config ccd -> HashFlash is "Always" ccd set HashFlash IfOpened ccd lock spihash ap -> access denied # Cleanup ccd open ccd reset ccd lock Change-Id: I27b5054730dea6b27fbad1b1c4aa0a650e3b4f99 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/889725 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* tcpm/fusb302: Wake charger task on VBUS level changePhilip Chen2018-02-191-0/+1
| | | | | | | | | | | | | | | | | We need to wake up charger task right after AC is plugged so that the charge state can be updated immediately. BUG=b:71520398 BRANCH=none TEST=Confirm charger task wakes up immediately when AC is plugged in a Scarlet in G3. Change-Id: I4a65b3da363cdc204b800bd300824dae616770cb Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/869419 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* mchpevb1: Add remaining board filesScott Worley2018-02-193-0/+803
| | | | | | | | | | | | | | | | | Add Microchip EVB plus SKL RVP3 remaining board files for battery, LED, and USB PD. BRANCH=none BUG= TEST=Review only. CQ-DEPEND=CL:840654,CL:841022 Change-Id: I34ccb33eb44e73ab841f96f4733bfe419b095678 Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/841043 Commit-Ready: Randall Spangler <rspangler@chromium.org> Tested-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* mchpevb1: Add MCHP EVB board build filesScott Worley2018-02-194-0/+581
| | | | | | | | | | | | | | | | | | | | | Add Microchip MEC17xx eval board build makefile rules, GPIO file, and tasklist. EVB connected to Intel SKL RVBP is eSPI mode. EVB has smart battery and temperature sensor on I2C and a BMI160 gyro connected to GPSPI0. BRANCH=none BUG= TEST=Review only. CQ-DEPEND=CL:841022,CL:841043 Change-Id: Ie17b896766b80130e3cf2812f6239030027983d8 Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/840654 Commit-Ready: Randall Spangler <rspangler@chromium.org> Tested-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* mchpevb1: Add mchpevb1 board filesScott Worley2018-02-192-0/+1582
| | | | | | | | | | | | | | | | | Add Microchip EVB plus SKL RVP3 main board files. BRANCH=none BUG= TEST=Review only. CQ-DEPEND=CL:840654,CL:841043 Change-Id: I2f3cc33989e911c464f761374c0d2d26b054b7d7 Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/841022 Commit-Ready: Randall Spangler <rspangler@chromium.org> Tested-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Fizz: Execute PMIC reset before vboot_mainDaisuke Nojiri2018-02-083-1/+14
| | | | | | | | | | | | | | | | | | | When AP requests cold reboot, currently EC does not perform PMIC reset because chipset_handle_reboot is executed only after EC jumps to RW. This causes EC to miss CHIPSET_STARTUP and CHIPSET_RESUME events because power rails do not cycle. This patch will make EC execute PMIC reset to before vboot_main. BUG=b:73093795 BRANCH=none TEST=reboot, reboot ap-off, verify USB ports are powered after transitionining to dev mode. Change-Id: Ic04395d8a4bff45d9fc60601b07c600dfb75d9c0 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/908094 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* usb-pd: Adding port number to debug messagesJett Rink2018-02-081-15/+15
| | | | | | | | | | | | BRANCH=none BUG=none TEST=verified debug message on grunt Change-Id: Ibc1632d22b6e4bbc5b95c140db4a7cfb536687c8 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/907417 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* Fizz: Update thermal table by projectRyan Zhang2018-02-082-14/+53
| | | | | | | | | | | | | | | | | | | | | | | | | 1. Prochot/Shutdown Point a. Prochot on: >=81C, off: <=77C b. Shutodwn: >=82C 2. custom fan table There are three projects sharing two tables, and use Kench & Teemo's table before getting correct OEM ID because it raises fan speed quicker than the other one. a. Kench & Teemo & default b. Sion BUG=b:70294260 BRANCH=master TEST=EC can get two fan tables with different cbi value. Change-Id: Ie1bffbcf5c353a9aae5806f6c2b41554eed22b7d Signed-off-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/886121 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* whiskers: Disable keyboard/USB interface when magnet sensor activeNicolas Boichat2018-02-084-3/+23
| | | | | | | | | | | | | | BRANCH=none BUG=b:72722179 TEST=lidopen/lidclose, see that USB interface is getting enabled/disabled TEST=Close/open sensor with a magnet, see that USB interface is getting enabled/disabled TEST=Boot with sensor open, USB interface is on Change-Id: Ic738fa2f2adea03cd29914bb5fc96a1fa6834122 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/894783 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* lpc: Prevent watchdog reset caused by KBC IBF interrupt on chromebox.Mulin Chao2018-02-081-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | Since there is no KEYPROTO task on chromebox such as fizz and sion, lpc driver doesn't declare KBC IBF/OBE ISRs for these events. If host put data in ec's KBC input buffer unexpectedly, exception_panic() will be executed in default_handler. Then we will see ec print "=== PROCESS EXCEPTION: 29 ====== xPSR: 01000000 ===" message without any hard fault and reset. This CL fixed this symptom by turning off KBC if there is no KEYPROTO task. We also run suspend stress test on fizz and no watchdog reset symptom occurred. BRANCH=none BUG=b:72353876 TEST=No build errors. Run suspend stress test on fizz and no watchdog reset occurred. Change-Id: I4744fac0d6fb2628849c728d4860509434fa2cbb Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/899706 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
* Fizz: Monitor input current (version 2.0)Daisuke Nojiri2018-02-083-82/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fizz has three FETs connected to three registers: PR257, PR258, PR7824. These control the thresholds of the current monitoring system. PR257 PR7824 PR258 For BJ (65W or 90W) off off off For 4.35A (87W) on off off For 3.25A (65W) off off on For 3.00A (60W) off on off The system power consumption is capped by PR259, which is stuffed differently depending on the SKU (65W v.s. 90W or U42 v.s. U22). So, we only need to monitor type-c adapters. For example: a 90W system powered by 65W type-c charger b 65W system powered by 60W type-c charger c 65W system powered by 87W type-c charger In a case such as (c), we actually do not need to monitor the current because the max is capped by PR259. AP is expected to read type-c adapter wattage from EC and control power consumption to avoid over-current or system browns out. The current monitoring system doesn't support less than 3A (e.g. 2.25A, 2.00A). These currents most likely won't be enough to power the system. However, if they're needed, EC can monitor PMON_PSYS and trigger H_PROCHOT by itself. BUG=b:72883633,b:64442692,b:72710630 BRANCH=none TEST=Boot Fizz on 60W/87W/BJ charger. Verify GPIOs are set as expected. Change-Id: Ic4c0e599f94b24b5e6c02bbf1998b0b89ecad7bf Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/900491 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Fizz: Uprev board version to 2.2Daisuke Nojiri2018-02-081-1/+1
| | | | | | | | | | | | | | This patch sets the board version for CBI blob to 2.2. BUG=none BRANCH=none TEST=Boot Fizz. Change-Id: Ibbb4083b82af3803d06bbdd157b16b369f7f6784 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/905403 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* driver/led/lm3630a: Disable Bank B, avoid race setting brightnessNicolas Boichat2018-02-081-9/+8
| | | | | | | | | | | | | | | | | | | | It is not necessary to enable Bank B, as we do not use it. Also, we have seen a race between enabling the banks and writing the brightness register to 0xFF, where the chip would reset the value after it has been set by EC. Adding a short 100us sleep fixes the issue. BRANCH=none BUG=b:69379749 TEST=Flash whiskers, pwm 0 50 works, even after a cold reset. Change-Id: Ic523a2475c3874c8433eb1b39e927793dd893e8f Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/906165 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Benjamin Gordon <bmgordon@chromium.org>
* flash_ec: iteflash: modify processDino Li2018-02-081-0/+13
| | | | | | | | | | | | | | | | | | With this change, we can do flashing via flex cable. BRANCH=none BUG=b:35573714 TEST=To run "~/trunk/src/platform/ec/util/flash_ec --board=reef_it8320" and flashing is done and cold reset automatically. CQ-DEPEND=CL:855978 Change-Id: I078afa6d6f6f8f7bf60a1677e4c357dbe906e7dc Signed-off-by: Donald Huang <donald.huang@ite.com.tw> Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/344481 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cr50: prepare for pre-pvt images' revision bumpVadim Bendebury2018-02-082-2/+2
| | | | | | | | | | | | | | This will allow to make differences between pre-pvt and mp images better visible. BRANCH=cr50 BUG=none TEST=none Change-Id: I3abf24443a208482167231d93983b8edcace5f55 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/907170 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* rma: enable WP on RMA disableVadim Bendebury2018-02-083-6/+31
| | | | | | | | | | | | | | | | | | When RMA procedure is completed WP needs to be enabled back. BRANCH=cr50, cr50-mp BUG=b:37952913, b:73075443 TEST=on a Robo device, verified that WP is enabled, took the device through RMA unlock, verified that WP is disabled, took the device through RMA disable, verified that WP is enabled again. Also confirmed that after RMA is disabled WP status follows the battery. Change-Id: Iad6af7d16aadcd10d580f709aeb942cf508a8489 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/905926 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* tpm: set waiting task ID earlier.Vadim Bendebury2018-02-081-3/+10
| | | | | | | | | | | | | | | | | | The TPM task is running on a higher priority than the hook task invoking TPM reset for RMA purposes. The waiting task ID value needs to be set before TPM task is signaled to reset. BRANCH=cr50, cr50-mp BUG=b:37952913 TEST=with the corresponding ccd_config.c changes fully verified RMA process (not just generating and processing the challenge). Change-Id: Id112d59ae0c3fd31a32e652c6a043fc3fd3bbe07 Signed-off-by: Vadim Bendebury <vbendeb@google.com> Reviewed-on: https://chromium-review.googlesource.com/905925 Commit-Ready: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* charge_state_v2: Separate update_base_battery_infoNicolas Boichat2018-02-081-30/+30
| | | | | | | | | | | | | | | Indentation in charger_task is getting out of control, let's move the logic to a new function. BRANCH=none BUG=b:71881017 TEST=Flash lux and wand, battery algorithm works as expected. Change-Id: Ife008370218f0d9eb0f96088ec144b0aba40716f Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/901442 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* charge_state_v2: Store battery information in new structuresNicolas Boichat2018-02-088-98/+126
| | | | | | | | | | | | | | | | | | | On dual battery systems, this allows to keep both batteries information in similar structures. This also means that battery information can only be fetched via host commands EC_CMD_BATTERY_GET_STATIC/DYNAMIC (next CL will make it possible to fetch the information via shared memory/ACPI). BRANCH=none BUG=b:65697620 TEST=Boot lux/wand, dual-battery algorithm works, AP can fetch both battery information via host commands. Change-Id: I3c087e8f378c5cef0006f6bfe58335228a880e5b Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/888381 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* Fizz/CBI: Create CBI blobsDaisuke Nojiri2018-02-081-0/+27
| | | | | | | | | | | | | This patch makes make create EEPROM blobs which contain Cros Board Info. BUG=b:72949522 BRANCH=none TEST=make buildall. make BOARD=fizz cbi_kench. Change-Id: Ie4c50f4707285b44c13afc7410a5ea823a26d98e Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/902822 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* charger/rt946x: Set up pre-charge currentPhilip Chen2018-02-062-0/+28
| | | | | | | | | | | | | | | | We should set up pre-charge current based on the battery pack we use. By default this parameter is 150mA. BUG=chromium:809246 BRANCH=none TEST=confirm IPREC register is written correctly Change-Id: I2cb0906c74bef144d80c38b5d15519d594ed42f2 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/902945 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* meowth: zoombini: Enable PWM LED support.Aseda Aboagye2018-02-063-125/+113
| | | | | | | | | | | | | | | BUG=b:69138917 BRANCH=None TEST=Flash meowth; verify that LEDs behave as expected. TEST=Repeat above test for zoombini. Change-Id: I07ae4b4d0f62c653d3d15c493a7ece573551212a Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/888221 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* common: Add support for PWM LEDs.Aseda Aboagye2018-02-064-0/+284
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support for a common framework for PWM controlled LEDs. If there are multiple LEDs, they will all follow the same pattern. The pattern is such that it follows the Chrome OS LED behaviour specification, essentially a similar version of led_policy_std.c but for PWM controlled LEDs. To use this framework, a board must do the following: - First, define the number of logical PWM LEDs which will be controlled by this common policy, CONFIG_LED_PWM_COUNT. - Then declare those logical LEDs and define the PWM channels that comprise those LEDs. (struct pwm_led pwm_leds[]). - Next, define what each color should look like (struct pwm_led led_color_map[]). By default, the colors follow the recommended colors in the LED behaviour spec, which assume an LED with a red and green channel. If a board differs or wishes to change the colors in general, they can redefine the colors (CONFIG_LED_PWM_*_COLOR) as they see fit. The colors must be one in enum ec_led_colors. These colors are the ones that can represent the charging state, SoC state, etc. BUG=b:69138917,chromium:752553 BRANCH=None TEST=make -j buildall TEST=Enable led_pwm for meowth, and verify that LEDs behave as expected. Change-Id: I945b86a7f8ed30df58d7da835d83577192548bea Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/888220 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* meowth: Enable discharge on AC.Aseda Aboagye2018-02-061-0/+1
| | | | | | | | | | | | | | | This is needed for testing. BUG=None BRANCH=None TEST=Flash meowth; verify can discharge on AC. Change-Id: I1cf1149fb90077deeb940737e8d103dcec8444fe Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/888225 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* cbi-util: Help GCC determine that variable is initializedMartin Roth2018-02-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GCC 6.3 can't tell that we enforce the variable 'size' being set, so initialize it to 0 to make the warning go away. The code does actually verify that size is set, but not by checking the size variable itself. util/cbi-util.c: In function 'main': util/cbi-util.c:139:8: error: 'size' may be used uninitialized in this function [-Werror=maybe-uninitialized] buf = malloc(size); ^~~~~~~~~~~~ util/cbi-util.c:233:11: note: 'size' was declared here uint32_t size; ^~~~ BUG=b:72609872 BRANCH=None TEST=Build with coreboot toolchain. Change-Id: Ide41a0fce40254f2fa3a8626dec75840a728d967 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/890703 Commit-Ready: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cleanup: adding port info and timing to debug messageJett Rink2018-02-061-1/+1
| | | | | | | | | | | BRANCH=none TEST=none BUG=none Change-Id: I5639be21b285beef61e939f1c70c5ab5a14ade7e Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/900305 Reviewed-by: Edward Hill <ecgh@chromium.org>
* meowth: zoombini: Add HPD support.Aseda Aboagye2018-02-062-1/+51
| | | | | | | | | | | | | | | | | The HPD pins for meowth and zoombini go from the EC to the AP. This commit drives the HPD correctly. BUG=b:72413020 BRANCH=None TEST=Flash meowth; Use a couple charge-through hubs, unplug HDMI cable, replug, verify AP sees new DP sink. Change-Id: Ie1f86378c59fc4a717edc537ff8afe01b21d9b68 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/888226 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* touchpad_elan: Power off when USB is suspended without wakeNicolas Boichat2018-02-061-2/+61
| | | | | | | | | | | | | | | | touchpad can be powered off when the USB interface is disabled without setting the remote wake feature (USB_REQ_FEATURE_DEVICE_REMOTE_WAKEUP), as events would be ignored anyway. BRANCH=none BUG=b:72683995 TEST=touchpad is disabled when lid is closed. Change-Id: I688fce16ab8c75330e588ec130fb2aa499fc0ed1 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/897069 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* keyboard_scan: Disable when USB is suspended without wakeNicolas Boichat2018-02-063-0/+20
| | | | | | | | | | | | | | | | Keyboard matrix scanning can be disabled when the USB interface is disabled without setting the remote wake feature (USB_REQ_FEATURE_DEVICE_REMOTE_WAKEUP), as events would be ignored anyway. BRANCH=none BUG=b:72683995 TEST=keyboard matrix scanning is disabled when lid is closed. Change-Id: I0b2346cc3426b9ef51127424f9953fd5c20ecd49 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/897068 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cr50: prepare to release 0.1.1Vadim Bendebury2018-02-062-2/+2
| | | | | | | | | | | | | | The new release will include bug fixes and new features (line RMA reset, CCD debug, management, etc.). BRANCH=cr50 BUG=none TEST=none Change-Id: I25c22d00acd734ad0b7557cb9469d8b0f4db131e Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/902423 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Enable PD communication in RO for external displayDaisuke Nojiri2018-02-066-54/+57
| | | | | | | | | | | | | | | | | | | | | | | | This patch makes EC enable PD communication if it's running in manual recovery mode. This is required to show recovery screen on a type-c monitor. This patch also makes EC-EFS ignore power availability. It will make EC verify & jump to RW even if power is sourced by a barrel jack adapter. This should allow depthcharge to show screens (e.g. broken, warning) on a type-c monitor. BUG=b:72387533 BRANCH=none TEST=On Fizz with type-c monitor, verify - Recovery screen is displayed in manual recovery mode. - Critical update screen is displayed in normal mode. - Warning screen is displayed in developer mode. Monitors tested: Dingdong, Dell S2718D Change-Id: Ib53e02d1e5c0f5b2d96d9a02fd33022f92e52b04 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/898346 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Fizz: Suppress EC_CMD_PD_GET_LOG_ENTR debug logDaisuke Nojiri2018-02-061-0/+1
| | | | | | | | | | | | | | | | Host command handler prints every single host command except when commands are repeated back-to-back. Some commands do not provide useful info when studying feedback reports or what is worse they may hide critical info by flooding the EC log. BUG=chromium:803955 BRANCH=none TEST=Observe 'HC 0x115' is not printed. Change-Id: I4901b27bbfedd54dc0d364b16c49d4ed0dea0fc4 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/896694 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* reef_it8320: don't pull-up tx/rx of uartDino Li2018-02-061-1/+1
| | | | | | | | | | | | | | | Because H1 monitor tx/rx signals to detect servo board, so we can't pull-up tx/rx or the DETECT_SERVO of H1 will be always high even the servo board isn't connected. BUG=none BRANCH=none TEST=H1 detect servo board correctly. Change-Id: I2f2dfa220ed77478e6e622a0ed1189f559044aa3 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/897315 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* charge_state_v2: Safer power transfer between lid and baseNicolas Boichat2018-02-063-32/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To avoid issues where adapter would drive against OTG of lid or base, and to make sure that we do not over-current the adapter, we disconnect the base/lid power transfer whenever a new adapter is connected. We reenable power transfer as needed. We also separate out base current control as a new function, that allows us to record the previous base current only when the base charge control command is successful, and ignore errors until the base is responsive for the first time. Finally, we make sure that charge_allocate_input_current_limit is only called from a single location in charger_task. BRANCH=none BUG=b:71881017 TEST=Plug/unplug base, reset lux EC, connect charger. Base is detected, power allocation works as expected. Change-Id: I8b206d5b0fbcf0fe868b56a0336745aebe2a6dc2 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/880021 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cr50: create ap_uart state machineMary Ruthven2018-02-067-115/+172
| | | | | | | | | | | | | | | | | | | | | | | This change creates a state machine to handle ap uart detection. It removes all of the ap_uart stuff from ap_state.c and moves it to ap_uart_state.c. All boards will now use ap_uart to enable/disable ap uart and tpm_rst_l to detect the ap state. Separate ap uart detection from ap detection, so we can disable the ap uart without enabling deep sleep. If the ap is in S3 on ARM devices, Cr50 wont be in deep sleep, but the AP UART RX signal wont be pulled up. In this case we need cr50 ap rx to be disabled and deep sleep to be disabled. BUG=b:35647982 BRANCH=cr50 TEST=run firmware_Cr50DeviceState on scalet and electro Change-Id: I81336a9e232df8d44b325eef59327a1c06a80cba Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/884307 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* eve: Add support for dumping PMIC fault registersDuncan Laurie2018-02-062-0/+53
| | | | | | | | | | | | | | | | | | | | | | If during PMIC initialization, it is identified that there was a VR fault, then dump fault registers 0x16 and 0x17 to EC console. This information is very useful during debugging sudden power losses in field and so it is printed out to EC console. Additionally, add panic reason with these register values as panic data so that OS can provide this information in cros ec panicinfo. This helps in retaining the information even if EC console logs overflow. BUG=b:65026806 BRANCH=eve TEST=Verified that on a VCCIO shutdown, PMIC VR fault is reported: "PMIC VRFAULT: PWRSTAT1=0x80 PWRSTAT2=0x00" Change-Id: I583e513f865aeefc7dfc9860ce0ce9789808dea2 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/896163 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* stm32/usb: Add HOOK_USB_PM_CHANGE, called when USB is resumed/suspendedNicolas Boichat2018-02-029-1/+70
| | | | | | | | | | | | | | | | | | In particular, this will allow touchpad driver and keyboard matrix scanning to be powered off/disabled when the USB interface is disabled without setting the remote wake feature (USB_REQ_FEATURE_DEVICE_REMOTE_WAKEUP), as events would be ignored anyway. BRANCH=none BUG=b:72683995 TEST=With next CLs, touchpad and keyboard matrix scanning are disabled when lid is closed. Change-Id: I3750bfaf8c31cde075adf9da4fef39753b8981c5 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/897067 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* nautilus : clean up gpiosYB.Ha2018-02-022-7/+4
| | | | | | | | | | | | | | | | clean up unused gpios BUG=none BRANCH=none TEST=build/flash nautilus Change-Id: Ifdebc885d7f81b560b27bfed5abb93d8976e9641 Signed-off-by: YB.Ha <ybha@samsung.com> Reviewed-on: https://chromium-review.googlesource.com/897305 Commit-Ready: YongBeum Ha <ybha@samsung.com> Tested-by: YongBeum Ha <ybha@samsung.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* grunt: Set USB-C DP HPD GPIOs correctly.Edward Hill2018-02-021-7/+49
| | | | | | | | | | | | | | | | | Change the EC to drive the Hotplug Detect (HPD) GPIOs. Grunt HW has these driven from EC to SOC, unlike coral which had the TCPCs drive the HPD signals to SOC. BUG=b:71810897 BRANCH=none TEST=external display works using USB-C to DP adapter on both ports Change-Id: I22ec9eecc5bdf9c6463dd3ce208d051faf15c57a Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/892099 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* CBI: Return ACCESS_DENIED on write failure due to WPDaisuke Nojiri2018-02-022-3/+9
| | | | | | | | | | | | | | | | This patch makes EC_CMD_SET_CROS_BOARD_INFO return EC_RES_ACCESS_DENIED if the command fails due to write-protect switch. BUG=b:70294260 BRANCH=none TEST=Verify 'ectool cbi set 2 4' prints 'WP enabled?' when WP is enabled. Change-Id: I7c27ee748caf32e57f22ab79edcbff96e42c44ad Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/897683 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* cleanup: formatting debug messageJett Rink2018-02-021-4/+3
| | | | | | | | | | | | | Adding newline to separate messages better BRANCH=none TEST=none BUG=none Change-Id: Ie454dfc532310c480f350c9b15280bf96634b322 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/897909 Reviewed-by: Edward Hill <ecgh@chromium.org>
* ccd: fix scan-admin warningsVadim Bendebury2018-02-021-3/+5
| | | | | | | | | | | | | | Automated code scanner highlighted a few problems in the recent ode additions. This patch fixes the problems. BRANCH=cr50 BUG=none TEST=none Change-Id: I1f199eb5d2af992384ab04f3010b4b646464a70f Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/897993 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Grunt: Set AP reset pin to open drainMartin Roth2018-02-021-1/+1
| | | | | | | | | | | | | | | | | | | By setting this GPIO to open drain, we don't need to make any board changes as it won't conflict with the warm reset pin from the servo header. TEST=Warm reset works BUG=B:72751599 BRANCH=None Change-Id: I29d976851fc011fcb130a1747e4a39c8bf80a4ed Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/898075 Commit-Ready: Aaron Durbin <adurbin@chromium.org> Tested-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* grunt: Rename orange LED to amberSimon Glass2018-02-022-3/+3
| | | | | | | | | | | | | | 'Amber' seems to be more common in the code base. Rename it for grunt. BUG=b:71902053 BRANCH=none TEST=make BOARD=grunt -j10 Change-Id: I73a6bff4f113f5c49e70fde6d1f4667b8324a6d8 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/896401 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ppc: Add Vconn and CC polarity settings.Aseda Aboagye2018-02-025-8/+120
| | | | | | | | | | | | | | | BUG=b:72292985 BRANCH=None TEST=Flash meowth; Verify with twinkie that Vconn is provided for a sink that requires it. Change-Id: I8168d2e4c46e04810dcf5c2898b2c337424eefec Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/888224 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cleanup: Removing unnecessary CONFIG_USB_PD_DISCHARGE defineJett Rink2018-02-0213-13/+0
| | | | | | | | | | | | | | CONFIG_USB_PD_DISCHARGE is now defined automatically if you specify one of the specified options such as CONFIG_USB_PD_DISCHARGE_TCPC BRANCH=none BUG=none TEST=grunt still discharges using PPC Change-Id: I94086cfc58bebce9c62ad6aa52b7740b25276d89 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/894676 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* poppy / soraka: Decrease input current limit to prevent OCShawn Nematbakhsh2018-02-021-2/+10
| | | | | | | | | | | | | | | | | | | | | | | Based on measurements, Soraka can pull more current than desired. Decrease the programmed current limit by an additional factor, determined by taking the worst-case power measurements across several different Soraka devices, to ensure that Soraka never pulls more current than desired. BRANCH=None BUG=b:67944740 TEST=Verify with `charger` that input current limit becomes 472mA when a 5V / 500mA charger is plugged, and 2896mA when a 5V / 3000mA charger is plugged. Change-Id: I2b2cb6f445533476d173cd7f5fb825d8b11d1405 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/890102 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Benson Leung <bleung@google.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* motion_sense: Check presence of {set,get}_{range,offset}Alexandru M Stan2018-02-021-0/+4
| | | | | | | | | | | | | | | Prevents a null pointer dereference when the AP asks the EC for nonexistent settings of a sensor. BUG=chromium:761758 TEST="ectool motionsense offset ${ID of baro_bmp280 sensor}" And see no null pointer dereference, but an invalid command error BRANCH=master Change-Id: I3050feaa3c9752abebc30237dac1befa4e5775cc Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/850639 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* isl923x: Don't initialize ICL on sysjump.Aseda Aboagye2018-02-021-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ISL923x init function would initialize the charger's input current to the board's defined default. For some boards like meowth and zoombini, the default input current was set quite low, 128mA. When sysjumping, all HOOK_INITs are called again and therefore the input current limit would be reset even thought it would have been set correctly prior to jumping. Setting the current limit so low, without a battery, would cause a power failure and the PMIC would drop its power OK signal and go into emergency shutdown. This commit simply adds a check to whether the EC jumped to this image. If it has, the charger input current limit is left unchanged. It will be updated to the correct value by charge manager later on after determine the attached charge supplier. BUG=b:72129338 BRANCH=None TEST=Flash meowth; Boot to S0 without a battery; Verify that PMIC_DPWROK remains high. TEST=Repeat above test for zoombini. Change-Id: I7e5bbbbf3ec604c876cc4fa0163f8bb7feff4cc9 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/896960 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Caveh Jalali <caveh@google.com>
* cleanup: Correcting VBUS discharge commentJett Rink2018-02-021-1/+2
| | | | | | | | | | | BRANCH=none BUG=none TEST=none Change-Id: I0e7f21bd56a796d2261ffafa26f603924ac0d66d Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/896395 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
View Lorry Controller Status