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* Clear OWNERS for factory/firmware branchfirmware-glados-7820.315.BBrian Norris2021-09-102-10/+1
| | | | | | | | | | | | BUG=none TEST=none Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155176 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Owners-Override: Jora Jacobi <jora@google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* stm32f0: i2c: Fix dropped Rx byte in TCPCI slave modeShawn Nematbakhsh2019-03-071-5/+5
| | | | | | | | | | | | | | | | | | | | | | | If the i2c master sends a stop condition before we've buffered the last Rx byte (eg. due to higher than normal i2c interrupt latency) then we don't want to drop the last byte on the floor, it's still meaningful. BUG=b:65711378 BRANCH=glados TEST=Spam TCPC_REG_ROLE_CTRL commands from caroline to caroline_pd, verify no errors are observed on either side for 12,000,000 transactions. Change-Id: I0c4a81d97315cff553a5448c0940746e1ef0ed2c Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/772698 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> (cherry picked from commit 20baa933615fa6942005953e1e0ea3a3b16bbd5f) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1506412 Reviewed-by: Scott Collyer <scollyer@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Trybot-Ready: Scott Collyer <scollyer@chromium.org>
* chell: CTLV085A/PP850_PRIM_CORE change VR mode based on power state.Todd Broch2018-03-141-3/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | Change this VR power mode to: - PWM by default & S0 for stability. - PFM in suspend for power savings. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=glados BUG=b:72921038 TEST=manual, Boot problematic device with AC plugged and no longer see reboot at login screen. Change-Id: I25addfd473675d6d0de441286c4c4bdffcc2118c Reviewed-on: https://chromium-review.googlesource.com/943403 Reviewed-by: Yomyung Leem <yungleem@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> (cherry picked from commit f94850c8e244cb6eafb92c2b73347e4a014e06ab) Reviewed-on: https://chromium-review.googlesource.com/961307 Reviewed-by: YH Lin <yueherngl@chromium.org> Commit-Queue: YH Lin <yueherngl@chromium.org> Tested-by: YH Lin <yueherngl@chromium.org>
* motion_lid: no angle correction when lid closephilipchen2017-06-062-2/+19
| | | | | | | | | | | | | | | | | | | | | | | | | BUG=b:36107214 BRANCH=gru TEST=manually on kevin: (1) make DUT in tablet mode (2) swiftly close the lid (3) check ec log and confirm DUT can read small angle and turn into clamshell mode when lid is closed. TEST=make runtests Change-Id: I7ebf10d38a8b300960ebf46be717d48522c6fd0b Reviewed-on: https://chromium-review.googlesource.com/455458 Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 75ba9147c392367037c21e79899f463c32c1f92f) Reviewed-on: https://chromium-review.googlesource.com/457137 Commit-Ready: Philip Chen <philipchen@chromium.org> (cherry picked from commit 7814f3319e7331ae9f3313d2a04e14b0bc1f1a90) Reviewed-on: https://chromium-review.googlesource.com/525897 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
* pd: ensure tighter timings for IRQ_HPD pulseVincent Palatin2017-05-3013-169/+247
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to ensure we are always meeting the deadlines for the IRQ_HPD pulse, increase the priority of the processing by moving the rising edge from the low-priority HOOK task (in a deferred function) to the caller task (which is the high-priority PD task). The downside is we are now sleeping in the PD task blocking the processing of the PD messages during this time. Changed HPD_DSTREAM_DEBOUNCE_IRQ to 500us instead of 750us. According to DP spec, the IRQ_HPD pulse width is between 500us and 1000us. Ensure there is a minimum of 2ms delay in between each IRQ_HPD as specified by the DP spec, by sleeping before sending the next pulse if needed. (in practice, this should not wait if we are not too off processing the messages) Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/508629 Reviewed-by: Todd Broch <tbroch@chromium.org> (cherry picked from commit 03a665939f8adef0f8fd5a170f859210f65d2c54) Updated with all GLaDOS derivatives. BUG=chromium:711334 BRANCH=glados strago reef oak TEST=manual, on SKL platform with kernel 3.18 and MST, verify display is functional on USB-C dock. Change-Id: Iba1fbc8b4a6ec26daf49c19a6aa8af275a59c221 Reviewed-on: https://chromium-review.googlesource.com/477414 Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* common: sensors: add extra sensor attributesNick Vaccaro2017-05-1822-19/+171
| | | | | | | | | | | | | | | | | | | | Adds min_frequency and max_frequency to struct motion_sensor_t. New attributes min_frequency and max_frequency are now returned in ectool's MOTIONSENSE_CMD_INFO response. Incremented ectool's MOTIONSENSE_CMD_INFO version to version 3. Add constants for MIN_FREQUENCY and MAX_FREQUENCY to each sensor's header file. BRANCH=firmware-glados-7820.B BUG=chromium:615059 TEST=build/boot and verify MOTIONSENSE_CMD_INFO response on caroline Change-Id: I66db9715c122ef6bb4665ad5d086a9ecc9c7c93a Signed-off-by: Nick Vaccaro <nvaccaro@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/486102 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* cave: disable CONFIG_CMD_ACCEL to reduce bin sizeNick Vaccaro2017-05-181-3/+0
| | | | | | | | | | | | | | Cave ran out of room with upcoming change, disabled CONFIG_CMD_ACCEL and CONFIG_CMD_ACCEL_FIFO to free up the needed space and keep build from breaking. BRANCH=firmware-glados-7820.B BUG=chromium:615059 TEST=verified cave target build doesn't break Change-Id: I48f77920f8bf919c72c8c055a01d771795ac4ddf Signed-off-by: Nick Vaccaro <nvaccaro@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/487302 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* pd: Ignore Augmented PDOs when choosing PDO to request.Todd Broch2017-05-182-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Augmented PDOs are part of the PD3.0 specification. As present USB PD sinks can't support these PDO types we need to ignore them. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus,glados,oak,gru,reef BUG=b:37476637 TEST=manual, On samus, plug-in blackcat (EVT) charger and see it ignore these Augmented PDOs when making its PDO request. Original-Change-Id: I28a0377e1486368f25f37cad640af71244a4c30b Originally-Reviewed-on: https://chromium-review.googlesource.com/484687 Commit-Ready: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> (cherry picked from commit 49c776b5b78462ae2118fca240f7fb5df7dc444c) Change-Id: I791e43ef8b42941f5bb64429b98812904fc3c7d8 Reviewed-on: https://chromium-review.googlesource.com/506663 Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org>
* pd: prefer CD pin assignments over EF for USBC->USBC case.Todd Broch2017-05-181-5/+8
| | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus,glados,oak,gru,reef BUG=chromium:694597 TEST=manual, connect samus to USB-C monitor via cable and see it select pin assigmnent 'C' Original-Change-Id: Iddad5b654715bd30ba081c62f8fb53e07816498c Originally-Reviewed-on: https://chromium-review.googlesource.com/465379 Commit-Ready: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> (cherry picked from commit a8e6b070cbd107d8c2f44f44ae8231a4f4efea90) Change-Id: Ica21c46619023468d93ab7faca6284680c858005 Reviewed-on: https://chromium-review.googlesource.com/506662 Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org>
* Re-enable Google USBC peripheral FW updates.Todd Broch2017-05-188-8/+120
| | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=glados,gru,oak BUG=chrome-os-partner:57458 TEST=usbpd_GFU Original-Change-Id: I5a6bfde742a5c698680f99f342b1696084fd002a Originally-Reviewed-on: https://chromium-review.googlesource.com/397862 Commit-Ready: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Benson Leung <bleung@google.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> (cherry picked from commit 35e580b7a9d0dedbb2664dbfd694ab5bd3a87226) Change-Id: I41c8b453daa755d00287933f98b6f8dad129655c Reviewed-on: https://chromium-review.googlesource.com/506661 Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org>
* caroline: enable VBUS dischargeVincent Palatin2017-05-172-0/+3
| | | | | | | | | | | | | | | | | | | Enable the voltage discharge circuit on VBUS in order to be sure to reach in time the required voltage level during a power swap. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=glados BUG=none TEST=manual, connect to Lenovo Thinkpad USB-C and see we are repeatedly becoming a Sink rather than something staying stuck in the power swap. Change-Id: I9e6a7a6c9e6dc63eae285a90c541fa0138f7b130 Reviewed-on: https://chromium-review.googlesource.com/506149 Tested-by: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* glados & friends: remove typec console command to save flash space.Todd Broch2017-05-177-0/+7
| | | | | | | | | | | | | | Signed-off-by: Todd Broch <tbroch@chromium.org> BUG=none TEST=all boards compile successfully Change-Id: I58f01919b0d6e61f9ce45af680b74879d0bd06c4 Reviewed-on: https://chromium-review.googlesource.com/506660 Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Lars/Lili: use 15V / 3A instead of 20V / 2.25ARyan Zhang2017-05-021-0/+1
| | | | | | | | | | | | | | | | | | Lars + Lars Adapter => 20V / 2.25A Lars + Lili Adapter => 15V / 3A Lili + Lili Adapter => 15V / 3A Lili + Lars Adapter => 20V / 2.25A BUG=b:37729690 BRANCH=firmware-glados-7820.B TEST=`make -j BOARD=lars`, Signed-off-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Change-Id: I61e9b3f4f4e844dea3b672a7784ffcd979ae84a7 Reviewed-on: https://chromium-review.googlesource.com/489222 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Tested-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
* Caroline: cut-off the battery when the level is criticalYB.Ha2017-04-272-1/+3
| | | | | | | | | | | | | | | | | Cut-off the battery (ie disconnect its discharge FET) when it is reaching a critical level, so it keeps the remaining charge longer. BRANCH=firmware-glados-7820.B BUG=b:35581255 TEST=emerge-caroline chromeos-ec Signed-off-by: yb.ha <ybha@samsung.com> Change-Id: I508a547bbcefb74b127ab03d8dae46723a507b09 Reviewed-on: https://chromium-review.googlesource.com/484160 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com> Tested-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
* lars: Save panic data before PMIC triggered reset.Aseda Aboagye2017-04-171-0/+7
| | | | | | | | | | | | | | | BUG=b:35585589 BRANCH=glados TEST=enter 'crash divzero'; verify panic data is present on reboot via 'panicinfo'. Additionally, eventlog indicates an EC event of "panic reset". Change-Id: I7f8a419089be651328a6e04652353f653e314a58 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/479682 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* mec1322: Only restore panic data when saved.Aseda Aboagye2017-04-171-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CL:430577 introduced a panic data backup/restore facility since apparently the ROM uses the top 8KB of memory during ROM execution. However, the little firmware loader was unconditionally restoring the panic data when loading an RO image. This caused an issue when attempting to sysjump from RW to RO. The "restore" operation would destroy the sysjump tag data and caused the EC to fail to recognize the sysjump. This commit changes the LFW to only restore the panic data under resets where the panic data would have been backed up. These include: - Soft Reset - Hard Reset - Watchdog Reset - VCC1 Reset BUG=b:37011065 BRANCH=glados TEST=Apply a CL which adds panic data back up to lars. sysjump between RO and RW and back to RO. Verify that all sysjumps are recognized. Verify that keyboard continues to function post sysjump. TEST=Cause a panic by 'crash' command. Verify that panic data is still present after reset. Change-Id: I6e50f4923dac849a84095ac9e24810eb054e4394 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/479681 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* pbody: add pwm kblight controlbolan.wang2017-03-163-2/+23
| | | | | | | | | | | | | | | | | | For DVT, KB backlight pin is connected with EC, and controlled by driver to adjust duty cycle for requirement in different situations. BUG=none BRANCH=firmware-glados-7820.B TEST=build and burn on pbody run "ectool pwmsetkblight (percent)/pwmgetkblight" test the PWM backlight function Signed-off-by:bolan.wang <bolan.wang@bitland.com.cn> Change-Id: Id0d7a250093bcae6a510d90f41c7e185b1bca0ee Reviewed-on: https://chromium-review.googlesource.com/452279 Commit-Queue: Vanillan Wang <bolan.wang@bitland.corp-partner.google.com> Tested-by: Vanillan Wang <bolan.wang@bitland.corp-partner.google.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* pbody:enable/disable trackpad interruptbolan.wang2017-03-092-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the hardware changes, modify the gpio TRACKPAD_INT_DISABLE configuration. This change disables the keyboard and the trackpad when the lid goes beyond 180 degree. Keyboard and touchpad are also enabled/disabled by the tablet switch. When the lid reaches 360 position, keyboard and touchpad are disabled. And they stay disabled as long as the lid stays at 360 position. This prevents keyboard and touchpad from turning on by the (faulty) lid angle calculation. And enable/Dislable keyboard and touchpad is required to prevent EC from waking up the system from S3 in tablet mode. BUG=none BRANCH=firmware-glados-7820.B TEST=build and burn on pbody 1.Keyboard and trackpad are disabled when the lid goes beyond 180 and re-enabled when it's smaller than 180. 2. Keyboard and trackpad are disabled in tablet mode and the system doesn't wake up by a keypress. Change-Id: Id8c2026eba182fa87fbd417b204a1658117b43cc Reviewed-on: https://chromium-review.googlesource.com/449596 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Vanillan Wang <bolan.wang@bitland.corp-partner.google.com> Tested-by: Vanillan Wang <bolan.wang@bitland.corp-partner.google.com>
* pbody: remove commands and undef CONFIGs for save spacebolan.wang2017-03-071-0/+3
| | | | | | | | | | | | | | | | Remove EC console`hibdelay'and`hibernate` command undef CONFIG_TASK_PROFILING BUG=none BRANCH=firmware-glados-7820.B TEST=build and burn on pbody Signed-off-by:bolan.wang <bolan.wang@bitland.com.cn> Change-Id: I02d2e208c745c98ece3bbe5bdd37546f57644186 Reviewed-on: https://chromium-review.googlesource.com/448298 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Vanillan Wang <bolan.wang@bitland.corp-partner.google.com> Tested-by: Vanillan Wang <bolan.wang@bitland.corp-partner.google.com>
* pbody: pmic:enable 100 ohm discharge on V1.00Abolan.wang2017-03-061-0/+3
| | | | | | | | | | | | | | | BUG=none BRANCH=firmware-glados-7820.B TEST=build and burn on pbody during power down, verify that V1.00A goes to 0V faster than with no discharge. Signed-off-by:bolan.wang <bolan.wang@bitland.com.cn> Change-Id: Ifac8a3bbe972aa9db62da05b74e021c78a09c09a Reviewed-on: https://chromium-review.googlesource.com/449595 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Vanillan Wang <bolan.wang@bitland.corp-partner.google.com> Tested-by: Vanillan Wang <bolan.wang@bitland.corp-partner.google.com>
* pbody:disable PP3300_DX_TRACKPAD in S3bolan.wang2017-03-021-2/+2
| | | | | | | | | | | | | | | | | | when enter S3, set ENABLE_TOUCHPAD low to reset, then return S0, set ENABLE_TOUCHPAD to high. BUG=b:35647991 BRANCH=firmware-glados-7820.B TEST=build and burn on pbody 1. enter S3,run "gpioget" on EC console, check ENABLE_TOUCHPAD is low. 2. return to S0, ENABLE_TOUCHPAD is high now, and keyboard can be used. Signed-off-by:bolan.wang <bolan.wang@bitland.com.cn> Change-Id: Ifd707a91196b0c5a922f23653b0a70d7f77dab70 Reviewed-on: https://chromium-review.googlesource.com/447383 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Vanillan Wang <bolan.wang@bitland.corp-partner.google.com> Tested-by: Vanillan Wang <bolan.wang@bitland.corp-partner.google.com>
* pbody:Delay disable of V0.85A on PMICbolan.wang2017-02-281-0/+32
| | | | | | | | | | | | | | | | | | | Various voltage rails will be enabled / disabled by the PMIC when GPIO_PMIC_SLP_SUS_L changes. Delay the disable of V0.85A by approximately 50ms in order to allow V1.00A to sufficiently discharge first. BUG=none BRANCH=firmware-glados-7820.B TEST=build and burn on pbody,hardware measurement. verify V1.00A discharges faster than V0.85A when power down. Signed-off-by:bolan.wang <bolan.wang@bitland.com.cn> Change-Id: I1aa75557acfbf6e081c38598ae6efc59623e6cbb Reviewed-on: https://chromium-review.googlesource.com/446282 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: wang vanillan <bolan.wang@bitland.com.cn> Tested-by: wang vanillan <bolan.wang@bitland.com.cn>
* driver: kionix: Increase init delay to 20msGwendal Grignou2017-02-231-1/+1
| | | | | | | | | | | | | | | | | | | | Port changes cl/289037 to generic kionix driver. Form cl/289037 Sometimes the accelerometer doesn't initialize nicely. Increase the timeout to 20ms. BUG=chrome-os-partner:39269,chrome-os-partner:63146 TEST=buildall BRANCH=veyron,cave Change-Id: I4e4d8951fc821b8b33daa53e6c3b8da5ffa7acde Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/446132 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 11c00e1a4116bb0ac387c0264053e66e41a5ec92) Reviewed-on: https://chromium-review.googlesource.com/446698
* driver: kionix: Forgive i2c read failures while the acc is resettingGwendal Grignou2017-02-221-5/+0
| | | | | | | | | | | | | | | | | | | | | Port changes cl/288874 to generic kionix driver. From cl/288874: After we write SRST in CTRL2, there seems to be a period of time where the accelerometer doesn't respond to i2c commmands. Instead of failing the init just consider it as part of the timeout period. BUG=chrome-os-partner:39269,chrome-os-partner:63146 TEST=make -j buildall BRANCH=veyron,cave Change-Id: I2197aa7741d1482b76c7c07b0cb0c171aab86a59 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/445973 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 4a34b0d88f6b0075ee66a18f4aa22325dc766eb6) Reviewed-on: https://chromium-review.googlesource.com/446014
* pbody: call panic backup function before system resetbolan.wang2017-02-161-0/+7
| | | | | | | | | | | | | | | | | | To avoid PANIC_DATA_PTR be corrupted during system reboot, we need to copy the panic data to the panic_backup. BUG=none BRANCH=firmware-glados-7820.B TEST=build and burn on pbody, use the following steps: 1. On EC console, use command "crash assert/divzero/stack/unaligned" 2. Eventlog have log "EC Event | Panic Reset in previous boot" Signed-off-by:bolan.wang <bolan.wang@bitland.com.cn> Change-Id: I93cab8c1db2af7e5771163d5520fc547a88badf6 Reviewed-on: https://chromium-review.googlesource.com/443006 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: wang vanillan <bolan.wang@bitland.com.cn> Tested-by: wang vanillan <bolan.wang@bitland.com.cn>
* pbody: Add board support for asserting RTCRSTbolan.wang2017-02-153-1/+13
| | | | | | | | | | | | | | | | | | Enable CONFIG_BOARD_HAS_RTC_RESET and add a board_rtc_reset() function to assert RTCRST to the PCH. It will be called if the board fails to sequence out of the S5 state. BUG=none BRANCH=firmware-glados-7820.B TEST=manually tested on pbody Signed-off-by:bolan.wang <bolan.wang@bitland.com.cn> Change-Id: I6d7740473e446617f1428e0a44414165641d102a Reviewed-on: https://chromium-review.googlesource.com/442385 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: wang vanillan <bolan.wang@bitland.com.cn> Tested-by: wang vanillan <bolan.wang@bitland.com.cn>
* caroline: Add CONFIG_HOSTCMD_ALIGNED for RAM savingsShawn Nematbakhsh2017-02-131-0/+1
| | | | | | | | | | | | | | This CONFIG has been added for other MP boards on this branch and has been sufficiently tested. BUG=chrome-os-partner:62860 BRANCH=glados TEST=`make buildall -j` Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ia9d55f76f3d0fd68167105fc3bf55937d50920d7 Reviewed-on: https://chromium-review.googlesource.com/442007 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Cave/Glados: call panic backup function before system resetZhuo-hao Lee2017-02-102-0/+14
| | | | | | | | | | | | | | | | | | | To avoid PANIC_DATA_PTR be corrupted during system reboot, we need to copy the panic data to the panic_backup. BUG=chrome-os-partner:61241 BRANCH=firmware-glados-7820.B TEST=on Cave/Glados, use the follow step: 1. use command "crash assert/divzero/stack/unaligned" 2. on next boot, check (i). EC console print out "Reset cause: ... panic" (ii). eventlog have log "EC Event | Panic Reset in previous boot" 3. on next normal reboot or EC reboot, check no 2(i)/2(ii) log Change-Id: I77d6e5759e098b7e361c918a293bf678b8df7549 Signed-off-by: Zhuo-hao Lee <zhuo-hao.lee@intel.com> Reviewed-on: https://chromium-review.googlesource.com/430578 Reviewed-by: Shawn N <shawnn@chromium.org>
* mec1322: add panic backup/restore function for the panic dataZhuo-hao Lee2017-02-104-0/+66
| | | | | | | | | | | | | | | | From spec, the ROM will use top 8KB memory during ROM execution. To avoid PANIC_DATA_PTR be corrupted, we need to copy it to the backup address and restore it at very early stage (RO little fw). BUG=chrome-os-partner:61241 BRANCH=firmware-glados-7820.B TEST=On EC console, use use command "crash assert" check the panic data is restored from backup address Change-Id: I48fa7714295086abbca34139d6fb0f9c8daa3a93 Signed-off-by: Zhuo-hao Lee <zhuo-hao.lee@intel.com> Reviewed-on: https://chromium-review.googlesource.com/430577 Reviewed-by: Shawn N <shawnn@chromium.org>
* pbody: modify unuseful gpio settingbolan.wang2017-02-062-14/+3
| | | | | | | | | | | | | | | | these gpio are not connected with ec any more. BUG=none BRANCH=firmware-glados-7820.B TEST=build and burn on the pbody board. Keyboard function and backlight are still normal. Signed-off-by: bolan.wang <bolan.wang@bitland.com.cn> Change-Id: I0fefb4a79a90e8a6756bb62944245719e2c5b533 Reviewed-on: https://chromium-review.googlesource.com/438064 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: wang vanillan <bolan.wang@bitland.com.cn> Tested-by: wang vanillan <bolan.wang@bitland.com.cn>
* caroline: Blink LED red on critical batteryShawn Nematbakhsh2017-01-291-9/+13
| | | | | | | | | | | | | | BUG=chrome-os-partner:58657, chrome-os-partner:62446 TEST=Deplete battery to 0% state of charge, attach charger, verify LED blinks red until 1% state of charge is reached. Remove battery, set force_locked, verify AP doesn't boot and red LED flashes. BRANCH=glados Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ibefcf06373fa00b6093df86b37e32cc58467d812 Reviewed-on: https://chromium-review.googlesource.com/434181 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* caroline: Unify vbus_evt ISRs for code size savingsShawn Nematbakhsh2017-01-292-11/+6
| | | | | | | | | | | | | BUG=chrome-os-partner:58657 TEST=Verify __hey_flash_used reduced by 64 bytes and subsequent CL passes compilation. BRANCH=glados Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I984eb1da4606b677141a326a17b23d2d349f57ab Reviewed-on: https://chromium-review.googlesource.com/434180 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* tcpm: enable pd message passing after hard resetDivya Sasidharan2017-01-281-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | On ANX port connecting hoho and issuing hard reset never recovered. From TCPCI spec R1.0.4.7.2 "TCPM writes to the RECEIVE_DETECT register to enable PD message passing". This was missing when the port sent HARD RESET when it acts as SRC. BRANCH=none BUG=chrome-os-partner:61377 TEST= On Electro, on anx port, connect hoho and issuing pd 0 hard successfully recovers from hard rst Change-Id: Ia2cfcaf52b88fbc24ee702c6a089389400eb42d1 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/433387 Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com> Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> (cherry picked from commit c05d723dcf1f59dc8fe4655f7d5dd16647a13216) Reviewed-on: https://chromium-review.googlesource.com/434165 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org>
* caroline: do not boot with 15W in read-only firmwareVincent Palatin2017-01-273-1/+12
| | | | | | | | | | | | | | | | | | | | | | Increase the minimum charger power to boot with the battery ensuring a minimum buffer to 25W. And add a new CONFIG_CHARGER_LIMIT_POWER_ENFORCE_RO_THRESH parameter to even forbid it to boot in RO to do the EC software-sync if this 25W threshold is not reached. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=glados BUG=chrome-os-partner:58657 TEST=Discharge caroline battery down to 5400mV. Plug AC and try repeatedly to boot the system. See it won't boot until battery state of charge is 1%. Change-Id: I0ff0dc9bced1eb9309f13b35943ffb675aebafae Reviewed-on: https://chromium-review.googlesource.com/433760 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* caroline: limit battery charge voltage to 8656 mVVincent Palatin2017-01-262-1/+6
| | | | | | | | | | | | | | | | | Limit the battery charge voltage to a lower value, in order to prevent battery over-charge due to regulation inaccuracy. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=glados BUG=chrome-os-partner:62187 TEST=manual, on one Caroline, verify the system charges to 100%. Change-Id: I759def25dd35ad1c0ec30e133ab9af55ba4dcb0a Reviewed-on: https://chromium-review.googlesource.com/432418 Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* mec1322: slightly decrease I2C code sizeVincent Palatin2017-01-261-6/+10
| | | | | | | | | | | | | | | | | re-wrote timing initialization to save 56 bytes. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=glados BUG=chrome-os-partner:62187 TEST=make BOARD=caroline with the following CL increasing size. battery readings still work. Change-Id: Ifb6a14deb9baf50d473ff624c70f410eee5d4677 Reviewed-on: https://chromium-review.googlesource.com/432417 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* asuka/pbody: adding CONFIG_USB_PD_COMM_LOCKEDYH Lin2017-01-242-6/+2
| | | | | | | | | | | | | BUG=chrome-os-partner:62331 BRANCH=firmware-glados-7820.B TEST=None Change-Id: I93900fcf4fc393c875b906b596db7a73342c5eed Reviewed-on: https://chromium-review.googlesource.com/431903 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: YH Lin <yueherngl@chromium.org> Tested-by: YH Lin <yueherngl@chromium.org> Trybot-Ready: YH Lin <yueherngl@chromium.org>
* test: Fix motion_lid unit test.Aseda Aboagye2017-01-201-3/+39
| | | | | | | | | | | | | | | | My recent motion lid reliability changes failed to account for the motion lid unit test. This commit fixes the test and adds a few cases. BUG=None BRANCH=glados TEST=make -j runtests Change-Id: If7dd914c46ef3a4be029773d7541848ebcfdcf6c Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/430960 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alexandru Stan <amstan@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* common: Fully use shared memory by removing CONFIG_SHARED_MEM_MIN_SIZEZhuo-hao Lee2017-01-201-1/+8
| | | | | | | | | | | | | | | | | Remove CONFIG_SHARED_MEM_MIN_SIZE from CHUCK_SIZE to let hash function can fully use the shared memory. And add an ASSERT for runtime checking the shared memory size in RW part which can make sure the minimum requirement for hash performance is satisfied. BUG=chrome-os-partner:61241 BRANCH=firmware-glados-7820.B TEST=force the share memory to smaller than CONFIG_SHARED_MEM_MIN_SIZE, check the value of hash data is collect. Change-Id: Ia14970981d2d17e3b737f51c122cd64a975acbd4 Signed-off-by: Zhuo-hao Lee <zhuo-hao.lee@intel.com> Reviewed-on: https://chromium-review.googlesource.com/427602 Reviewed-by: Shawn N <shawnn@chromium.org>
* common: update the precalculate value for jump data + panic dataZhuo-hao Lee2017-01-202-16/+24
| | | | | | | | | | | | | | The precalculate value of the jump data + panic data is incorrect. By now, jump data for RO is 24bytes, panic data is 116 bytes. BUG=chrome-os-partner:61241 BRANCH=firmware-glados-7820.B TEST=Print out sizeof(struct panic_data) and sizeof(struct jump_data) Change-Id: I9c47184a5d3721eb615201407ed528f65a92005e Signed-off-by: Zhuo-hao Lee <zhuo-hao.lee@intel.com> Reviewed-on: https://chromium-review.googlesource.com/427601 Reviewed-by: Shawn N <shawnn@chromium.org>
* CHERRY-PICK: motion_lid: Add more reliability measurements.Aseda Aboagye2017-01-191-19/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously in motion lid, we only considered the lid angle as unreliable when the hinge is too closely aligned with the direction of gravity. However, there are other cases where the lid angle can be unreliable. For example, when the device is being shaken and is under acceleration that's not solely due to gravity. This commit adds some more checks for a reliable lid angle measurement. - Checking if the device is significant motion by checking the deviation of the magnitudes of the base and lid vectors. - Making sure that the calculated angles agree with the current state of the lid switch. BUG=chrome-os-partner:59480 BUG=chrome-os-partner:59203 BUG=chrome-os-partner:58518 BRANCH=gru,cyan,glados,oak TEST=Flash caroline; use ectool motionsense lid_angle and monitor the instantaneous lid angle. Verify that unreliable is reported for cases where the device is under significant motion. Change-Id: I4bd9e818e617b056364cce2e46385e743a7522d4 Reviewed-on: https://chromium-review.googlesource.com/415443 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Alexandru Stan <amstan@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit c4e76fba394ced28e465111658b4c57ef6e1b8ef) Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/429876 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* caroline: Remove `hibdelay` console command.Aseda Aboagye2017-01-191-0/+1
| | | | | | | | | | | | | | | | | | | | | The hibernation delay can still be set from userspace using ectool, and if a user wants to hibernate, they can do by using the 'hibernate' command. BUG=None BRANCH=glados TEST=#undef CONFIG_CMD_HIBDELAY for caroline, verify that `hibdelay` console command is no longer present on the EC console. Change-Id: Ia033b6226effaf94697b327544325284d9453b08 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/429875 Trybot-Ready: Alexandru Stan <amstan@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Alexandru Stan <amstan@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Alexandru Stan <amstan@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* hibernate: Add defines for hibernate commands.Aseda Aboagye2017-01-193-0/+6
| | | | | | | | | | | | | | | | | | | | | This commit just adds some defines for the two hibernate commands: `hibdelay' and `hibernate`. This way, they can be removed from the image to save some space. BUG=None BRANCH=master,glados,gru,reef,oak TEST=#undef CONFIG_CMD_HIBDELAY on caroline, and verify that command is missing from the EC console. Change-Id: I2c707397ec1ed0f25480ee691b79107129c50556 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/429874 Trybot-Ready: Alexandru Stan <amstan@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Alexandru Stan <amstan@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Alexandru Stan <amstan@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* pbody:increment the stack size of HOSTCMD taskbolan.wang2017-01-132-1/+7
| | | | | | | | | | | | | | | | | | | | The stack size of HOSTCMD task maybe too small, sometime cause stack overflow and system reboot. Define the CONFIG_REPLACE_LOADER_WITH_BSS_SLOW for more ram space and set the stack size of HOSTCMD to LARGER_TASK_STACK_SIZE. BUG=none BRANCH=firmware-glados-7820.B TEST=build and burn the board check the random reboot issue is not occur. Signed-off-by:bolan.wang <bolan.wang@bitland.com.cn> Change-Id: I8aaf55f56ee03547d9659e513687aa19a57572a6 Reviewed-on: https://chromium-review.googlesource.com/424654 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: wang vanillan <bolan.wang@bitland.com.cn> Tested-by: wang vanillan <bolan.wang@bitland.com.cn>
* core: Fix bug will cause tasks sleep forever by mutex_unlock in task.c.Mulin Chao2017-01-062-10/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If there's a task switching occurred between loading waiter and unlocking the lock, the task with higher priority won't wake up since the local variable, waiter, doesn't contain its ID bit before task switching. In this situation, the higher priority task only can be awakened when the other tasks execute mutex_unlock() again. But consider the following conditions: (For example, the driver of charger bd9995x.) 1. There are more than one mutex for the usage path of i2c port. 2. There are more than one task access this usage path of i2c port and one of these tasks, task A, met the situation above. 3. The other tasks have no chance to execute mutex_unlock() of i2c since the task A still occupied the mutex of charger. All the tasks used the same i2c port or the other hardware will sleep forever. This CL makes loading waiter and unlocking the lock as atomic to solve this issue. BRANCH=none BUG=chrome-os-partner:60617 TEST=make BOARD=snappy; make BOARD=oak; Executed charger factory test on 4 units of snappy for 3 days and no symptom occurred. Change-Id: Id976fc47955b33ca83bb2182b197d9f2781c341b Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/423285 Commit-Ready: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 266b36d54b00de514030b76364cf94977bf02cd0) Reviewed-on: https://chromium-review.googlesource.com/425583 Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: BoChao Jhan <james_chao@asus.com> Tested-by: BoChao Jhan <james_chao@asus.com>
* Caroline: Notify when Tablet / Notebook mode changeYB.Ha2017-01-062-0/+8
| | | | | | | | | | | | | | | - Notify mode of system BRANCH=firmware-glados-7820.B BUG=chrome-os-partner:58827 TEST=emerge-caroline chromeos-ec Signed-off-by: yb.ha <ybha@samsung.com> Change-Id: I17ea10c5127dc114775978fdbfedced17a1b2744 Reviewed-on: https://chromium-review.googlesource.com/425004 Tested-by: shkim <sh_.kim@samsung.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: YongBeum Ha <ybha@samsung.com>
* Cave: increment the stack size of HOSTCMD taskjames_chao2016-12-202-1/+7
| | | | | | | | | | | | | | | | | The stack size of HOSTCMD task maybe too small, sometime cause stack overflow and system reboot. Define the CONFIG_REPLACE_LOADER_WITH_BSS_SLOW for more ram space and set the stack size of HOSTCMD to LARGER_TASK_STACK_SIZE BUG=chrome-os-partner:60689 BRANCH=glados TEST=check the random reboot issue not occur Change-Id: I44263c27ba39901598d154ced330a34da58a9747 Signed-off-by: james_chao <james_chao@asus.com> Reviewed-on: https://chromium-review.googlesource.com/422590 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* pbody: add CONFIG_DPTF_DEVICE_ORIENTATIONbolan.wang2016-12-201-0/+1
| | | | | | | | | | | | | | | BUG=none BRANCH=firmware-glados-7820.B TEST=build and burn the board. DPTF can be notify when mode changes. Signed-off-by:bolan.wang <bolan.wang@bitland.com.cn> Change-Id: I25c1785c184eaab9a12c14afc4af89ecb5eb6966 Reviewed-on: https://chromium-review.googlesource.com/421155 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: wang vanillan <bolan.wang@bitland.com.cn> Tested-by: wang vanillan <bolan.wang@bitland.com.cn>
* pbody: remove V1.8A Control force PWMbolan.wang2016-12-181-6/+0
| | | | | | | | | | | | | | | | | | | | we change layout, hardware solved this issue; this patch is no longer needed. BUG=chrome-os-partner:59048 BRANCH=firmware-glados-7820.B TEST=build and burn on the board. 1.run "apshutdown" in EC console,abnormal power state disappeared. 2.verified EVT2 motherboard without Force PWM patch,there’re no apshutdown issue exist, and our power engineer also can’t measure overshoot in 1.8A voltage. Signed-off-by: bolan.wang@bitland.com.cn Change-Id: Id95c1cbdfae2d6f415621448c15d0af3028a05d7 Reviewed-on: https://chromium-review.googlesource.com/421146 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: wang vanillan <bolan.wang@bitland.com.cn> Tested-by: wang vanillan <bolan.wang@bitland.com.cn>
* caroline: tune USB re-driverVincent Palatin2016-12-143-0/+33
| | | | | | | | | | | | | | | | | | | | | | | Adjust the USB3 on the sub-board USB-C port by tuning the PS8740 re-driver: - set the Receiver EQualization to 15.5dB. - adjust the High Speed Signal Detector threshold to -25%. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=glados BUG=chrome-os-partner:59647 TEST=dump the registers manually from the shell: $ ectool i2cxfer 1 0x10 0x1 0x3B Read bytes: 0x90 $ ectool i2cxfer 1 0x10 0x1 0x3C Read bytes: 0x80 Change-Id: I84fb365826032a5ccc7383a5a71feccec641993f Reviewed-on: https://chromium-review.googlesource.com/418759 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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