| Commit message (Collapse) | Author | Age | Files | Lines |
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The logic for popping data from the staged partition of the fifo
was incorrect. We never ended up decrementing the count.
BUG=b:135239484
BRANCH=None
TEST=Added code in motion_sense_init() to fake staging data into
the fifo. This replicated the issue, with the fix the issue was
resolved.
Change-Id: Ic4a0338131defbdfa44e1121d26ee3c5e8238b3b
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1665213
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Enrico Granata <egranata@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
(cherry picked from commit 2d21c2e419c493afe175b9cc00ccd71a5857ce29)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1876302
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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BRANCH=grunt
BUG=b:143095616
TEST=GPIO is locked as input
Change-Id: I36b123ed068db268d1cd02e990dd720663eaae57
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1873008
Reviewed-by: Keith Short <keithshort@chromium.org>
(cherry picked from commit e78c4c3c1e0839ba915e15ee2e711e4c0e5bb5d5)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1874585
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The default USB TYPE C connector facing receiver equalization
setting is 0x90, compensate for channel loss up to 15.4dB
It's high for some dongles. Apply lower USB EQ to 8.7dB
BUG=b:140472120
BRANCH=none
TEST=build and boot on, read back registers to verify
> ectool i2cread 8 2 0x16 0xe7
0x40
Signed-off-by: Lu Zhang <lu.zhang@bitland.corp-partner.google.com>
Change-Id: I1fce255d0dbe8c5a12cf8c8ff5b3c506e8d19475
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1830538
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Paul Ma <magf@bitland.corp-partner.google.com>
Tested-by: Paul Ma <magf@bitland.corp-partner.google.com>
(cherry picked from commit c469aa1bcbef30ee57f12e4f99799ca8b95d576c)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1862871
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Copied from phaser board. Add battery information for:
- SMP 5B10Q13163
- LGC 5B10Q13162
- Sunwoda 5B10S75394
BRANCH=none
BUG=b:141128721, b:138744661
TEST=builds
Signed-off-by: Lu Zhang <lu.zhang@bitland.corp-partner.google.com>
Change-Id: I761417280820904e10e78939886acdf7cdf8aa1e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1808822
Reviewed-by: Edward Hill <ecgh@chromium.org>
(cherry picked from commit e6ef834fe6ad38e8b6cf2e1c32cfc1d43c072304)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1808984
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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BUG=b:140452269
BRANCH=grunt
TEST=Test on charging/discharging/battery cut off pass.
Change-Id: Iba19c113d94ed0c88372b5bd4317b333dee6d146
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1782398
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
(cherry picked from commit 4576018f783b5645794924a562308adbe192ed6f)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1792419
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Now there are two sets of lid/base sensors in proto phase. Both of rotation
matrices need to be fixed.
BUG=b:138744661
BRANCH=none
TEST=Using ec console 'accelinfo on' verified lid angle now goes
from 0 to 360 and swtiches to tablet mode after crossing 180 threshold.
Change-Id: I93a89a878cf064071eb5f3786f4f5f5475ba2de2
Signed-off-by: lu zhang <lu.zhang@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1773032
Reviewed-by: Paul Ma <magf@bitland.corp-partner.google.com>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Paul Ma <magf@bitland.corp-partner.google.com>
(cherry picked from commit 2fdaf6623c5c73c694b0a1c1b3750b7cb1987584)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1780965
Commit-Queue: Edward Hill <ecgh@chromium.org>
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BUG=b:139686328
BRANCH=grunt
TEST=make buildall -j
Change-Id: I588874c2f4f9556137d4cc9e895c3f2f6aaa5436
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1772868
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
(cherry picked from commit a15ef31af52679f715a10589ef89b4343141dd91)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1773030
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Battery leds would be on when discharging in S0/S3. It's not
needed, so change the led behavior.
BRANCH=none
BUG=b:138744661
TEST=1. Power on the device and plug out the adapter to see if
leds are OK then.
2. Use powerd_dbus_suspend command to see leds are OK or
not.
Signed-off-by: lu.zhang <lu.zhang@bitland.corp-partner.google.com>
Change-Id: I7df285c3c8f19612ec17ac64dcae6830aa1f68a2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1763900
Reviewed-by: Edward Hill <ecgh@chromium.org>
(cherry picked from commit bfdf551cf25c51f0781d1e8e5aeb395c5213ba7c)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1768491
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Treeya use two sets of base/lid sensors, one is BMI160/KX022 which
is supported by baseboard, another is LSM6DS3TR/LIS2DWL. This patch
will enable one of them according to sku_id.
This patch also remove keyboard backlight feature from ec feature
flags according to sku_id since both Treeya and Treeya360 do not
support keyboard backlight.
BUG=b:138744661, b:137945787, b:137849739
BRANCH=none
TEST=boot treeya boards which mounted BMI160/KX022 or
LSM6DS3TR/LIS2DWL, use 'accelinfo on' to enable sensor output,
make sure that their x/y/x value are correct.
Cq-Depend: chromium:1741598, chromium:1751302
Change-Id: I213a2073c2232ef0f2f70be788f859a264e09425
Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1746006
Tested-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Martin Roth <martinroth@chromium.org>
Commit-Queue: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767535
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Merge common TCPC code into baseboard, and add choice of ANX3429 or
ANX3447 for port 0 TCPC.
Treeya uses ANX3447, all others use ANX3429.
BUG=b:138744661
BRANCH=none
TEST=build -j BOARD=treeya
Change-Id: I66f84ae50be0b5fe80479dfdc699717427e4457c
Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1751302
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
Commit-Queue: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767534
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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This patch add polling (forced mode) support for lis2dw family.
'froced mode' is a common usage model for lid accel sensor. Treeya
will support two set (BMI160/KX022 and LSM6DS3/LIS2DWL) of base/lid
sensors and both of their lid sensor should work in the same mode
(forced mode or interrupt). Since KX022 driver only support polling,
so lis2dwl also need polling support. This patch add it.
BUG=b:138768226, b:138978278
BRANCH=none
TEST=on Akemi board, build both interrupt and polling (by define
CONFIG_ACCEL_LIS2DW_AS_BASE or not) mode firmware, boot and
confirm sensors init suscess and 'accelinfo on' has correct
sensor x/y/z output.
Cq-Depend: chromium:1739026
Change-Id: Ib0dcb7b317eec51a38598a644f965d7ecc5928c6
Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1741598
Tested-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Commit-Queue: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767533
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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lis2dwl has almost the same register interface as lis2dw12.
lis2dwl only has one low power mode and when in low power mode, it
has only 12 bit resolution. In order to get 14 bit resolution, we
only use its high performance mode.
Add MOTIONSENSE_FLAG_INT_ACTIVE_HIGH flag to support both active
high and active low interrupt.
BUG=b:138768226, b:138978278
BRANCH=none
TEST=use Akemi board, add lis2dwl as accel sensor, boot the board
and make sure sensor x/y/z get correct value by 'accelinfo on'
Cq-Depend: chromium:515302
Change-Id: I37fcc0f43af3c8055079e09db00757b665813ba8
Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1739026
Tested-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: mario tesi <mario.tesi@st.com>
Commit-Queue: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767532
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Added ACC LIS2DW12 driver support.
Features included in this driver are:
- Basic Sensor Read acceleration data
- ODR and FS runtime configuration
- FIFO support with watermark interrupt events
- Shared commons function with ST MEMs devices
- Switch Low Power to High perf. mode in case
of ODR > 200 Hz
- Configure D-TAP event detection in Hardware
BUG=b:73546254
BRANCH=master
TEST=Tested on discovery_stmems target BOARD with
LIS2DW12 connected to EC i2c master bus and motion
sense task running.
To build firmware for discovery_stmems target with
LIS2DW12 sensor connected, simply uncomment
CONFIG_ACCEL_LIS2DW12 define in board.h target file
and make with target BOARD=discovery_stmems.
Commands used to test LIS2DW12 device are:
- accelinit 0 (to configure accel. device)
All basic features tested, including changing
in ODR:
- accelrate 0 10000 (set ODR to 10 Hz)
- accelrate 0 12500 (set ODR to 12.5 Hz)
- accelrate 0 25000 (set ODR to 25 Hz)
- accelrate 0 50000 (set ODR to 50 Hz)
- accelrate 0 100000 (set ODR to 100 Hz)
- accelrate 0 200000 (set ODR to 200 Hz)
- accelrate 0 400000 (set ODR to 400 Hz)
- accelrate 0 800000 (set ODR to 800 Hz)
- accelrate 0 1600000 (set ODR to 1.6 kHz)
Full Scale Range:
- accelrange 0 2 (set Full Scale Range to 2g)
- accelrange 0 4 (set Full Scale Range to 4g)
- accelrange 0 8 (set Full Scale Range to 8g)
- accelrange 0 16 (set Full Scale Range to 16g)
FIFO features and interrupt management:
- accelinfo on 1000 (motion info task with
refresh rate 1 s)
and polling data read:
- accelread 0 (to read data from accelerometer)
Change-Id: I0b9861a71e81052e7ee8eb235a1a5b2a57d4c6f5
Signed-off-by: mario tesi <mario.tesi@st.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/515302
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Paul Ma <magf@bitland.corp-partner.google.com>
Tested-by: Paul Ma <magf@bitland.corp-partner.google.com>
Commit-Queue: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767531
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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None of the existing i2c addresses in the EC code base are less than 0x08
and those addresses are reserved by the i2c and SMBus specification.
BRANCH=none
BUG=b:138156666
TEST=i2c bus scan with a smart battery doesn't "misbehave" any more and
other devices can be detected properly.
Change-Id: I561b082c4c7e3df7caaa33b6ef6ad467dabbd5a5
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1715326
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767530
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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EC code changed over to a 7-bit slave address and stored in a uint16_t
to generically be able to handle 10-bit addresses, if they are ever
needed, as well as common bit flags in the most significant bits.
This code does not use more than the 8 least significant bits but to
be EC consistent, I am making this 16 bits.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: Ic5f4b3500ae7b3c18380b188efbc37c01d58d7e9
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1714136
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767529
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767528
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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When the requester does not expect the chip information from the live
target, return the hardcoded vendor and product id.
BUG=b:128820536,b:119046668
BRANCH=None
TEST=Boot to ChromeOS
Change-Id: I74affb00951411a3483258a8db165038e7eb683f
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1617894
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Auto-Submit: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767527
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Semantics of renew field in EC_CMD_USB_PD_CHIP_INFO is changing as
follows:
0 -> Return hard-coded info for Vendor ID/Product ID and cached info for
the Firmware Version
1 -> Return the live chip info for Vendor ID/Product ID/Firmware Version
Also rename the 'renew' field to 'live' to match the new semantics.
BUG=b:128820536,b:119046668
BRANCH=None
TEST=make -j buildall; Boot to ChromeOS.
Change-Id: Ie3dd022336b0be5c9728bb0ebabef32b7a6b5d57
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1617893
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Auto-Submit: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767526
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767525
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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crbug.com/982442 requests a way for developers to enable tracing of
i2c commands when debugging. This adds a new debug feature, the
i2ctrace command, which provides that. The command is guarded by
CONFIG_I2C_DEBUG.
BUG=chromium:982442
BRANCH=none
TEST=enabled CONFIG_I2C_DEBUG on arcada_ish, made sure that command
functioned as it says on the tin
Change-Id: I9c762271237cbf131e5ef7c0f605c89af4f209fd
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699347
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767524
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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CONFIG_SMBUS is not used. Cleaning up the code by
removing this.
Added a comment to document the removal and why. This will
give a way to find the code if we ever needed to bring it back
BUG=chromium:982316
BRANCH=none
TEST=make buildall
Change-Id: I40703a95bc849538e1aee32f6f96beab811285bd
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704279
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767523
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Updated the locatechip host command by adding EMBEDDED bus type &
reserved byte print.
BUG=none
BRANCH=none
TEST=Tested on ICLRVP, able to get the USB2 & USB3 info on reserved byte
Change-Id: I1cf5ebf91d82cc3b5a290d7096464f21b17b8041
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1681033
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767522
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Calling tcpm_init will reset the Analogix USB Mux on port 0. I'm not
sure if this is the proper behavior but I lean towards that it's not
because there is a separate function, usb_mux_init, for resetting
the usb mux. Also, calling tcpm_init for the Parade does not reset
it's mux.
BUG=b:134829988
BRANCH=none
TEST=manual
HATCH (Port 0): The original and new stack was tested as follows:
1) Plug in dock
2) Depending on dock, plug in HDMI or DP
3) Plug TypeC power into dock
4) Verify projection on external monitor isn't lost
Change-Id: I88d17479f4d5810be3686cd78545cc99b0c41347
Signed-off-by: Sam Hurst <shurst@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1650728
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Sam Hurst <shurst@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767521
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Currently, tcpc_config assumes TCPCs are on I2C bus. ITE's EC has an
embedded TCPC.
This patch adds bus_type field to struct tcpc_config_t so that a TCPC
location on other type of bus can be specified.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Ieac733011700b351e6323f46070dcf46d9e1154b
Reviewed-on: https://chromium-review.googlesource.com/1640305
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767520
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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This patch updates the help message for i2cread, i2cwrite, i2cxfer
to clarify which addressing mode (7-bit or 8-bit) each command uses.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=chromium:971296
BRANCH=none
TEST=buildall
Change-Id: I757e8a1d30ad19dbc333a30a97f8049f007853d1
Reviewed-on: https://chromium-review.googlesource.com/1641600
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767519
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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This patch replaces EC_CMD_I2C_LOOKUP with EC_CMD_LOCATE_CHIP.
This is a more generic command which locates a peripheral chip in
i2c or other bus types.
Additionally, it includes the following changes:
- Change chip (device) type # of CBI_EEPROM (from 1 to 0).
- Support TCPCs.
localhost ~ # ectool locatechip 0 0
BUS: I2C; Port: 0; Address: 0x50 (7-bit format)
localhost ~ # ectool locatechip 1 0
BUS: I2C; Port: 0; Address: 0x0b (7-bit format)
localhost ~ # ectool locatechip 1 1
BUS: I2C; Port: 1; Address: 0x29 (7-bit format)
localhost ~ # ectool locatechip 1 2
EC result 11 (OVERFLOW)
Index too large
localhost ~ # ectool locatechip 2
Usage: locatechip <type> <index>
<type> is one of:
0: CBI_EEPROM
1: TCPCs
<index> instance # of <type>
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=Verified ectool locatechip work on Nami.
Change-Id: I1a773ced65b1c5ce3656f03eff04a6eadd4bc5ff
Reviewed-on: https://chromium-review.googlesource.com/1614582
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767518
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Currently the I2C tunnels of all TCPC ports are protected implicitly
when the system jump is disabled. Depthcharge issues that command after
the EC jumps to RW and before the TCPC firmware update is applied. This
leads to failure while updating the TCPC firmware and hence a reboot loop.
Fix this behavior by adding a sub-command to protect all the I2C tunnels
so that depthcharge can issue that command after both EC SW Sync and
TCPC Firmware update are done.
BUG=b:129545729
BRANCH=None
TEST=make -j buildall; Boot to ChromeOS. Force a TCPC FW update and
ensure that the reboot loop does not happen.
Change-Id: I5dd2314cf82dcfff520dc32ce3ced232326ab3d5
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1605260
Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767517
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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This patch makes debug printf messages more informative as follows:
- All messages are prefixed with I2C_PTHRU
- Don't print pointers for read or write buffers
- Print out buffer data
With the patch, messages will look as follows:
[7.335059 I2C_PTHRU xfer port=1 addr=0x16 rlen=0 flags=0x3]
out: 0x03 0x01 0xe0
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=Verify the messages are printed as expected
Change-Id: I144b2d1d517070b6cdb492f71baa7f20c27e29b9
Reviewed-on: https://chromium-review.googlesource.com/1604162
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767516
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Currently, tcpc_config is declared in two places. This patch
consolidates declarations in usb_pd_tcpm.h.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: I4f30d06b1eaeb6a83b664de76116d85d65a9fc97
Reviewed-on: https://chromium-review.googlesource.com/1616007
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767515
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Add a new host command that will allow you to lookup a well known device
on the EC. This is useful for FAFT tests that want to talk directly
with i2c devices but don't know the physical address for each platform.
BRANCH=octopus
BUG=b:119065537
TEST=Used this with new faft test in CL:1601300
Change-Id: I82c2d5462fcb4edbc92ea60765971190fed7ae81
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1601060
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767514
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Currently, the battery_manufacturer_name API is implemented individually
by each chip.
This patch consolidate the definitions. It also allows a board to
return custom manufacturer names.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/129599895
BRANCH=none
TEST=buildall
Change-Id: Ib0f60c9be71fea31658ab284a915d73341b9145e
Reviewed-on: https://chromium-review.googlesource.com/1590039
Commit-Ready: YH Lin <yueherngl@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767513
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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tcpc_config contained a field for both the alert polarity and open
drain/push pull configuration. There is also a possible difference in TCPC
reset polarity. Instead of adding yet another field to describe this
configuration, it would be better to convert alert polairty, open
drain and reset polarity into a single flags field.
This CL modifies the tcpc_config struct to use a single flags field
and adds defines for what existing flag options can be.
BUG=b:130194031
BRANCH=none
TEST=make -j buildall
Change-Id: Ifb7e7604edb7021fb2d36ee279049eb52fefc99e
Signed-off-by: Scott Collyer <scollyer@google.com>
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1551581
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767512
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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ANX PD has two way to get VBUS present info, 1:ADC, 2:Comparator
the ADC has been reset at chip reset stage, the comparator(0x1e:bit2)
is analog part, it is not been reset by chip reset.
there is a corner case which EC TCPM detect VBUS present info at
chip reset stage(at system rebooting stage, EC TCPM issue TEST_R
signal, this will trigger chip hardware reset).
the original VBUS present function checks the VBUS from ADC, the
ADC register value became to 0 while at chip reset stage, so at this
moment, EC TCPM need check 0x1e:bit2 to get real VBUS present info.
BRANCH=None
BUG=b:129092057
TEST=Tested on Phaser, reboot stress test.
Change-Id: I1e847c88b22684bc9b17243628179bad534801b2
Signed-off-by: Xin Ji <xji@analogixsemi.com>
Reviewed-on: https://chromium-review.googlesource.com/1535085
Commit-Ready: Justin TerAvest <teravest@chromium.org>
Tested-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767511
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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The patch in question was uploaded with numerous coding style
violations. Fixing them to avoid warnings when cherry-picking the
patch into different branches.
BRANCH=cr50, cr50-mp
BUG=none
TEST=repo upload does not complain any more.
Change-Id: I01e2786a509819ed914370b0ab276bb58e420365
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1500993
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767510
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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In command
xfer i2cwrite port addr offset value
16bit offset and 8bit offset call the wrong i2c write interfacefix it.
BRANCH=none
BUG=b:126820386
TEST=1:) Build flapjack EC and flash to DUT ,
in ec console can read/write i2c device correctly.
2:) Build kukui EC , build pass.
Change-Id: Ib3aa058ae0917fe62f38bc500a8227d6e36dbab1
Reviewed-on: https://chromium-review.googlesource.com/1496676
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Tony Zou <zoutao@huaqin.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767509
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Implements battery-cutoff SMBus write block function
BUG=b:122944526
BRANCH=None
TEST=Verify battery cuff on fleex via SMBus block write.
Change-Id: Ib52146cd3042c4a6d2dbafadd430591936230891
Signed-off-by: matt_wang <matt_wang@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1470462
Commit-Ready: Justin TerAvest <teravest@chromium.org>
Tested-by: Justin TerAvest <teravest@chromium.org>
Tested-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767508
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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wireless receiver charger IDT P9221 I2C reg addr is 16bit.
command
i2cxfer r/r16/w/w16 port offset [value]
When offset is 4 digit (e.g. 0x00ab), it reads/writes 16 bit offset
registers. Otherwise, it reads/writes 8-bit offset registers.
BRANCH=none
BUG=b:123504007
TEST=1:) Build flapjack EC and flash to DUT ,
EC can read/write P9221 register.
2:) Build kukui EC , build pass.
TEST=buildall
Change-Id: If0df532f5ca136bf1312a1857b13e8455e897943
Reviewed-on: https://chromium-review.googlesource.com/1445133
Commit-Ready: Tony Zou <zoutao@huaqin.corp-partner.google.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767507
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Prevent anx7447 to be recompiled all the time.
BUG=none
BRANCH=none
TEST=anx7447 is not recompiled all the time.
Change-Id: I3d3299c84bc0d60a594f21fe5f937e21fc51af27
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1459820
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767506
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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BUG=b:113830171
BRANCH=octopus
TEST=check the power consumption is lower
Change-Id: I527cdc5d1e4dd5de137ab0927e66c171696758ce
Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1426306
Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com>
Tested-by: James Chao <james_chao@asus.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767505
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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On Shyvana, we found that if we put the Parade PS8751 and Analogix
ANX3447 on the same i2c bus, the ANX3447 would be broken because
of PS8751 i2c bus error. To avoid this kind of problem, we decided
to separate the TCPC i2c bus starting from board version >= 2.
The new assignment are ANX3447:i2c_0_0, PS8751:i2c_0_1.
This patch also adds a new config CONFIG_USB_PD_TCPC_RUNTIME_CONFIG
for enabling runtime switching the TCPC setting.
BUG=b:118063849
BRANCH=firmware-rammus-11275
TEST=verified on DUT with board_version <= 1
verified on reworked DUT with board_version >= 2
Change-Id: I0bdc930c1a5e691239f5f5c256d380d0111eed91
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1381600
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767504
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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SW short protect current.
The default values of Vconn SW protection time of inrush current is 19us and power SW short protect current is 370mA, it finds that the current of Vconn will up to 656mA during press F3+power
button with Huawei dongle plugged in MB, then Vconn will drop when the large current happen. Vendor suggest to adjust Vconn SW protection time of inrush current(modify register 0xAA from 19us to
2.43ms) and power SW short protect current(modify register 0xA8 from 370mA to 440mA).
BUG=b:119540455
BRANCH=none
TEST=The HDMI display well with Huawei dongle at MB side when pressing F3+ power button to reboot OS.
Change-Id: Ibb7e602fc4a4aa9cb69231a7f199f4ea31265148
Reviewed-on: https://chromium-review.googlesource.com/1343643
Commit-Ready: Xiong Huang <xiong.huang@bitland.corp-partner.google.com>
Tested-by: Xiong Huang <xiong.huang@bitland.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767503
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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ANX initializes its muxes to (MUX_USB_ENABLED | MUX_DP_ENABLED)
at init, this is error prone when the display and USB devices are
attached before the ANX chip is powered on hence, overriding the
default mux state to TYPEC_MUX_NONE at init.
BRANCH=none
BUG=b:117789358
TEST=Manually tested on yorp
1. EC command "typec 0" shows 'No Superspeed Connection' when
nothing is connected.
2. Able to get the HDMI display working on ANX before and after
EC reboot.
Change-Id: Ic174ff77fbfac7bb7478f4f92abf80018480c406
Signed-off-by: Sanna Parmar <fnu.sanna@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1282017
Tested-by: Sanna Fnu <fnu.sanna@intel.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767502
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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This change adds a call to the C0 TCPC reset for standalone TCPC boards
which have that pin hooked up in hardware, and adds the GPIO as
unimplemented for boards which do not have this yet.
BRANCH=None
BUG=b:112756630
TEST=Added a log print and rebooted EC on bobba to verify TCPC C0 reset,
then verified that charging on C0 worked. Also imaged yorp proto 2 and
rebooted, verifying C0 reset was not attempted.
Change-Id: I615861f0d9ce9b5a89692e3982ed2e19c7e0b237
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1257647
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767501
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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This CL removes keyboard backlight accordding to most recent
treeya schematics.
BRANCH=none
BUG=b:138744661
TEST=builds
Change-Id: I2a42b2dcb122ac1fd805f9f614d1b68c0b60d7ca
Signed-off-by: lu.zhang <lu.zhang@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1738526
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1749724
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Accordding to the treeya schematics, a power led is added.
Also, the behavior of battery leds does not follow Lenovo's spec
BRANCH=none
BUG=b:138744661
TEST=builds
Signed-off-by: lu.zhang <lu.zhang@bitland.corp-partner.google.com>
Change-Id: I51466c36973b9cd4ced3501bf77b5672530d7d98
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1739027
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1749723
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Now we have led_onoff_states instead of led_state of baseboard, to avoid
duplicate file so move forward to common code.
BUG=b:126460269
BRANCH=none
TEST=make buildall -j, make sure led behavior on meep intended as well.
Change-Id: I3adf20ebf2efd2f02b1ae101faf1c36f2f5ed454
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/1556869
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Marco Chen <marcochen@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1749722
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Synchronize with CL:1419477 to common/led_onoff_states.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: Ibb5d9150f03cb7a584d7439bc47d5b59de856502
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/1556859
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Marco Chen <marcochen@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1749581
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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We don't need to loop to figure out when to schedule the next sensor
collection event, just schedule it as soon as possible. This eliminates
a watchdog reset when we miss scheduling the sensor task and get really
far behind.
BRANCH=none
BUG=b:133190570
TEST=normal operation is fine, based on longs of failing results in bug,
this should prevent the watch reset.
Change-Id: I3001028ba393b51d1958f0136ba040eaee5e52d1
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1658521
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719568
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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The EC is running at 10Hz itself, so it won't be able to properly
handle frequencies below that threshold, and data will end up being
sent to the kernel at 10Hz.
This is a source of CTS issues on some devices, as Android expects
to be able to program the sensor to send data at 1Hz given the
sensor's configuration parameters.
Fix the issue by picking the closest frequency above 10Hz that the
accelerometer supports, i.e. 12.5Hz
BUG=b:134422740
BRANCH=oak
TEST=run CtsSensorTestCases, observe it pass
Change-Id: I56772009817e3cbd452e96637c0a78f54f3854c7
Signed-off-by: Enrico Granata <egranata@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1647363
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719567
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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This changes moves the specialized logic for timestamp spreading
away from the accelgyro_lsm6dsm and into the main motion_sense
loop. The motion_sense_fifo_add_data function was replaced by a
stage equivalent, and a commit function was added. Similarly,
internal static functions for motion_sense.c were renamed to
use the stage terminology. The idea is:
When a sensor is read, it might provide more than one measurement
though the only known timestamp is the one that caused the interrupt.
Staging this data allows us to use the same fifo queue space that the
entries would consume eventually anyway without making the entries
readable. Upon commit, the timestamp entries are spread if needed.
Note that if tight timestamps are disabled, the commit becomes a
simple tail move.
BUG=chromium:966506
BRANCH=None
TEST=Ran CTS on arcada.
Change-Id: Ib7d0a75c9c56fc4e275aed794058a5eca58ff47f
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637416
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719566
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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