summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
* it8xxx2: The "M" extension is disabled by defaultfirmware-icarus-12574.BDino Li2022-06-145-0/+60
| | | | | | | | | | | | | | | | | | | | | | | There is a mul instruction bug. The bug may cause instructions of writing back CPU GPR (e.g mv a0,s2) which following the mul instruction to fail. This patch disables the 'M' extension and overwrite integer multiplication and division arithmetic library routines with using hardware multiplication and division and nop instructions. This will ensure that there is no write back GPR instruction to follow mul instruction to avoid the bug. BUG=b:235297478 BRANCH=asurada,cherry,icarus TEST=- buildall - The "M" extension is disabled on cherry image (-march=rv32iac) Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I39b34a91dd77d975b78b6756494691c6b28dc42d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3690042 Reviewed-by: Eric Yilun Lin <yllin@google.com> (cherry picked from commit 4a2e334030cf936cc5bc59b034b8bbbb6aa55caa) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3705076
* riscv: it8xxx2: pull __switch_task function into ram_code_ilm0 sectionDino Li2022-06-103-2/+5
| | | | | | | | | | | | | | | | | | | The ram_code section will out of space once mul instruction workaround is enabled. This change pulls the function into the second ram code section. BUG=b:235297478 BRANCH=asurada,cherry,icarus TEST=- buildall - Check map file, the function is in the ram_code_ilm0 section. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I236caf2261a16edf25185b2442d126ec6ed7ef41 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3686728 Reviewed-by: Eric Yilun Lin <yllin@google.com> (cherry picked from commit 9e82920e70ea835ec0744eb666a108f265f287fb) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3697761 Commit-Queue: Eric Yilun Lin <yllin@google.com>
* config: riscv: add CONFIG_RISCV_EXTENSION_M configurationDino Li2022-06-103-1/+11
| | | | | | | | | | | | | | | | | This makes the 'M' extension to be configurable. BUG=b:235297478 BRANCH=asurada,cherry,icarus TEST=- buildall - ISA for cherry images includes "M" extension (-march=rv32imac) Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I56957a6767378121443659a170ca33896ada67ce Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3690041 Reviewed-by: Eric Yilun Lin <yllin@google.com> (cherry picked from commit adae86b9387e261919d5e9921814f0d8f31f49fa) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3699410 Commit-Queue: Eric Yilun Lin <yllin@google.com>
* motion_sense: Fix Fix ap_event_interval calculationGwendal Grignou2021-11-171-1/+1
| | | | | | | | | | | | | | | | | | Improve precision of the new_rate_us calculation. Fixes: motion_sense: Fix ap_event_interval calculation ("5155d9c7bfc42aa3f53572e0389a8180d7f3a366") BUG=b:195264765,b:129159505,b:73557414 BRANCH=many. TEST=compile Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I4b3d54dedceca5652004da14f32dac6ae98747fa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3200808 Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3288754 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* motion_sense: Fix ap_event_interval calculation.Gwendal Grignou2021-11-171-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [CONFIG_AP].ec_rate, populated with sysfs entry |hwfifo_timeout|, is used to calculate |ap_event_interval| the delay before sending a new event to the AP. When load_fifo() still existed (CL:938146), it was critical that a sample was available before gathering the data. When ODR and |hwfifo_timeout| are closed, |ap_event_interval| is increased by 5%. Now, since samples are collected after an interrupt triggers due to at least one element in the sensor FIFO or are scheduled based on the sensor data rate (forced mode), we are guaranteed to have an event. We should actually decreate |ap_event_interval| by 5% to be sure an event is triggered. When both an interrupt based sensor and a force sensor are at running at the same ODR, they will probably not be in phase, but there will be opportunity to send event to the host. One sensor will have a fix delay, guaranteed to be less than its ODR. BUG=b:195264765,b:129159505,b:73557414 BRANCH=many. TEST=Without the change, on gaybrush, we can see that events are sent 2 by 2, event when the AP asks for them immediately. Using 'iioservice_simpleclient --device_id=3 --channels="timestamp" --frequency=49 --samples=40' (50Hz ODR): : Before : After Latency tolerance: 0.070408 s : 0.070408 s Max latency : 0.024089 s : 0.004047 s Min latency : 0.003339 s : 0.003167 s Median latency : 0.02319 s : 0.003565 s Mean latency : 0.013644 s : 0.003567 s Change-Id: I9035dd535ff2895be5011335c5f44bd069c9421e Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3172269 Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3200839 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* it83xx: clock: fix sequence to set PLL control registerDino Li2021-09-301-6/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We change event timer's clock to 32.768kHz before entering low power mode. And will restore the clock to 8MHz (by checking PLL control register's setting in ISR) when chip wake up from the low power mode. So we need to ensure the setting is taken into PLL control register before wfi instruction. The original implementation can't ensure event timer’s clock is restored to 8MHz when chip wake up. So we fix it. This also fix wfi (wait for interrupt) instruction fail issue on RISV-V core chips when a timer count down to zero (MTIP@mip is set to 1 until HW reload timer counter). Once CPU executed wfi instruction, CPU should stay there until interrupt is fired or MEIP@mip is non-zero. But currently, HW checks entire mip value (should check MEIP@mip only) to decide whether or not to ignore wfi instruction. The issue will cause EC premature wake from idle task even there is no interrupt fired. BRANCH=asurada, icarus BUG=none TEST=-On asurada, increase CPU clock to 96mhz. Plug out/in type-c adapter to wake chip up from low power mode, no pre-watchdog warning fired. (x100) -buildall Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I72bb2566c5b22bc132ab304a38a5a1b5b968e463 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3168672 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com> (cherry picked from commit 4e2d1981915533a3f214b4075babd49c8ca6c0ef) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3192747 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* Pico: Add new sku id for convertible skuSue Chen2021-09-281-1/+1
| | | | | | | | | | | | | | | | | SKU 2 -> convertible + Wifi6 BUG=none BRANCH=icarus TEST=none Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I606993a6749d0797e9742fca84a4ec5f27eb7a1c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3162464 Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> (cherry picked from commit 177a8a8bb7fe0bcb0d7ad8c1fd1a496d2462ccd8) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3189465
* Pico: enable TABLET_MODE_L interruptSue Chen2021-09-281-1/+2
| | | | | | | | | | | | | | | | | | BUG=b:200098147 BRANCH=icarus TEST=1. Switch to tablet mode for DUT 2. Reboot the DUT 3. Closing the lid to NB mode make sure DUT leave tablet mode. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I7f3dfbd5950370dd9615ec4568da3b1ca8512b80 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3162468 Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> (cherry picked from commit ae34721d1c0eea14baceda8ccbd95f8204f2240c) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3189466
* battery: Set host's low battery shutdown SoC to 3%Daisuke Nojiri2021-09-152-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the host's low battery shutdown SoC is 2%. This is the same as EC's low battery shutdown threshold. The EC waits for 30 secs before it triggers the low battery shutdown and powerd reads the SoC every 30 secs. Thus, in most cases powerd can shut down the system gracefully but these delays can be configured differently and the system may be too busy to process all shutdown tasks within 30 secs. This patch increases the host's shutdown SoC to 3%. This will further guarantee that powerd will be given enough time to do everything for a proper shutdown. It also avoids deeply discharging the battery, which is bad for the battery health. BUG=b:191837893 BRANCH=None TEST=Altas using battfake EC command. Change-Id: I3ab23205b400a1a326a60b8f9501611c027183b2 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2994747 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 9fe1acf064782eaa8ce2b0039f0ff17f3e552421) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3160253 Tested-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org> Commit-Queue: Chen-Tsung Hsieh <chentsung@chromium.org>
* Clear OWNERS for factory/firmware branchBrian Norris2021-09-107-24/+0
| | | | | | | | | | | | BUG=none TEST=none Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155188 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Owners-Override: Jora Jacobi <jora@google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* it83xx/riscv: Ensure IER has been disabled before enabling CPU interruptDino Li2021-09-031-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | This CL read EC's IER one time after configured. The load operation will ensure chip-level's interrupt has been disabled before enabling CPU interrupt. BRANCH=asurada, icarus BUG=b:179206540 TEST=create stress test on it8xxx2 evb: - Loop calling task_disable_irq() and task_enable_irq() to enable and disable IRQ 13 (keyboard KSI interrupt). - Toggle KSI continuously. Without the patch, EC will hit IRQ 0 issue in two seconds. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I56bad182bd101d45b00368083b60aabbd9fb8bdb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139652 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com> (cherry picked from commit 7999cc115b95dc918ec6a89d4e0f4b55728557d7) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139521 Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Commit-Queue: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com> Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
* it83xx/irq: there is no need to configure IER on nds32 core chipDino Li2021-09-031-2/+10
| | | | | | | | | | | | | | | | | | | | | Configure interrupt enable register is redundant on nds32 core chip (IT8320). We just need to configure extended IER. BRANCH=asurada, dedede BUG=b:197308582 TEST=buildall passes, storo and hayato boot. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I8f99f7b937ac98d95b2f50f5be7b461ae3e9a413 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3134888 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 14b2c5df42665b8d592807de604ec7a930ead262) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139867 Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Commit-Queue: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com> Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
* Pico: Fix I2C freqency for sensorSue Chen2021-08-181-1/+3
| | | | | | | | | | | | | | | | | | | | For KX022 is recommended I2C CLK timing minimum to 2.5us, set IT83XX_I2C_CH_B to 400kbps. Fill min and max frequency in motion_sensors for KX022. BUG=b:196998259 BRANCH=icarus TEST=I2C timing meets the spec. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I74e1bd6e59963dc86fd5f8725a5ee0d5aeda1d59 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3102329 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Shou-Chieh Hsu <shouchieh@chromium.org> Commit-Queue: Shou-Chieh Hsu <shouchieh@chromium.org> (cherry picked from commit 6579515b4b6df035bad7878b03f0522addeec44f) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3102689 Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* chgstv2: Unify power-on and shutdown battery thresholdsDaisuke Nojiri2021-08-0932-90/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, power-on battery SoC and shutdown battery SoC are independently configured by each board. This patch will unify the setting as follows: CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 2 (don't boot if soc < 2%) CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2 (shutdown if soc <= 2%) BATTERY_LEVEL_SHUTDOWN = 3 (shutdown if soc < 3%) CONFIG_BATTERY_EXPORT_DISPLAY_SOC = Y (removed) CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC = 1 This allows us to show the low battery alert whenever we can because EC doesn't inhibit power-on even if it knows the host would immediately shut down. With CONFIG_BATTERY_EXPORT_DISPLAY_SOC, boards will start using the CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2% as the low battery threshold (and the SoC will be agreed between the EC and Powerd). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 1 will keep the same threshold. This is for avoiding degrading the UX by increasing the power-on threshold (even though a question that 1% may not be enough for soft sync to finish consistently remains to be answered). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON > 2 will have a lower threshold but we think 2% is enough to finish the software sync. A lower threshold also improves the UX by showing the low battery alert in the situation where otherwise the system would leave the user uninformed by not responding to a power button press. BUG=b:191837893 BRANCH=None TEST=buildall Change-Id: If6ff733bc181f929561a3fffb8a84e760668ce37 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2981468 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 3aa4dd2c4a695152dd17aaec601d3a79bc5ab1c4) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3066830 Commit-Queue: Sue Chen <sue.chen@quanta.corp-partner.google.com> Tested-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
* Pico: ap_sku_id 1 for convertible skuSue Chen2021-08-041-1/+29
| | | | | | | | | | | | | | | | | | Disable motion sense and tablet mode by ap_sku_id. ap_sku_id 1 is for convertible; 0 is for clamshell. BUG=none BRANCH=icarus TEST=Can get sku id 1 while running board_motion_init and motion function works on convertible DUT. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I22401fa6f184ecf486d9337390d739237cf66f4c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3067143 Reviewed-by: Ting Shen <phoenixshen@chromium.org> (cherry picked from commit b690911962e0c0b73243f388209fa1c2d22e7d9d) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3068496 Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* Pico: Support motion sensorsSue Chen2021-08-034-9/+137
| | | | | | | | | | | | | | | | | | Lid Accel: KX022 BASE Accelgyro: BMI160 BUG=none BRANCH=icarus TEST=EC can read sensors' data and lig angle is correct. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I07743c86a3d133dd96e499f23150fd4f20340470 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3062062 Reviewed-by: Ting Shen <phoenixshen@chromium.org> (cherry picked from commit 1cbae5e8a9ff1a39e753b4ba58851fff71bba156) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3067293 Reviewed-by: Shou-Chieh Hsu <shouchieh@chromium.org> Commit-Queue: Shou-Chieh Hsu <shouchieh@chromium.org>
* Pico: Initial EC imageSue Chen2021-08-028-0/+866
| | | | | | | | | | | | | | | | | | Create the initial EC image for the pico variant by copying the icarus reference board EC files into a new directory named for the variant. BUG=none BRANCH=icarus TEST=make BOARD=pico Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I0eeae3e76b1cfabd0be54d1b29c9af7fac1238c2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058159 Reviewed-by: Ting Shen <phoenixshen@chromium.org> (cherry picked from commit 7d4846d48e4625d3556f27d7419d2358da2b64a5) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3062701 Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* baseboard kukui: Update kukui_board_id_map for EC IT81202Sue Chen2021-07-291-1/+24
| | | | | | | | | | | | | | | | | | | | EC_BOARD_ID is connected with 3300mV while using EC IT81202 that is different from STM32 with 1800mV. Therefore, it need to update kukui_board_id_map for EC IT81202. BUG=b:182772415 BRANCH=icarus TEST="mosys platform version -vvvv" and "ectool boardversion" can read correct Board ID on Cozmo. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I0bd518ec2d612b7ea42e160f55b4061ce459a274 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3054214 Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org> (cherry picked from commit f5ef1ee7fa649a6bc87bf2d0157740a60014294d) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058152 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Chen-Tsung Hsieh <chentsung@chromium.org>
* Revert "Homestar:LED:LED function realization"Jian Tong2021-07-123-59/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit f37d232d9a92a9d6344639437fdb00efbf74c18e. Reason for revert: Need change orange to amber Original change's description: > Homestar:LED:LED function realization > > BUG=b:187539586 > TEST=make -j BOARD=homestar > Verify build on EVT board > BRANCH=Trogdo > > Signed-off-by: tongjian <tongjian@huaqin.corp-partner.google.com> > Change-Id: I9c77b60e11135df5e289ef32adfe34fef3134760 > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2915162 > Reviewed-by: Wai-Hong Tam <waihong@google.com> > (cherry picked from commit 8aacd88a332b9903334e0bb3bf586560fdc5883a) > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2919159 Bug: b:187539586, b:193159438 Change-Id: I8e4fef5a0cc37a3ae176659ff86abbc14e9267d7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2947430 Auto-Submit: Jian Tong <tongjian@huaqin.corp-partner.google.com> Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com> Commit-Queue: Jian Tong <tongjian@huaqin.corp-partner.google.com> (cherry picked from commit 9d037ef0849de9a078fe52480bc4d55786f64941) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3020305 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org> Commit-Queue: Sue Chen <sue.chen@quanta.corp-partner.google.com> Tested-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
* Cozmo: Add new battery informationSue Chen2021-06-302-0/+30
| | | | | | | | | | | | | | | | new battery config : AP18C7K BUG=none BRANCH=icarus TEST=Check found battery info in console and cutoff work. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: Ic7c91997e495a2e7197f059a90edda286f207969 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2959007 Reviewed-by: Ting Shen <phoenixshen@chromium.org> (cherry picked from commit 64f74b38c489ff7089c036230c8b1fa68a8d1728) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2995236 Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* kukui: enable HOST_SLEEP_STATE to smooth suspend trasnsitionEric Yilun Lin2021-06-302-0/+76
| | | | | | | | | | | | | | | | To smooth the suspend transition to prevent from EC waking up AP during S0->S3. BUG=none TEST=ensure AP notify EC before suspending BRANCH=kukui,icarus Change-Id: I6d4d79be2688c53e0057f5e60a394cfa8974e501 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2987232 Tested-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* kukui: move common mkbp wake events to baseboard.hEric Yilun Lin2021-06-3015-61/+12
| | | | | | | | | | | | | | | also, kodama(detachable) missed MODE_CHANGE event, add it back. BUG=none TEST=make buildall BRANCH=kukui,icarus Change-Id: Id7139ef64caf28720d389d8c048bfd724b42ba95 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2987231 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com>
* i2c_controller: add volatile for i2c_port_active_listEric Yilun Lin2021-06-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | With the LTO enabled, the i2c_port_active_list might be reordered by linker and causes the i2c lock checking failure. BUG=b:191444593 TEST=i2c waveform looks good, no "Access i2c without lock" complain BRANCH=none Change-Id: I96996c7288b65e74f1734fd14a82f069b6ff11ff Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2984257 Tested-by: Eric Yilun Lin <yllin@google.com> Tested-by: Hsu Alvis <alvishsu@google.com> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@google.com> (cherry picked from commit 2ffc903ae4c772f2b12897634e24fa8e0c1791ef) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2986849 Reviewed-by: Eric Yilun Lin <yllin@google.com> (cherry picked from commit c7138bf8f638b3f487baaf998bcbe4aecb5eaaca) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2987463
* Cozmo: support factory keyboard test.Sue Chen2021-06-233-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | connector-to-GPIO map: {-1, -1}, {GPIO_KSO_H, 4}, {GPIO_KSO_H, 0}, {GPIO_KSO_H, 1}, {GPIO_KSO_H, 3}, {GPIO_KSO_H, 2}, {-1, -1}, {-1, -1}, {GPIO_KSO_L, 5}, {GPIO_KSO_L, 6}, {-1, -1}, {GPIO_KSO_L, 3}, {GPIO_KSO_L, 2}, {GPIO_KSI, 0}, {GPIO_KSO_L, 1}, {GPIO_KSO_L, 4}, {GPIO_KSI, 3}, {GPIO_KSI, 2}, {GPIO_KSO_L, 0}, {GPIO_KSI, 5}, {GPIO_KSI, 4}, {GPIO_KSO_L, 7}, {GPIO_KSI, 6}, {GPIO_KSI, 7}, {GPIO_KSI, 1}, {-1, -1}, {GPIO_KSO_H, 5}, {-1, -1}, {GPIO_KSO_H, 6}, {-1, -1}, {-1, -1}, BUG=none BRANCH=icarus TEST=`ectool kbfactorytest` PASS. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: Ifc22d87f84ce86dee6f68b33a2a9a2964f71170f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2936262 Reviewed-by: Ting Shen <phoenixshen@chromium.org> (cherry picked from commit 354521683e2ec0b3c3b9147c904212f6132f5e9b) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2979559 Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* Cozmo: Remove CONFIG_SYSTEM_UNLOCKEDSue Chen2021-06-221-2/+0
| | | | | | | | | | | | | | | | | Disable CONFIG_SYSTEM_UNLOCKED for faft_ec_fw_qual test. BUG=b:191221606 BRANCH=icarus TEST=firmware_ECSystemLocked and firmware_PDProtocol.ec_wp pass. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I325078cd04b85fbb91069e6fe2d557d3f64bb6ea Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977857 Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org> Commit-Queue: Chen-Tsung Hsieh <chentsung@chromium.org> (cherry picked from commit 4f188e6e2659880d5214747edfa326c8c261f104) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977865
* it8xxx2/irq: wait until two equal interrupt values are readDino Li2021-06-221-1/+5
| | | | | | | | | | | | | | | | | This CL ensures that CPU won't get an IRQ number which is in generating. BRANCH=none BUG=b:179206540, b:189534384 TEST=No panic of unhandled irq. Change-Id: I934fc9ba7aeef520f5e275e8889722c7357c77f1 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2935652 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com> (cherry picked from commit 3e0527c720dd6b407a0e1431fe74ca033f669cf6) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977862
* kukui: Remove CONFIG_SYSTEM_UNLOCKEDHung-Te Lin2021-06-211-5/+1
| | | | | | | | | | | | | | | | | | | | | | Disable CONFIG_SYSTEM_UNLOCKED for all Kukui and Jauczzi boards built from firmware branch. Developers who need unlocked EC please manually turn on the option. TEST=emerge-kukui chromeos-ec; emerge-jacuzzi chromeos-ec BUG=b:191221606 BRANCH=icarus Change-Id: Iabcb729dc208c9ede26af2dcd9f18fe2458ea66b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2056624 Tested-by: Hung-Te Lin <hungte@chromium.org> Auto-Submit: Hung-Te Lin <hungte@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2975161 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Commit-Queue: Chen-Tsung Hsieh <chentsung@chromium.org> Tested-by: Chen-Tsung Hsieh <chentsung@chromium.org>
* it8xxx2/spi: re-init spi module after disable emmc boot modeDino Li2021-06-102-37/+17
| | | | | | | | | | | | | | | | | | This CL reset and re-initialize SPI module after AP jumped to BL. So EC will have a good state to start receiving AP's commands. BRANCH=icarus BUG=b:184702635 TEST=on cozmo, confirm that EC doesn't miss the first command from AP after booting. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: Ib7cf0e9cb70a67950d53d3abc7df42969c9b4dc2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2947425 Reviewed-by: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Chen-Tsung Hsieh <chentsung@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* flash_fp_mcu: Add automatic service stop/restartCraig Hesling2021-06-011-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The normal invocation of flash_fp_mcu is without biod and timberslide being stopped. This is a problem, since this script unbinds/bind drivers that biod and timberslide have open and can interact with. BRANCH=none BUG=b:188985272 b:181635081 TEST=# On Nocturne scp util/flash_fp_mcu dut1:/usr/local/bin/flash_fp_mcu ssh dut1 flash_fp_mcu --hello # Ensure that the biod and timebrslide were stopped and restarted. # No warnings about other services having files open should occur. ssh dut1 flash_fp_mcu --noservices --hello # Ensure that no services were stopped/started and a warning should # be emitted about processes with the device file open. ssh dut1 flash_fp_mcu --noservices --hello # Should see that the warnings shown now show that the open file # was deleted. Cq-Depend: chromium:2918383, chromium:2918638 Signed-off-by: Craig Hesling <hesling@chromium.org> Change-Id: I021b922fb58defcbe608492239e311a5f5296fca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2914502 Reviewed-by: Josie Nordrum <josienordrum@google.com>
* delbin: gyro sensor add 2nd source KX022Michael5 Chen12021-05-312-2/+38
| | | | | | | | | | | | | | | | | | Gyro sensor add 2nd source KX022. BUG=b:187138428 BRANCH=volteer TEST=manual 1. Set CBI SSFC 0x10 and using command "ectool motionsense" for sensor kxo22. 2. Using command "ectool motionsense" for sensor BMA253. Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I82f67e3fa3ad5285db58a7cc0f98aaf112e6898f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2910570 Tested-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Commit-Queue: Zhuohao Lee <zhuohao@chromium.org>
* zephyr: lazor: enable Virtual Battery driverDawid Niedzwiecki2021-05-312-0/+3
| | | | | | | | | | | | | | | | Enable I2C_VIRTUAL_BATTERY config for lazor. This is one of a few steps to fix getting data about the battery by the host. Also, set I2C_PORT_VIRTUAL_BATTERY to I2C_PORT_BATTERY, but it might be changed in the future. BUG=b:188885798 BRANCH=none TEST=zmake testall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I12da1b57b6e2cf0b98822c71243ccd1667d73506 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2919907 Reviewed-by: Yuval Peress <peress@chromium.org>
* brya: Limit IMVP9 tuning to board ID 1Caveh Jalali2021-05-271-0/+3
| | | | | | | | | | | | | | | | We introduced tuning values for the IMVP9 PMIC for board ID 1 to improve stability. More recent boards should have the desired values pre-programmed, so we do not need to apply tuning parameters. BRANCH=none BUG=b:188945301,b:185275955 TEST=boots on board ID 1 Change-Id: I9b6967a43f6d5c8b37bc3a7344347c278bdf698a Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2922002 Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
* util: Make a start on writing a Python-based CONFIG checkerSimon Glass2021-05-272-0/+363
| | | | | | | | | | | | | | | | | | Add a new class which can handle the operations required to check that new ad-hoc CONFIGs are not added to the source tree. More work is needed in future CLs: - building the list of allowed CONFIGs - plumbing it into the build and removing the existing shell scripts BUG=b:181323955 BRANCH=none TEST=python3 util/test_kconfig_check.py Change-Id: Icec295effc4bf3c7b644f671b0cb83dcb0c97b68 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2864428 Reviewed-by: Yuval Peress <peress@chromium.org>
* zephyr: add I2C_VIRTUAL_BATTERY configDawid Niedzwiecki2021-05-273-1/+16
| | | | | | | | | | | | | | Add I2C_VIRTUAL_BATTERY config to use virtual battery driver. BUG=b:188885798 BRANCH=none TEST=zmake testall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I6d1a4bfd8c950aa569ee836d9d22e438eeaef67b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2919906 Reviewed-by: Yuval Peress <peress@chromium.org> Commit-Queue: Yuval Peress <peress@chromium.org>
* zephyr: asurada: move options to be board level choicesDenis Brockus2021-05-272-53/+54
| | | | | | | | | | | | | | | | | | Until there is a variant that needs to have a CONFIG_ option as a different value, they should stay in the top level board configuration. BUG=b:180980668 BRANCH=none TEST=zmake configure -b $PROJ_ASURADA Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I78890978489be5a90656d283c6489a92060305c1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2920626 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org> Commit-Queue: Yuval Peress <peress@chromium.org>
* chip/npcx: Fix comment white spaceCaveh Jalali2021-05-271-1/+1
| | | | | | | | | | | | | | This fixes a missing white space in a comment. BUG=none BRANCH=none TEST=buildall passes Change-Id: Ifde65ab45be7fa6881195ecf723d999d9991f2aa Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2921289 Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
* Test: Make host calls for power supply mockableDiana Z2021-05-271-2/+2
| | | | | | | | | | | | | | Add test_mockable for power supply ready and reset so tests may detect when Vbus is applied and removed. BRANCH=None BUG=b:153071799 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I43d8d3cc5107b4e94338850fa807ae0eedc6d4b5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2921282 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* TCPMv2: Exit Attached.SRC on open even during swapDiana Z2021-05-271-2/+1
| | | | | | | | | | | | | | | | | | | | | | If a port doesn't clear the PR swap in progress flag while switching from a source to a sink, the port can end up permanently stuck in Attached.SRC even when the port partner is unplugged. This removes the check to the PR swap in progress flag when Open is detected on the CC lines. This follows the type-c spec's exit conditions, and we would not expect to see CC open during a PR swap since the source sets Rd before the new source will set Rp. BRANCH=None BUG=b:158613480 TEST=on mancomb, unplugging after failed PR swap with dock allows port to go unattached again. Normal PR swap process is able to complete with dock plus servo_v4 and Apple 3-in-1 Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Idc4c193597c6b4a791d18e38bc5111d0342e512c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2256465 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* brya: Set hibernate wake sources polarityCaveh Jalali2021-05-271-5/+6
| | | | | | | | | | | | | | | | | This sets the wake source polarity on GPIOs we use as wake sources. LID_OPEN and ACOK are active high while the GSC_EC_PWR_BTN_ODL is active low. BRANCH=none BUG=b:183452273 TEST=booted on brya board ID 1 Change-Id: I13fded03bbe3f40ed9699f6e8c32e7532c87bc41 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2921292 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: CH Lin <chlin56@nuvoton.com> Commit-Queue: Furquan Shaikh <furquan@chromium.org>
* TCPCI: Move debug accessory control set to NCT38xx driverDiana Z2021-05-272-12/+13
| | | | | | | | | | | | | | | | | | | This debug accessory control setting was initially added to the TCPCI driver to support the NCT3807, but now should move into the NCT driver since it will need to be conditional on specific register conditions. Note that NCT is the only driver currently implementing the debug_accessory driver field, so it's not expected to affect other TCPCs. BRANCH=None BUG=b:186799392 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id5832c474378a3f8735c6c72c5535ddb5d9229d4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2919940 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* zephyr: drivers: add temp_sensor test suiteTomasz Michalec2021-05-272-0/+134
| | | | | | | | | | | | | | | | | | Temperature sensors are accessed through temp_sensor_read() for which this test suite is created. Tested functionalities are: - Error code from underlying driver is returned. - Unknown temperature sensor id is rejected. - Temperature from underlying driver is returned. Value is not extensively tested, because it is done in thermistor test suite. BUG=b:184857072 BRANCH=none TEST=run zmake drivers test Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I6c2df39a70e8ac57325aa9e1f49e7a9bd2340fae Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2886889 Reviewed-by: Simon Glass <sjg@chromium.org>
* base_state: implement basestate host commandTing Shen2021-05-2711-27/+89
| | | | | | | | | | | | | | | | | | | | | This CL introduces an unified method to force base attach/detach, to deprecate the hard-coded gpio pin name table in hammerd/hammertests/common.py. Also modifies base_force_state to use the same parameter type as host command. BUG=b:188625010 TEST=manually, run `ectool basestate attach|detach|reset` on coachz BRANCH=trogdor,kukui Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I5235661727cbbd15015c49d588ec70605e4a33e8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2910472 Reviewed-by: Wai-Hong Tam <waihong@google.com> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* stm32g4: ucpd: Clear tx interrupts before enableScott Collyer2021-05-271-26/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ucpd driver enables, then disables tx interrupts before and after each message is sent. This CL fixes an issue where tx interrupts weren't guaranteed to be cleared prior to enabling. This was leading to instances where the tx data byte interrupt wasn't firing when expected. The failure was exposed following a VCONN swap when VCONN is turned on. The UCPD driver will remove Rp from the CC line which has VCONN. The following PS_Rdy message would fail. Debugging this issue also led to observe that when Rp is removed for VCONN active CC lines, Rp would be applied again when Rp is adjusted by TCPM as part of collision avoidance. BUG=b:189293176 BRANCH=quiche TEST=Tested on quiche against kohaku host machine. Repro case was very consistent. Verified that failures were present without the fix in this CL. Then verified that after fixing interrupt issue, there were no hard reset/soft reset events follwoing VCONN swaps. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I289b5b5a60bbe7e880ff6b7f6fd9e5b0182f67a0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2917643 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: PE: Don't set AMS flag unless custom VDM has a replyScott Collyer2021-05-271-4/+6
| | | | | | | | | | | | | | | | | | | | This CL fixes an issue related to PE_FLAGS_INTERRUPTIBLE_AMS which was being set in pe_handle_custom_vdm_request_entry whether the custom VDM request is supported or not. This would result in PE_FLAGS_INTERRUPTIBLE_AMS remaining set and ignoring of subsequent VDM messages, which in turn prevents ALT-DP entry for UFP case. BUG=b:189293176 BRANCH=quiche TEST=Verfied that with this fix, ALT-DP mode is entered consistently. Without this CL, ALT-DP mode is not entered correctly. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I7a52a6028ea656d9a1970fea0b42f582f1aaff5c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2677707 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* adlrvp: Add dual retimer configurationPoornima Tom2021-05-272-0/+42
| | | | | | | | | | | | | | | | DDR5 based sku has dual retimer based topology for port0 & port1. Identify DDR5 board & reconfigure usbmux at run time to support dual retimer topology. BUG=b:189190982 BRANCH=none TEST=Able to configure the retimers and TBT is detected. Signed-off-by: Poornima Tom <poornima.tom@intel.com> Change-Id: I0ff859f7770a6c55931d413b2ea366d4f6aafe84 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2712214 Reviewed-by: caveh jalali <caveh@chromium.org>
* chip/mt8192_scp: disalbe video hardware 4k capabilityYunfei Dong2021-05-272-1/+2
| | | | | | | | | | | | | | | | | | | Disables 4K capability because the platform doesn't support it temporarily. BRANCH=asurada BUG=b:187896757 BUG=b:168868411 BUG=b:185977882 TEST=VDAtest passes on Asurada Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> Change-Id: I18211671fdfe13378affe28f201ca1ef67f4c36e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2921691 Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-by: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Tested-by: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com> Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
* volteer: Remove console help commandAbe Levkoy2021-05-271-0/+3
| | | | | | | | | | | | | | Save 5268 B of flash on volteer_apmodeentry and 5268 B on volteer. BUG=b:189363246 TEST=make buildall BRANCH=firmware-volteer-13672.B-main Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I30a21260f7692be3288712b02625acd968994c60 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2920636 Reviewed-by: Scott Collyer <scollyer@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* flash_fp_mcu: Add warnings for conflicting processesCraig Hesling2021-05-271-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BRANCH=none BUG=b:188985272 b:181635081 TEST=# Run with biod start on helios scp util/flash_fp_mcu root@${DUT}:/usr/local/bin/flash_fp_mcu flash_fp_mcu --hello # Ensure warning triggered. stop biod stop timberslide LOG_PATH=/sys/kernel/debug/cros_fp/console_log flash_fp_mcu --hello # Ensure no warnings are shown echo spi-PRP0001:02 >/sys/bus/spi/drivers/cros-ec-spi/unbind flash_fp_mcu --hello # Ensure the warning about cros-ec driver not being bound was # emitted # Bind raw driver and hold it open echo spi-PRP0001:02 >/sys/bus/spi/drivers/cros-ec-spi/unbind echo spidev >/sys/bus/spi/devices/spi-PRP0001\:02/driver_override echo spi-PRP0001:02 >/sys/bus/spi/drivers/spidev/bind exec 10<>/dev/spidev1.1 flash_fp_mcu --hello # Ensure warnings about cros-ec bound + raw bound + raw file open # are emitted. Change-Id: I1dded083ad158307ec54866952cf3ed59f30caf5 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2912371
* cret: add Power LED behaviorjohnwc_yeh2021-05-274-77/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Battery control for Cret. Power LED: System S0: White System S0ix: Blinking white (1 sec on, 1 sec off) System S5/G3: Off. Battery LED: DC mode: System S0: off. System S5/G3: Off. System battery low: Blinking Amber (1 sec on, 1 sec off). AC mode: Charging: Amber. Full charged: White. Battery low or AC only: Blinking Amber (1 sec on, 1 sec off). BUG=b:188900681 BRANCH=dedede TEST=test on cret ，battery 、 Power LEDs are work. Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Change-Id: I184753a738576772e37baa37e0484e9cd9834b7b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2919152 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* npcx9: fix the workaround for unexpected JTAG selectionJun Lin2021-05-275-12/+43
| | | | | | | | | | | | | | | | | | | | | There is a workaround to disable the JTAG selection when the JTAG is enabled unexpectedly by the strap pin. In npcx9, the register to control the JTAG selection is different. This CL uses the correct register to let the workaround work correctly. BRANCH=none BUG=b:165777478 TEST=pass "make buildall"; check the register is correctly configured; check JTAG can be disabled when "CONFIG_ENABLE_JTAG_SELECTION" is not defined and JEN strap pin is pulled down on npcx9_evb. Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: Ic7a8a7d99335610cbacfb1de285cdd8fbda70848 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2867125 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com>
View Lorry Controller Status