| Commit message (Collapse) | Author | Age | Files | Lines |
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BUG=none
TEST=none
Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155197
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Owners-Override: Jora Jacobi <jora@google.com>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
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BUG=chrome-os-partner:31585
BRANCH=leon
TEST=None
Change-Id: I161253603c294117e9be5c5b6a859884d7900ee8
Signed-off-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/214075
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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BUG=chrome-os-partner:25833
BRANCH=leon
TEST=Trip the PP5000 VR by over-volting the rail. Verify that
the system shuts down rather than the EC becoming unresponsive
due to loosing PP3300_EC unexpectedly. Check both S0 and S3
cases.
Change-Id: I78d99bb4baa63de3bb20eb5242ac7f05117b3954
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/189494
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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BUG=chrome-os-partner:25201
BRANCH=None
TEST=Run 'ectool i2cread 8 0 0x16 0' to read a byte
from the battery with write protect enabled. Should
return "EC result 4" error.
Change-Id: Ibbf7fd95e67a7c07c6671998eb9833b60cdbe36a
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185949
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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Temps in the fan table are lowered by 5 degreess to match
the corrected TjMax temp at 100C (from 105C). Also updates
the the warning, cpu power off, and system power off
thresholds to be less than TjMax.
BUG=chrome-os-partner:24455
BRANCH=leon
TEST=Manual. Run a device with heatsink removed until it
shuts down at 97C.
Change-Id: I778d6995dfc5798a1841354751a3423cb2309a90
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180492
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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BUG=chrome-os-partner:24455
BRANCH=leon
TEST=Manual: Verify that CONIFG_PECI_TJMAX set per-board matches
the value queried over the PECI bus with the restricted
"peciprobe" command.
Original-Change-Id: I8e99a23a66f26d6101e01cc751d0a8ca79686321
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179682
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Conflicts:
board/bolt/board.h
chip/lm4/peci.c
Change-Id: I853482cc34e29d71393312317ad113212bcb647b
Reviewed-on: https://chromium-review.googlesource.com/180491
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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This fixes a rare problem in which the EC could shutdown due to
a false over-temperature when entering S0 on Haswell architectures.
The fix involves requiring two valid reads of the temperature
sensor (out of the last 4 readings) in order to report it.
BUG=chrome-os-partner:24204
BRANCH=leon
TEST=See bug report for a patch that recreates the bug at a
significantly higher rate then it would occur on its own. Using
that patch, I implemented this fix, and made sure that there
were no false over-temperatures reported.
Change-Id: Id38bbb1b874daa423466b26faef3a9aea92c69c6
Original-Change-Id: I0454eca1b96fd2fa1833b080026ed8f1caeeddc4
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177963
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180490
Commit-Queue: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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This reverts commit 17b6be8d99103aea00ad3823574c8c59bc642f3f.
Reverting to build official firmware only with bmpblk change.
Change-Id: If022507e2bc02528602bda797c0c4d841f9f7a92
Reviewed-on: https://chromium-review.googlesource.com/178723
Reviewed-by: Yung Leem <yungleem@chromium.org>
Commit-Queue: Yung Leem <yungleem@chromium.org>
Tested-by: Yung Leem <yungleem@chromium.org>
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Modify thermal table for leon for change Step 2~4 Fan RPM.
The thermal table for leon is
Step Fan RPM trigger point (CPU Tj) unit K / 'C
Step 1 0 under 323K / 50'C
Step 2 3000 328K / 55'C
Step 3 3400 333K / 60'C
Step 4 3800 338K / 66'C
Step 5 4200 343K / 70'C
Step 6 5000 349K / 76'C
Step 7 5700 355K / 82'C
368K / 95C => assert PROCHOT
373K / 100C => give the CPU thirty second to cool off, then shutdown
378K / 105C => shutdown immediatel
BRANCH=leon
BUG=chrome-os-partner:23831
TEST=manual
Use command "thermalset" to change threshold.
Change-Id: I061813a9d4b29f0257ccf38c97d5de06dfd35fc1
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/177714
Reviewed-by: Dave Parker <dparker@chromium.org>
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Modify thermal table for leon
The thermal table for leon is
Step Fan RPM trigger point (CPU Tj) unit K / 'C
Step 1 0 under 323K / 50'C
Step 2 2700 328K / 55'C
Step 3 3000 333K / 60'C
Step 4 3400 338K / 66'C
Step 5 4200 343K / 70'C
Step 6 5000 349K / 76'C
Step 7 5700 355K / 82'C
368K / 95C => assert PROCHOT
373K / 100C => give the CPU thirty second to cool off, then shutdown
378K / 105C => shutdown immediatel
BRANCH=leon
BUG=chrome-os-partner:23831
TEST=manual
Use command "thermalset" to change threshold.
Change-Id: I7a13d09de90056e887638366826a3f7388d4b8b1
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/177310
Reviewed-by: Dave Parker <dparker@chromium.org>
Reviewed-by: Yung Leem <yungleem@chromium.org>
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BUG=None
TEST=None
BRANCH=leon
Change-Id: Iff0665c25a994618f45df26639448acd447239ef
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177465
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Add delay enable GPIO_ENABLE_BACKLIGHT and GPIO_EC_EDP_VDD_EN
when get GPIO_PCH_BKLTEN and GPIO_PCH_EDP_VDD_EN change to high level.
BRANCH=leon
BUG=chrome-os-partner:24034
TEST=manual
Use oscilloscope to check signal timing.
Change-Id: I662cae944c85feb4d0ba694e2679698ae163b991
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/177322
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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Add G781 local temperature thermal limit trigger point to 63C
BRANCH=leon
BUG=chrome-os-partner:24159
TEST=manual
Use command "g781" to check "Local Temp" "Therm Trip" is 63C.
Change-Id: Icefe4e5e051000c8896bba414388d7bf22f7cc5d
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/177315
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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All hibernate register writes must wait for the WC bit. When we're
enabling the RTC alarm, it's important to wait for the WC bit
afterwards, too, or else we could go into deep sleep before the write
to HIBIM is committed.
Also make sure that the normal hibernate() path enables the RTC alarm
if it has a timeout. This bug wasn't noticed until the low-power idle
code called system_reset_rtc_alarm(), since before then HIBIM was
initialized to 1 and just stayed there.
BUG=chrome-os-partner:24136
BRANCH=anywhere we use low power idle (wolf/leon, too)
TEST=with hacked firmware, note that HIBIM=1 just before the wfi
instruction in chip/lm4/clock.c
Change-Id: I172867c64d1700f0ff09fb472dce3435a5d4decb
Original-Change-Id: Ie01b106ac6a6c5894811f9a333715b22ef896f82
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175013
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177349
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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Temporary fix to the bug in which we miss wake events when in deep
sleep with the LFIOSC (32kHz) clock and the EC is cold. This fix
involves simply using a faster clock, 250kHz, when in low speed
deep sleep. This fix consumes more power but solves the bug.
Renamed EC console command dsleepmask to dsleep.
BRANCH=leon
BUG=chrome-os-partner:24136
TEST=Go in to low speed deep sleep by going into either S3 or G3
and letting the EC console timeout. Then freeze-spray the EC chip.
Wake up the EC via the console and make sure that the idlestats
show that we have not missed a deadline.
Change-Id: I2e98a39274060033c3812c1efc9965dba37bc87f
Original-Change-Id: I4f9844f1937bc8c95cf1540502f7d8fb4cbc097e
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175614
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177348
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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This fixes a bug in which after a sysjump, the sleep_mask is
reset, and the EC is allowed to go into a low power mode even
though the AP is still running. This causes numerous problems,
must notable of which is that a flashrom write fails with an
EC protocol mismatch error.
BUG=chrome-os-partner:24136
BRANCH=leon
TEST=Execute a flashrom write and make sure the system does not
use the low power code immediately after.
Change-Id: I114d671ba1eb29e1aa9df7f11f4c520f5bb0d01a
Origianl-Change-Id: I4d50282da0c5ba5b6488ed14a267a4d8cafe09a7
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174943
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177347
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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Changed the low power idle task to use the low speed clock in deep
sleep. The low power idle task is currently only enabled for Peppy,
Slippy, and Falco. This change decreases power consumption when
the AP is not running.
Note that the low speed clock is slow enough that the JTAG cannot be
used and the EC console UART cannot be used. To work around that,
this commit detects when the JTAG is in use and when the EC console
is in use, and will not use the low speed clock if either is in use.
The JTAG in use never clears after being set and the console in use
clears after a fixed timeout period.
BUG=chrome-os-partner:24136
BRANCH=leon
TEST=Passes all unit tests.
Tested that the EC console works when in deep sleep.
Tested that it is possible to run flash_ec when in deep sleep and
using the low speed clock. Ran suspend_stress_test.
Oringal Change-Id: Ia65997eb8e607a5df9b2c7d68e4826bfb1e0194c
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173326
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Change-Id: Icd568b6f2bfa0430acd0d9601fba44b1e65bd184
Reviewed-on: https://chromium-review.googlesource.com/177346
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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BUG=chrome-os-partner:24136
BRANCH=leon
TEST=Run on lon. Verify on console serial that EC enters low
power sleep mode in S3. Verify system resumes normally
via keyboard or AP signal.
Signed-off-by: Dave Parker <dparker@chromium.org>
Change-Id: Ic4f54dc4ddfbed2daf22b4afe1c0c2f1e5bf1568
Reviewed-on: https://chromium-review.googlesource.com/177345
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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First implementation of a low power idle task for the LM4 chip. The
low power mode is selected by defining CONFIG_LOW_POWER_IDLE in a
board.h file. This commit turns it on for Peppy, Slippy, and Falco
only because those are the only boards tested.
When using the low power idle task, the chip goes in to deep sleep
when it can. Deep sleep disables clocks to most peripherals and puts
the onboard flash and RAM into a low power mode. The chip is woken
out of deep sleep using the RTC in the hibernate module. Increased
the idle task stack size to handle more involved idle task.
In board.c, the array of GPIO info can be used to select which GPIO
points can wake up the EC from deep sleep. Currenlty selected are
the power button, lid open, AC present, PCH_SLP_S3, and PCH_SLP_S5.
Additionally the port with the KB scan row GPIO point is also
enabled to wake up the EC from deep sleep.
BUG=chrome-os-partner:24136
BRANCH=leon
TEST=Passes all unit tests. Runs on leon with
noticeable side affects. Verified that the power consumed by the EC
is lower when in S3, S5 and G3 by scoping the sense resistor
powering the chip.
Original Change-Id: I83fa9a159a4b79201b99f2c32678dc4fc8921726
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172183
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Conflicts:
board/falco/board.h
board/peppy/board.h
Change-Id: I3c70b17397038fafd8234beecd327ac131a7eeae
Reviewed-on: https://chromium-review.googlesource.com/177344
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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Created a new function to enable or disable clocks to various
peripherals. This new function makes it easy to specify if you
want the clock enabled in run mode, sleep mode, and/or deep
sleep mode.
Added infrastructure to specify which GPIOs should interrupt the
EC from deep sleep.
BUG=chrome-os-partner:24136
BRANCH=leon
TEST=Passes all unit tests. Ran on leon and verified that
the clock gate control registers in run mode (LM4_RCGC regs)
were the same before and after this change.
Original Change-Id: Ia5009ac8c837f61dca52fe86ebdeede2e1a7fe4d
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172454
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I8d64901cefb7c97d64e00fdb0bae52add95a5633
Reviewed-on: https://chromium-review.googlesource.com/177343
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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GPIO alternate functions used to be configured throughout the code,
which made it hard to tell which ones you needed to configure yourself
in board.c. It also sometimes (chip/lm4/i2c.c) led to GPIOs being
configured as alternate functions even if they weren't used on a given
board.
With this change, every board has a table in board.c which lists ALL
GPIOs which have alternate functions. This is now the only place
where alternate functions are configured. Each module then calls
gpio_init_module() to set up its GPIOs.
This also fixes a bug where gpio_set_flags() ignored most of the flags
passed to it (only direction and level were actually used).
On stm32f, gpio_set_alternate() does not exist, and pins are
configured via direct register writes from board.c. Rather than
attempt to change that in the same CL, I've stubbed out
gpio_set_alternate() for stm32f, and will fix the register writes in a
follow-up CL.
BUG=chrome-os-partner:24136
BRANCH=leon
TEST=boot leon
Original-Change-Id: I40f47025d8f767e0723c6b40c80413af9ba8deba
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64400
Conflicts:
board/kirby/board.c
board/kirby/board.h
board/pit/board.c
chip/stm32/gpio-stm32f.c
Change-Id: I46af5358e930d04ef04a296a10cc62d18b09b002
Reviewed-on: https://chromium-review.googlesource.com/177342
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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Modify battery discharge max temps for fit battery spec
BRANCH=leon
BUG=chrome-os-partner:24011
TEST=manual
Use util/make_all.sh to check build OK.
Signed-off-by: David Huang <David.Huang@quantatw.com>
Change-Id: I9a5e5202db8a93f31389508e2933f7883613a227
Reviewed-on: https://chromium-review.googlesource.com/177005
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: 志偉 黃 <David.Huang@quantatw.com>
Tested-by: 志偉 黃 <David.Huang@quantatw.com>
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BRANCH=leon
BUG=chrome-os-partner:23214
TEST=manual
Use util/make_all.sh to check build OK.
Change-Id: I92559156aa986f767e79b2f15ab57f95cb76b079
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/176641
Reviewed-by: Dave Parker <dparker@chromium.org>
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Modify input current for system overloading stop battery charge
BRANCH=leon
BUG=chrome-os-partner:23683
TEST=manual
Use command "charger" by servo board to check current limit
Change-Id: I9320738fa4f17561802dcf7cd3917412e43f0777
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/175386
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Yung Leem <yungleem@chromium.org>
Tested-by: Yung Leem <yungleem@chromium.org>
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Fixes hibernate delay logic for chipset x86. With this change
the machine will go in to hibernate one hour after going into G3
when running off battery.
BUG=chrome-os-partner:23224
BRANCH=none
TEST=Used console command hibdelay to set a reasonable hibernate
delay time and tested all combinations of running off battery vs.
AC and shutting off before or after the machine has been on for
a hibdelay amount of time.
Change-Id: Idd94d3677669dcd405732195b8cbbc1edca1e171
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172512
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175325
Tested-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Dave Parker <dparker@chromium.org>
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This adds a mutex around chipset_throttle_cpu(), so that multiple tasks
don't interfere with each other.
BUG=chromium:287985
BRANCH=Falco
TEST=none
We've never observed any problems here, but it could have happened. This
should prevent it. Everything should continue to work as before.
Change-Id: I2170a1b7af244c894100e525ed73a1b068d21e5b
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/168579
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175976
Commit-Queue: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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Servo V3's VID/PID changed and thus it requires its own cfg to work
with openocd.
BRANCH=None
BUG=None
TEST=ran fw_update locally.
Signed-off-by: Simran Basi <sbasi@chromium.org>
Change-Id: Ib4b432da921d6e70ac731cdae9e3b7da709b7202
Original-Change-Id: Id17408b17494c32d34f858a3ed5043d70b539004
Reviewed-on: https://gerrit.chromium.org/gerrit/64370
Commit-Queue: Simran Basi <sbasi@chromium.org>
Reviewed-by: Simran Basi <sbasi@chromium.org>
Tested-by: Simran Basi <sbasi@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65445
Commit-Queue: Dave Parker <dparker@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175993
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Modify thermal table for leon
The thermal table for leon is
Step Fan RPM trigger point (CPU Tj) unit K / 'C
Step 1 0 under 327K / 54'C
Step 2 3600 335K / 62'C
Step 3 4900 343K / 70'C
Step 4 5900 351K / 78'C
Step 5 6000 359K / 86'C
368K / 95C => assert PROCHOT
373K / 100C => give the CPU thirty second to cool off, then shutdown
378K / 105C => shutdown immediatel
BRANCH=leon
BUG=chrome-os-partner:23831
TEST=manual
Use command "thermalset" to change threshold.
Change-Id: I3d96e5d05262dea49b13761ecd6f5fe070b350e6
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/175397
Reviewed-by: Dave Parker <dparker@chromium.org>
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Modify led color channels to correct color,
change from blue to green.
BRANCH=leon
BUG=chrome-os-partner:23842
TEST=manual
Use ectool command "led power green" and "led battery green"
to check led status.
Change-Id: Icdcedbb677cc32866984108278f82e553b12c0cc
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/175423
Reviewed-by: Dave Parker <dparker@chromium.org>
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Modify power led to not blink when lid close in S3.
BRANCH=leon
BUG=chrome-os-partner:23300
TEST=manual
1. Use magnet to enter S3 and check led off.
2. Use "powerd_dbus_suspend" to enter S3 and check led blink.
Change-Id: Ib07fbb8949389684e91fee28621a580d29edecaf
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/173190
Reviewed-by: Dave Parker <dparker@chromium.org>
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If keyboard scanning is active when the lid closes, it will disable
scanning put the scan task to sleep. We need a corresponding task
wake when the lid opens, or scanning will be stuck off (until
something else happens, like poking the power button).
BUG=chrome-os-partner:23040
BRANCH=leon
TEST=Hold down a key. Use a magnet to trigger the lid switch. Scanning
should stop while the lid is "closed", and restart when the magnet is
moved to "open" the lid again.
Change-Id: I365e4b65ca778234e4aaa53090765a08f975f064
Original-Change-Id: I0a900f17f65b75cbdb45950cea7f50190d2bf9b1
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170993
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/171530
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: 志偉 黃 <David.Huang@quantatw.com>
Tested-by: 志偉 黃 <David.Huang@quantatw.com>
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Update leon battery setting for meet new spec
BRANCH=leon
BUG=chrome-os-partner:22624
TEST=manual
Use util/make_all.sh to check build OK.
Change-Id: Ia2ba43cb1aa1b0892fbb9fffa281936a53d8a3a6
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/171341
Reviewed-by: Dave Parker <dparker@chromium.org>
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Implement battery cut-off in leon EC for ectool command 'batterycutoff'
and batteryresume command when AC plug in.
BRANCH=leon
BUG=chrome-os-partner:22567
TEST=manual
1. Use ectool batterycutoff to check battery enter ship mode.
2. Plug in AC and boot on, then plug out AC to check battery
resume from ship mode.
Change-Id: Iec5440f35993eb4b9cb753e2aefe195d99fe8f1c
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/169089
Reviewed-by: Dave Parker <dparker@chromium.org>
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Modify power led on keyboard for leon B stage schematic.
BRANCH=leon
BUG=chrome-os-partner:22717
TEST=manual
1. Power on to see power led on keyboard always on
2. Power off to see power led on keyboard always off
3. Enter suspend to see power led blink once every four seconds
Change-Id: Ib4f19abd0138a7bfce0dd8632c0d980f78197106
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/169525
Reviewed-by: Dave Parker <dparker@chromium.org>
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Fix potential build error although this file is not being
used at the moment for leon
BRANCH=leon
BUG=None
TEST=None
Signed-off-by: Yung Leem <yungleem@chromium.org>
Change-Id: I3d8544bb27099c6dcab5556e96bc10c313bb76f8
Reviewed-on: https://chromium-review.googlesource.com/169253
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Commit-Queue: Yung Leem <yungleem@chromium.org>
Tested-by: Yung Leem <yungleem@chromium.org>
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Several files were not modified to add leon especially test/build.mk
to add empty test list for leon to skip test.
BRANCH=leon
BUG=None
TEST=cros_workon chromeos-base/chromeos-ec && emerge-leon chromeos-ec
Signed-off-by: Yung Leem <yungleem@chromium.org>
Change-Id: Ife883be7d48418c7ff5d4dbe5a58a5b158143f34
Reviewed-on: https://chromium-review.googlesource.com/169252
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Release leon for firmware-leon-4389.61.B which base on slippy
BRANCH=leon
BUG=chrome-os-partner:22104
TEST=manual
Use 'make BOARD=leon' to check build OK.
Change-Id: Ic180b5bc336d230c051dec07ac208d9b8e231c1d
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/169072
Reviewed-by: Yung Leem <yungleem@chromium.org>
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Commit-Queue: Yung Leem <yungleem@chromium.org>
Tested-by: Yung Leem <yungleem@chromium.org>
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This reverts commit 013c61b60d6011528140ab408a4561e10f141a62.
BUG=none
BRANCH=leon
TEST=none
Signed-off-by: David Huang <David.Huang@quantatw.com>
Conflicts:
common/battery_leon.c
Change-Id: I0a07e938eb700a5bb77c50e464d80bca6e353fb7
Reviewed-on: https://chromium-review.googlesource.com/169092
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Commit-Queue: 志偉 黃 <David.Huang@quantatw.com>
Tested-by: 志偉 黃 <David.Huang@quantatw.com>
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Add battery cutoff command and resume command when AC plug in
BRANCH=leon
BUG=chrome-os-partner:22567
TEST=manual
1. Use ectool batterycutoff to check battery enter ship mode.
2. Plug in AC and boot on, then plug out AC to check battery
resume from ship mode.
Change-Id: Idf24ad03a4ca0b2db9bc18fd2902ff69cb9dc7d1
Original-Change-Id: I9ff37aa809e2a6c4ea7abe7924512ff15a92d781
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/168914
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
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BRANCH=leon
BUG=chrome-os-partner:22104
TEST=manual
Use util/make_all.sh to check build OK.
Change-Id: I73a95e8b8add80a927742c22d7d2a9e30f806883
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/66614
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/168743
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
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At normal AP shutdown, Haswell systems skip S5 entirely and go directly to
G3. It's sometimes handy to pause in S5 as the other systems do, for things
like power-cycle tests that use the RTC to do a delayed wake from S5.
This CL adds a console command and a host command to enable/disable that
pause in S5.
The default is to skip S5, and the override value is not persistent across
EC reboots, so whenever the EC hibernates or reboots (Refresh + Power, software
sync), you'll have to re-enable it again.
BUG=chrome-os-partner:22346
BRANCH=falco,ToT
TEST=manual
On Haswell systems only.
To enable the pause in S5 at shutdown, do either of these:
EC console: gsv s5 1
root shell: ectool pause_in_s5 on
Shut the AP down politely, and it should pause in S5 for 10 seconds before
continuing to G3. You can see this by watching the EC console.
To disable the pause in S5 at shutdown, do any of these:
EC console: gsv s5 0
root shell: ectool pause_in_s5 off
or
press Refresh + POWER
Boot the system, then politely shut down. This time it should go directly to
G3 without pausing in S5.
Original-Change-Id: I324e6e2373bc20b61a731b4ef443d7bb8edb6b83
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/168086
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 2a31e2ac4bc899de7dfbfcca191376ce7063fd2c)
Change-Id: Iea1db204e904385e9615e3a379af53810f17ad5a
Reviewed-on: https://chromium-review.googlesource.com/168378
Commit-Queue: Bill Richardson <wfrichar@chromium.org>
Tested-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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This adds EC_CMD_GET_SET_VALUE to the list of host commands. We have a bunch
of single-value getter/setter commands, which is wasteful. This is a start
towards unifying them into a simpler command.
BUG=chromium:285358
BRANCH=ToT,falco
TEST=none
There's nothing to test just yet. This just adds the command and some basic
interfaces. A future commit will make use of it.
Original-Change-Id: Iee986b9d273b422bb06f3a0c9b7af50617f03d7f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/168083
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 3f2eba22c5d3e771904f6451a4b63a41cc6964cb)
Change-Id: Ifec6597af2cf49497ec885f807a84b996acff21c
Reviewed-on: https://chromium-review.googlesource.com/168377
Commit-Queue: Bill Richardson <wfrichar@chromium.org>
Tested-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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When both the thermal task and the power/charger task have different ideas
on whether the CPU should be throttled, we need to OR their opinions so that
either can start throttling, but both have to agree to stop it.
This CL changes the chipset_throttle_cpu() function to also take a "source"
argument, so we can handle multiple opinions.
As it turns out, this same also problem existed in the Falco-specific power
logic by itself, but was largely masked by the threshold settings. We handle
that now, too.
BUG=chrome-os-partner:20739
BRANCH=falco, ToT
TEST=manual
This change adds a bunch of tests to ensure that all this works, so try
cd src/platform/ec
make BOARD=falco runtests
And of course, try it on the actual hardware under the appropriate loads.
Change-Id: Id651e2cdc8dbd435aad6e21c5d2ce4b932a55f88
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/168088
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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When running an unit test, the emulator is sitting in idle task for most
of the time. Since we don't have interrupt support now, the emulator is
just waiting for the next wake-up timer to fire. To save time, we can
actually just figure out which task is the next to wake up, and then
fast-forward the system clock to that time.
With this, all tests run faster and we can remove time-scaling for all
current tests. This improves not only run time but also stability.
If one day we have interrupt support, then we will have to modify this
to take into account the fact that an interrupt might wake a task before
any wake-up timer fires.
BUG=chrome-os-partner:19235
TEST=Run all tests in parallel for 1000 times.
BRANCH=None
Original-Change-Id: I4cd33b041230267c110af015d425dd78d124f963
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167801
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 74b6f7687293b27b276d7bc2a5c0aea9b29a6649)
Change-Id: I50152a32b24745b89c8494c71914136e61eef2e4
Reviewed-on: https://chromium-review.googlesource.com/168121
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Bill Richardson <wfrichar@chromium.org>
Tested-by: Bill Richardson <wfrichar@chromium.org>
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BUG=chrome-os-partner:22405
BRANCH=peppy
TEST=Run 'adc' command. Measure charger current reported against
actual current.
Change-Id: I77b4f23cd945be6e0a6251832e95a9423566604d
Original-Change-Id: I1772a781d9d0100e69a5fd1e9a9590252ccd88d6
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167732
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
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Which in this case is the max across batteries we plan to ship.
BUG=chrome-os-partner:20801
BRANCH=peppy
TEST=Difficult to test without a deeply discharged battery.
Change-Id: I23f8783f9b0188c911a446d8cf5110df48a294d0
Original-Change-Id: Ieeb8fafc1768accb3cd2cd85a919b232aab77343
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167731
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
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BUG=chrome-os-partner:21798
BRANCH=peppy
TEST=Run evtest. Verify correct key codes returned.
Change-Id: I183d7ad847eb58ab9e6fddbc1c9a18ffdb72ca11
Original-Change-Id: I48b7524608c546d67eb7975de7ff48874df4568b
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/65624
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167661
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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BUG=chrome-os-partner:21798
BRANCH=peppy
TEST=Run evtest. Push every key. Verify correct key code
reported.
Change-Id: Ied22321f0a7d4da9dc82b8b5b1d21e517d8c879a
Signed-off-by: Dave Parker <dparker@chromium.org>
Original-Change-Id: Ic6e4a38608f4bc8c66f487998912a7921ddb03cb
Reviewed-on: https://chromium-review.googlesource.com/65623
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167660
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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This fixes some jank in how the power LED works when going into
suspend. Previously the power LED could turn off for up to three
seconds before flashing amber when entering suspend.
BUG=chrome-os-partner:21622
BRANCH=peppy
TEST=Manual. Enter suspend and observe that LED goes from blue
to amber without turning off first.
Change-Id: If6ee19fc13d4c09a514069d97aa9fb0b72385c40
Original-Change-Id: Ib0bf9e998d250b0731405394d3ebb50d90de7cda
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167388
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167578
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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BRANCH ONLY! Not for ToT.
Active ESD components on the keyboard scan matrix require 5V
power. These components must be powered to read the keyboard
state correctly. Check the keyboard 5mSec after powering
the 5V rail to wait for the keyboard state to settle down.
BUG=chrome-os-partner:22127
BRANCH=peppy
TEST=Manual.
Boot normally.
Boot normally with Esc + F3 + Power + another key.
Boot into recovery with Esc + F3 + Power.
Change-Id: I064cf6eb98b47c897079f145e945b4ab3ae4ef23
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/66835
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