| Commit message (Collapse) | Author | Age | Files | Lines |
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BUG=chrome-os-partner:32934
BRANCH=yuna,paine
TEST=When suspend, check PP3300_WLAN_EN & WLAN_OFF_L are high by EC
console.
Change-Id: I6e2754457c629a5b6980b86df1c3469d4d42e479
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/224644
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
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Add flash tool support for paine and yuna.
Also remove i2c stress test suppurt.
BUG=none
BRANCH=paine,yuna
TEST=Run "flash_ec --board paine" "flash_ec --board yuna" with servo
board.
Change-Id: I5a5468cffde7c2ae8c55f9d6ff1d8c6afe3b7c2e
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/223227
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
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Implement the led behavior based on customer SPEC.
BUG=chrome-os-partner:32802
BRANCH=paine
TEST=See below.
RSOC AC battery led note
<97 in amber charging
>=97 in blue near full/idle
<97 out off discharge
>=10
<10 out amber 1s on/3s off low battery
<3 out amber 1s on/1s off critical low battery
Run "ectool chargecontrol idle" make the led "2s on amber, 2s on blue".
Disconnect the battery, the led "amber 1s on/1s off".
Change-Id: Id0dc3dc0507309ee050d760fc50344ef64688d73
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/223014
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
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Implement the led behavior based on customer SPEC.
BUG=chrome-os-partner:32802
BRANCH=yuna
TEST=See below.
RSOC AC battery led note
<97 in amber charging
>=97 in blue near full/idle
<97 out off discharge
>=10
<10 out amber 1s on/3s off low battery
<3 out amber 1s on/1s off critical low battery
Run "ectool chargecontrol idle" make the led "2s on amber, 2s on blue".
Disconnect the battery, the led "amber 1s on/1s off".
Change-Id: I047a52dacf87935ea9e04be8b7fbb1695d32edb2
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/223050
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
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When charger is initialized disable the LEARN option i.e. reenable
charging on AC power
BUG=chrome-os-partner:32320
TEST=set DUT to discharge on AC and then reflash EC. Ensure that
charging begins again.
BRANCH=none
Change-Id: Icb28d25416ae8bd573f904387885ae6d86130881
Original-Change-Id: I3e83db27ab49548d5491548fa624899865c11bfb
Signed-off-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222644
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222865
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When a timing sensitive test run on a heavily loaded system, sometimes a
task runs for longer than it usually does and causes the test to fail.
All the timing requirements in the unit tests are trying to verify the
various delays in our codebase, and mostly we don't care about the time
taken by active running code (as they are very quick.) To improve the
stability of tests, let's slow down the time. To a test, it's as if the
code runs faster. If a test uses udelay() and exceeds the 10-second time
limit, we can make that single test faster by setting the time scale.
BUG=None
TEST=Repeatedly run 'make runtests'
BRANCH=None
Change-Id: Ie890e16310197a46c9c0f0f81f73a1b307d9ecdc
Original-Change-Id: I9bc5c77e0d34d04c8630d495387a751ef29c7bd5
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220717
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222870
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
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If CONFIG_HIBERNATE is explicitly undefined for a board, the EC
shouldn't hibernate when the battery is running low. Otherwise, the EC
reboots because of the lack of hibernate support, and this actually
burns more power.
BUG=chrome-os-partner:32727, chrome-os-partner:32779
TEST=Drain the battery to 2% and verify the EC is behaving.
BRANCH=None
Change-Id: Ia614590a30bf27bf1a57870ffb430b909bd75ee8
Original-Change-Id: I2f9f5fd8fb4b5be4d8da113da4ef26c062869a07
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222615
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222859
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
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separately
ectool fanduty <percent> - set all fans to <percent> duty cycle
ectool fanduty <fan> <percent> - set <fan> to <percent> duty cycle
BUG=chrome-os-partner:23803
TEST=Tested the above EC commands on Auron
BRANCH=none
Change-Id: I4864b7bd65076ec480e5657daefaf165110f3976
Original-Change-Id: I06ca1552bd8f3412f6e90245da302c9f86ab6103
Signed-off-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/221505
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222863
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ectool autofanctrl 1 - set auto fan control for fan 1
BUG=chrome-os-partner:23803
TEST=Tested the above EC command on Auron
BRANCH=none
Change-Id: I25e33b1d7c89f66d2559f3740c7ebe654a57c83d
Original-Change-Id: Idcd3690ad98d7965420f26f7cc445207fe73704d
Signed-off-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/221816
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222871
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BUG=none
TEST='ectool pwmsetfanrpm' prints correct help command
BRANCH=none
Change-Id: Ia2fc80f68c6c73d6fa7348e7f1630f70df4450be
Original-Change-Id: I6b1ecc7a581bb916563177f878f6361841e3ed90
Signed-off-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/221957
Reviewed-on: https://chromium-review.googlesource.com/222864
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ec_cmd_version_supported
BUG=none
TEST='ectool thermalget' works as expected
BRANCH=none
Change-Id: I31cd96996c1027308557285c4aa27419185dd2cd
Original-Change-Id: Ie225ef0aaeae913162e8cd6c56193dedd9f56f2f
Signed-off-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/221745
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222872
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BUG=chrome-os-partner:23803
TEST="ectool pwmgetnumfans" returns correct number of fans on Auron
BRANCH=none
Change-Id: I241d4417a9d8deeaec2d7ec40753b5f429cf5950
Original-Change-Id: I2a1930a8f0965b08558bfb3c6424c571a6149bbb
Signed-off-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220960
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222861
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separately
First case is for legacy support
ectool pwmsetfanrpm <targetrpm> - set all fans to <targetrpm>
ectool pwmsetfanrpm <fan> <targetrpm> - set <fan> to <targetrpm>
BUG=chrome-os-partner:23803
TEST=Tested the above EC commands on Auron
BRANCH=none
CQ-DEPEND=CL:220960
Change-Id: I5d63fd9cb6d24882ce2f197dc47111b9092c6853
Original-Change-Id: I8f447f53289abaa9c5cc1285f9f0921328fbf32c
Signed-off-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/221291
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222862
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BUG=none
BRANCH=none
TEST=none
Change-Id: I21ef415363f20369dae0f202cd84e9384aeecfd4
Original-Change-Id: Iff09a24064d4245d2660dd307084cd701d03676b
Signed-off-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/221202
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222857
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The default DMA interrupt handlers are somewhat slow and not really flexible,
allow to override them in board if needed.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=none
Change-Id: Id0ba824a15f132b57c1e38ed58a33fbed43e5b8c
Original-Change-Id: I909bfab265ccaa4f3b61d0a2a69bf7dfc0414be2
Reviewed-on: https://chromium-review.googlesource.com/215671
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222848
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
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If there is any delay between AC status and the battery charge status
it is possible for the power_manager to read the battery state when
the AC status event is sent and still see that the battery is not
yet charging. This can cause lag in the UI battery icon because the
AP is not notified when the battery charge state changes.
In order for the host to be able to differentiate the dynamic battery
state changing (re-read ACPI _BST by sending Notify 0x80) from the
static battery info (re-read ACPI _BIX/_BIF by sending Notify 0x81)
it needs a separate host event.
BUG=chrome-os-partner:32196
BRANCH=samus
TEST=Test AC instertion and removal while watching state on the host
to ensure that an event is sent to the host which triggers power
manager to re-read the battery status and notice that the charge
state has changed if there is any delay after the AC status event:
watch -n 0.1 "cat /sys/class/power_supply/AC/online;
cat /sys/class/power_supply/BAT0/status;
tail -10 /var/log/power_manager/powerd.LATEST"
Change-Id: I304a326053a0b7b53a1364138bb6c5eccbf00957
Original-Change-Id: I18ce70719dc231c43c474cefad2068f949675a2b
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220257
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222849
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
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Previously we had a restriction that only one i2c bus could use the
automatic wedge detect and unwedge functionality. This removes that
restriction, although it uses a mutex to make sure only one bus is
being unwedged at any given time.
BUG=chrome-os-partner:26485
BRANCH=samus
TEST=make -j buildall
Change-Id: Ie34d9ba569b27e6d588020b3a02da57fe4d1515e
Original-Change-Id: I8ff238fb8a9e9d2f5bc57a2b0a05e2b231024772
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220466
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Commit-Queue: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222856
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
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2048-bit RSA public key cryptography signature verification code
which uses a pre-processed key for computation.
it is based on the code from vboot :
platform/vboot_reference/firmware/2lib/2rsa.c
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:28336
TEST=using following CL, on Zinger, verify RW firmware signature.
Change-Id: Idb7fa00ae3648273c4e0a71ad442f51a844adc13
Original-Change-Id: I681a29144eb805cd5758aa6efe697ce2f656a298
Reviewed-on: https://chromium-review.googlesource.com/220186
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222847
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
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Yuna use newer keyboard reset ic. The keyboard column 2 should be
inverted.
BUG=chrome-os-partner:32708
BRANCH=yuna
TEST=flash the ec, the keys "3, e, d, c , ..." work in ChromeOS.
Change-Id: I8a476bebae80c921cb4bd4879757650057e40d78
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/222464
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
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Copy from auron. Only Compile done and boot up.
BUG=none
BRANCH=paine
TEST="make BOARD=paine"
Change-Id: I1f347016e2752b4115190ee63c7f7aa5d760c516
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/221697
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
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Copy from auron. Only Compile done and boot up.
BUG=none
BRANCH=yuna
TEST="make BOARD=yuna"
Change-Id: Ife7a22af652724e0c80f688331d877bd9f6184af
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/221657
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
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This diff allows the user to send small programs to the EC and
gain control of the lightbar. Right now, this is only exposed
through ectool, and sysfs support will come later.
To send a program to the EC, use
$ ectool lightbar program /path/to/program.bin
and then start running the program with
$ ectool lightbar seq program
BUG=None
BRANCH=ToT
TEST=Using the above steps with hand-assembled programs.
Checked that infinite bytecode loops do not hang the EC.
Checked that bad opcodes exit with an error.
Stress tested pushing programs and changing sequences.
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Change-Id: I635fb041a5dc5c403f7c26fb9a41b5563be9b6b7
Reviewed-on: https://chromium-review.googlesource.com/219558
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This removes the pulsing blue colors in S0.
BUG=chrome-os-partner:31546
BRANCH=ToT
TEST=manual
Change-Id: Ib756b93bb51cb7b618958e5b1d270ba9cd1eef22
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219417
Reviewed-by: Vic Yang <victoryang@chromium.org>
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This code is used to find the orientation of the sensor.
Given sensor are aligned with the edges of the device,
it is not too dificult to find manually.
BRANCH=ToT
BUG=None
TEST=Check ACCEL_CALIBRATE is not used anymore.
Check 'make buildall -j' works.
Change-Id: I81ffcb4f6b01c530ef16baf13113a5942f615092
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219527
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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RX DMA seems to get misaligned sometimes yielding to extra bytes before the
first byte on the wire.
in_msg=[00 00 00 03 f4 09 00 00 ...]
^ real first byte
To fix this we want to reset and reinit the SPI peripheral after every packet,
in the same place where setup_for_transaction() is called.
This bug applies to the STM32F0 line but resetting the peripheral on other STM32
ECs should not break anything.
BUG=chrome-os-partner:31390
TEST=On STM32F0:
ap# cd /sys/class/power_supply/sbs-20-000b/; while true; do grep "" * >/dev/null 2>&1; done
You should not see "SPI rx bad data" with in_msg packets that have extra bytes
in the beggining. Wait though, it might take up to a few minutes for stuff to
break.
BRANCH=None
Change-Id: If9ab93c5c9040a2c7bda33d7cc990603f1121f3f
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/217527
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Add hibernate functionality for stm32f0, and enable wake pins
for samus PD MCU. Samus wake pins are VBUS present on either port.
BUG=chrome-os-partner:31226
BRANCH=none
TEST=load onto samus PD. test hibernate console command:
> hibernate 0 500000
Hibernating for 0.500000 s
(5 seconds later)
--- UART initialized after reboot ---
[Reset cause: hibernate]
...
> hibernate
Hibernating until wake pin asserted.
(plug in AC)
--- UART initialized after reboot ---
[Reset cause: hibernate]
Change-Id: Ib86f2677721df29e7bf6975e239de79c25a38795
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219105
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This task echo's all bytes from any console stream back to all
other console streams. It is a test case for the new
multi-USART and USB stream drivers.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Manual testing of cutting and pasting large blocks of text
into the echo'ed usarts, and verifying no dropped characters.
Change-Id: I408c77e40931d3a473657326f9772e71a7ae8a60
Reviewed-on: https://chromium-review.googlesource.com/213178
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
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STM32F and STM32F0 series require an MOE bit to be set to enable PWM
output. In addition, require that the PWM alternate function # be
manually specified for STM32F0 -- there seems to be no logical mapping
here, unlike other STM32* parts.
BUG=chrome-os-partner:32089
TEST=Manual on samus-pd. Set ILIM PWM output to 50% duty cycle with pwm
driver functions, probe and verify avg. 1.62V on pin.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Icb13a153fa3eee52be938d76a6c980fe6fd2bb3e
Reviewed-on: https://chromium-review.googlesource.com/219570
Reviewed-by: Alexandru Stan <amstan@chromium.org>
Tested-by: Alexandru Stan <amstan@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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The 'power' console command is entirely redundant:
- 'power on' can be replaced by 'powerbtn'.
- 'power off' can be replaced by 'apshutdown'.
- 'power' can be replaced by 'powerinfo'.
Let's remove this command to save flash space.
BUG=chrome-os-partner:32203
TEST=Build Ryu.
BRANCH=None
Change-Id: Ib33804c1748dd44bbb89277fed938b50f0f946c4
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219491
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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The warning should only warn if there's an actual danger(in order to give a
clue to developers that something might be amiss). Messages like "Overriding
SPI1_NSS with SPI1_NSS on EXTI4" are just spammy. This patch makes it so it only
warns if the interrupt is different.
BUG=chrome-os-partner:31390
TEST=spam gpio_enable_interrupt(GPIO_SPI1_NSS); in a bunch of places (like
spi_event), it should not complain about the interrupt being set to the same
thing before. Whereas before it was so spammy it did not even have time to reply
to SPI.
BRANCH=None
Change-Id: I786a821eb8167e3568d0be371c4de26bb124431a
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/218563
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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'powerindebug' is only used when there is a problem with power
sequencing. 'taskready' is rarely used and the same info can be
retrieved by 'taskinfo'.
Put both behind config flags and disable 'taskready' by default. Also
disable 'powerindebug' for Ryu.
BUG=chrome-os-partner:32203
TEST=Build Ryu and check flash space used.
BRANCH=None
Change-Id: I753a1f5411d6e840a80aba03afc94f9640d381a8
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219490
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Just after a bad data error the EC will print the packet(pretty much the whole thing):
in_msg=[02 00 0f 03 f4 09 00 00 ]
I found it very helpful when debugging SPI TX/RX to know what the EC sees.
BUG=chrome-os-partner:31390
TEST=Load spidev and send the EC bytes manually(malformed packets)
BRANCH=None
Change-Id: I037ab909076dc454379040e2e927dc6a0b5c5ea9
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/218442
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Fix accel calibration bug from refactoring. The motion_get_accel_lid()
function used by calibrate routine to get lid accel data was actually
returning base accel data.
BUG=none
BRANCH=none
TEST=load onto samus, run accel calibration routine.
Change-Id: I095381390267aa6ea3b3a74311c27f30d70e9c81
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219520
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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Not every chip that we use has FPU. To make it easier to enable lightbar
on chips other than LM4, let's remove floating point usage in lightbar
code. Instead, scale those numbers by a factor of 10000.
BUG=chrome-os-partner:32203
TEST=Run on Samus. Visually check lightbar.
BRANCH=None
Change-Id: I88b12bb66b5c586f2e14135069bd97d6b56832a1
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219246
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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When a cable is connected, set USBC_POLARITY to the right polarity. This
is done in a different way than how we do this on other boards because
we only want to control polarity automatically on cable connection.
BUG=chrome-os-partner:32163
TEST=Flip the cable, check USBC_POLARITY changes.
BRANCH=None
Change-Id: I903123b8fd729e8c913014b83812d20328600f8e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219291
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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When 5v/12v/20v buttons are pressed, plankton first switchs to source
role, set the requested source cap, and then perform a soft reset.
However, if plankton was sink and just switched to source, the port
partner might not have switched to sink and this leaves the CC line in a
state where communication is not possible. The subsequent soft reset
then fails. If we are not already sourcing power, we actually don't need
a soft reset after changing source cap.
BUG=chrome-os-partner:32163
TEST=Switch from sink to source. Doesn't see "soft reset" in console.
TEST=Switch from 5V to 12V. See "soft reset".
BRANCH=None
Change-Id: Ia4b834c2e7dc1324b9143c46a72938845499e2fb
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219004
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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BRANCH=none
BUG=none
TEST=compiles
Change-Id: Ic4c0631737885ca66ac4d8b826d5447363c820bb
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/218384
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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CL to allow hoho to receive initial USB PD communication (source
capabilities payload).
BRANCH=none
BUG=chrome-os-partner:31192
TEST=manual,
When attaching hoho to fruitpie and configured via
'pd dualrole source'
I see on hoho side:
--- UART initialized after reboot ---
[Reset cause: reset-pin power-on]
[Image: RO, hoho_v1.1.2213-2bf6a29-dirty 2014-09-15 12:10:22 tbroch@brisket.mtv.corp.google.com]
[0.000466 Inits done]
C0 st2
Console is enabled; type HELP for help.
> [0.250678 USB PD initialized]
C0 st3
[0.264629 PD TMOUT RX 1/1]
RX ERR (-1)
Request [1] 5V 3000mA
C0 st4
C0 st5
C0 st6
> pd 0 state
Port C0, Enabled - Role: SNK Polarity: CC2 State: SNK_READY
Change-Id: Ic5871946425f0ff12d717fbbbbb9e81c6b67cc6f
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/217977
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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On power-on reset, the USB hub might get stuck in a locked state due to
a race condition in hardware. Let's reset the hub after 0.5 seconds to
make sure this doesn't happen.
BUG=chrome-os-partner:32163
TEST=Power on the board. Measure the reset signal.
BRANCH=None
Change-Id: I0f89883c5db7c5376f3612da1615ba4f86b5efa6
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219199
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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This command resets the USB hub through the IO expander.
BUG=None
TEST=Reset the hub on Plankton.
BRANCH=None
Change-Id: Ia77a1e326adc6aba65438534158a4c461479727a
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/218758
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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This causes the loss of CMOS stored flags like dev_boot_usb.
BUG=chrome-os-partner:30832
BRANCH=none
TEST=pass suite:faft_bios on samus
Change-Id: I5e168eaf496ddebb5b409a42b6d8b1a05693db40
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219215
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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This stream driver works like the USART stream driver
but connects to two bulk USB endpoints.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I9cbd2e54a811d3e32c68a820f7ab5de693c29569
Reviewed-on: https://chromium-review.googlesource.com/216002
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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During the communication init, ectool will probe max request and
response packet size from ec and set packet size accordind to that.
However, with older kernel's ec driver, the buffer allocated by
kernel is not large enough and this will cause kernel bug.
BUG=chrome-os-partner:31989
TEST=ectool version runs fine on blaze
BRANCH=ToT
Change-Id: I499a5305c8fa8b0fd6f3be8554c9cf066b7e0828
Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219114
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
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Enable low power idle for samus_pd. Low power idle is only
entered when no USB PD device is connected.
BUG=chrome-os-partner:31226
BRANCH=none
TEST=load onto samus_pd, use idlestats command to verify
that we are going into deep sleep (STOP mode). Run 30 min.
and verify no watchdog reboots or anything out of ordinary.
Also, verify that host commands from EC work when going into
deep sleep by sending host commands on the EC console with
pdcmd 0 0.
Change-Id: I3e2e04e6c4c0a84e291286dbed90945847e0dfdd
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/218957
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This driver can be used to access multiple usarts using an abstract
stream interface. The stream interface can also be used in drivers
for the host interface and USB console interface, providing a
consistent API across all character stream style IO.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: Icf567f0b0fa4eb0e9ad4cdb0be8edc31c937a7de
Reviewed-on: https://chromium-review.googlesource.com/209671
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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Enable fast charging with profile designed for ATL cells
that will be used in EVT.
BUG=chrome-os-partner:23776
BRANCH=none
TEST=Took detailed charging/discharging data and verified
that the actual profile matches the desired profile and that
the fast charging profile is actually faster than the
standard. See bug report for more info and data collected.
Change-Id: Ic11ab89e48afb73987b8013abf8b0564e1138156
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/212980
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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Add low power idle task to stm32f0. This can be enabled
by defining CONFIG_LOW_POWER_IDLE. This low power idle
uses STOP mode to conserve power.
BUG=chrome-os-partner:31226, chrome-os-partner:28335
BRANCH=none
TEST=add #define CONFIG_LOW_POWER_IDLE to samus and use
idlestats console command to verify using deep sleep.
also #define CONFIG_FORCE_CONSOLE_RESUME and make sure
serial console works without problems when going into
deep sleep.
Change-Id: I76b0ceb8587a139faa74353d3d8efb4f689fc669
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/218956
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Bug fix. Recently changed to use HSI 8MHz clock as clock source
for console UART, but the clock register was set incorrectly
for the case that the console UART is UART2.
BUG=chrome-os-partner:32170
BRANCH=none
TEST=Tested on fruitpie which is using UART2 for console.
Verified that console works.
Change-Id: Ied629eb3828e5fab911acb6a8e5f4087563ddb32
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219312
Reviewed-by: Vic Yang <victoryang@chromium.org>
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Older versions of flash VDM supported a 'rw_hash' command that has
since been deprecated in favor of 'info' command. This CL makes
flash_pd.py try either in order to determine whether the pd flash
erase was successful.
BRANCH=none
BUG=chrome-os-partner:28330
TEST=manual, succesfully run on zinger with only 'info' command support
util/flash_pd.py -m 1 zinger_ec.RW.flat
2014-09-18 14:35:39,305 - root - INFO - Current PD FW version is zinger_v1.1.2192-5cd
2014-09-18 14:35:39,305 - root - INFO - Flashing 11532 bytes
2014-09-18 14:35:45,779 - root - INFO - Successfully erased flash.
2014-09-18 14:35:45,890 - root - INFO - Chunk 0 of 481 done.
...
2014-09-18 14:36:39,133 - root - INFO - Chunk 480 of 481 done.
2014-09-18 14:36:46,072 - root - INFO - Flashing DONE.
2014-09-18 14:36:46,072 - root - INFO - SHA-1: f6b296ba d474edc4 2e917ad0 33cd16cb 0f51a3fc
2014-09-18 14:36:46,090 - root - INFO - New PD FW version is zinger_v1.1.2226-bea
Change-Id: I32f8b06fa546aa99c8290b6b73faa9b8df05e4fb
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/218878
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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When waking up from sleep, the real CPU_CLOCK is a lie for a moment(since we
cannot switch to the real clock during the first character) so the first
character will be corrupted.
The UART clock is now sourced from HSI(8MHz) which is available from the first
moment after the cpu wakes up from sleep.
BUG=None
TEST=Console should work.
When waking up(not implemented yet) it will also not lose a character
BRANCH=None
Change-Id: Ia12ed0634290f3edadfe3471b311759c3176260e
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/218728
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
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