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* board/snappy: Remove magnetometerfirmware-reef-9042.BGwendal Grignou2022-09-192-42/+1
| | | | | | | | | | | | | To pass CVS test and prevent RVCVXCheckTestActivity to be checked. BUG=b:237639683 BRANCH=reef TEST=compile but no link on ToT. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I2ae9e10b3af34e2c3e2e175314d4d976516ef412 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3894377 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Clear OWNERS for factory/firmware branchBrian Norris2021-09-112-10/+1
| | | | | | | | | | | | BUG=none TEST=none Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155233 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Owners-Override: Jora Jacobi <jora@google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* npcx: disable the selection of JTAG0 signals due to strapCHLin2020-12-1110-196/+413
| | | | | | | | | | | | | | | | | | | | | | | | | | | It was observed that pressing recovery key combination + the other keys, some keys on the keyboard become invalid after system reboots. (see b:129908668 for more detail.) It is because the hardware strap pin for JTAG0 signals is unintentionally triggered. This CL reverts the selection of JTAG signals and set them back to keyboard scan function at system initialization. The revert applies to all real platforms except npcx_evbs. BRANCH=none BUG=b:129908668 TEST=pass "make buildall" TEST=Press the specific key combination, after the system reboots, the keyboard function works normally. On npcx EVBs, the JTAG0 is still functional. Change-Id: I7ede1ea4609466fea50a97b1f60308e4cdfd4544 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/1575887 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1586718 Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* cleanup: formatting debug messageJett Rink2020-12-111-4/+3
| | | | | | | | | | | | | | | | | Adding newline to separate messages better BRANCH=none TEST=none BUG=none Change-Id: Ie454dfc532310c480f350c9b15280bf96634b322 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/897909 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2585071 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* npcx: bypasses for SHM reading fail via eSPI and CSAE impact efficiencyMulin Chao2020-12-112-12/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In eSPI systems, when the host performs a data read from the Shared Memory space, the returned data may be corrupted. This is a result of the Core-to-Host access enable bit being toggled (by toggling CSAE bit in SIBCTRL register) during an eSPI transaction. The bypass for this symptom is to set CSAE bit to 1 during initialization and remove the toggling of CSAE bit from other EC firmware code. But keeping the CSAE bit at 1 forever also impacts the eSPI performance a lots. When the core clock is stalled by sleep, deep sleep or wfi instruction, the eSPI Peripheral Channel transaction is stalled if this bit is set. The bypass for this symptom is to wake up the core by eSPI peripheral channel transaction and let eSPI module handle the remaining packet. BRANCH=eve BUG=b:64730183 TEST=No build errors for make buildall. Flash poppy ec image, make sure it can boot to OS. Run "ectool version" over 100000 times, no error occurs. Use following script "count=0; while :; do echo "--- iteration --- $count"; time flashrom -p ec -r ec.bin; sleep 5; count=$((${count}+1)); done" to test eSPI performances over 1000 times. No errors occur and all tests' efficiency are the same as removing CSAE bypass. Change-Id: I1b9051c5a3d368a5917882d9d1c3bb00481a53ad Signed-off-by: CHLin <CHLIN56@nuvoton.com> Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/620301 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2585070 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* npcx: lpc: fixed bug that ec gets stuck in lpc_sib_wait_hostxx routines.Mulin Chao2020-12-113-4/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | If an ITIM32 timeout event occurred during lpc_sib_wait_host_read_done() and lpc_sib_wait_host_write_done() routines, in rare case, ec might have a chance to gets stuck since ec's interrupts are disabled when CSWR/CSRD bits are high forever. (Normally, CSWR/CSRD bits won't be always high. These bits are high forever also means something wrong on LPC/eSPI bus.) In order to prevent this situation, the CL checks TO_STS bit of ITCTS in these routines. If this bit is set, restoring ITIM32 preload counter value to maximum value and processing overflow will be done by force_time(). BRANCH=eve,fizz,poppy BUG=b:76182199 TEST=No build errors for npcx series. Passed test command of CL 979389 on npcx_evb. No symptom occurred during warm reset stress test on soraka. Change-Id: Ic645f7c5a2a1e49a3c1f3d7e089dd66b4bb75ac6 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/979874 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2585069 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* lpc: Removing unnecessary register writesJett Rink2020-12-111-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | According to Nuvoton datasheet, when SHM windows are in IO mode, only the bottom 16-bits of registers @ offset xF4 and xF8 are used. "This register is ignored when WRAM1_IO bit in WIN_CFG register is set to 1 (LPC / eSPI Peripheral Channel I/O access with 16-bit address). This register is set to its default value by Host Domain reset." BRANCH=none BUG=none TEST=boot grunt and verify host communication still works. Change-Id: I3e48ea1b09355eaf6967b9f7522bc3d35459b76b Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/919006 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2585068 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* lpc: Prevent watchdog reset caused by KBC IBF interrupt on chromebox.Mulin Chao2020-12-111-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since there is no KEYPROTO task on chromebox such as fizz and sion, lpc driver doesn't declare KBC IBF/OBE ISRs for these events. If host put data in ec's KBC input buffer unexpectedly, exception_panic() will be executed in default_handler. Then we will see ec print "=== PROCESS EXCEPTION: 29 ====== xPSR: 01000000 ===" message without any hard fault and reset. This CL fixed this symptom by turning off KBC if there is no KEYPROTO task. We also run suspend stress test on fizz and no watchdog reset symptom occurred. BRANCH=none BUG=b:72353876 TEST=No build errors. Run suspend stress test on fizz and no watchdog reset occurred. Change-Id: I4744fac0d6fb2628849c728d4860509434fa2cbb Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/899706 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2585067 Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* cleanup: Remove jtag_pre_init()Shawn Nematbakhsh2020-12-1133-323/+148
| | | | | | | | | | | | | | | | | | | Use our newly-created chip_pre_init() for doing JTAG initialization. BUG=chromium:747629 BRANCH=None TEST=`make buildall -j` Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ic5771895a214a9f1aa9bd289eef576f52adf973f Reviewed-on: https://chromium-review.googlesource.com/629676 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2585066 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* host_event: Move host events and mask handling into common codeFurquan Shaikh2020-12-119-374/+172
| | | | | | | | | | | | | | | | | | | | | | | | Instead of duplicating the handling of host events and host event masks in chip lpc drivers, add routines in common code to provide basic functions like setting/getting of masks, setting/getting of events and handling of masks transitions across sysjump. BUG=None BRANCH=None TEST=make -j buildall. Verified following: 1. Event masks are correctly retained across sysjumps. 2. Wake from S3 works fine. 3. Wake from S0ix works fine. 4. SCI generated correctly. Change-Id: Ie409f91b12788e4b902b2627e31ba5ce40ff1d27 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/707771 Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2585065 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: mag_cal: Fix debug printfGwendal Grignou2020-02-281-2/+2
| | | | | | | | | | | | | | | Fix types and unit: - eigen_pass is a boolean - print the norm of the vector in uT. BUG=none TEST=compile BRANCH=reef Change-Id: Ia46d9dca1952e5c6c727278daf2863091a755363 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2034673 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: mag_cal: Trigger online calibration with more sampleGwendal Grignou2020-02-281-2/+2
| | | | | | | | | | | | | | | | | | | | For the oneline calibration to work, sensor data must be collected while the device is in different positions. The current implementation starts calibration after 25 samples/1 second. It means the device should done a figure 8 - or close to it - in that lapse of time. This is fine for phones or small devices, but not for heavy convertible. Increase the batch size to at least 50 samples or 2 seconds of collection. BUG=b:144027014 BRANCH=reef TEST=Pass RVCVXCheckTestActivity verifier test. Change-Id: I78d1b943c23eaa9a29831ad4344c8be36ea00b79 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2034672
* driver: bmm150: Fix commentGwendal Grignou2020-02-281-1/+1
| | | | | | | | | | | | | Fix cut and paste error. BRANCH=reef BUG=none TEST=compile Change-Id: I60cc7bb7b08491927a7ac03c769dda03f8765b81 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2034671 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Reef: Not support charge_profile_override for Panasonic/Sony batteryDavid Huang2019-08-131-0/+5
| | | | | | | | | | | | | | | Panasonic and Sony batteries disable charge_profile_override() to prevent OVP on cell unbalance battery. BUG=b:137921258 BRANCH=reef TEST=Check charger's charge voltage/current is same as battery desired voltage/current. Change-Id: I099320d755fbc08e6c79d810a0a6c88e2cb6fee8 Signed-off-by: David Huang <David.Huang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1741786 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* tablet-mode: Disable tablet mode in recovery bootDaisuke Nojiri2019-07-303-7/+44
| | | | | | | | | | | | | | | | | | | | | | | | | In recovery boot, keyboard could be unintentionally disabled due to unstable accels, which are not calibrated. This patch disables tablet mode in recovery boot. We get the same effect if motion sensors or a motion sense task are disabled in RO. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:984086,b/137251616 BRANCH=none TEST=buildall Change-Id: Idcf53ad119edbd8ff9362523ec7a72f438ae4401 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1696914 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1726333 Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* ec/common: Introduce IS_ENABLED to check config optionsRaul E Rangel2019-07-301-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is copied from coreboot with added support for empty defines. We should favor using this macro instead of using #ifdef. The macro will evaluate to 0 if the option is not defined. This allows all the code to be compiled and then the optimizer will remove the sections of code that won't ever run. This way we don't end up with #ifdef sections with invalid syntax because no one ever tests that specific permutation. e.g., if (IS_ENABLED(CONFIG_USBC_SS_MUX)) { ... } There are currently spots where #ifdefs are nested 3 levels deep. This makes it very hard to follow the code. BUG=none TEST=Added some code that uses the macro and verified it executes when the config value is defined, and doesn't when it's not. Change-Id: I796b899f7cbbd3067ea3a4d52527d980c68935c9 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1553573 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 46e28e28c2973db09dd9a7a2c14db3cd2609905a) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1726332 Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* bmi160: Fix ODR to REG when rate is less than 100HzGwendal Grignou2019-05-081-8/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The calculation was wrong and always returned the next value. We were lucky that we always ask to round up, so the frequencies were rounded up from the get go. BUG=b:120942904 BRANCH=none TEST=Test with several ODR for correctness: cout << "10:" << BMI160_ODR_TO_REG(10000) << ":" << BMI160_REG_TO_ODR(BMI160_ODR_TO_REG(10000)) << "\n" << "29:" << BMI160_ODR_TO_REG(29000) << ":" << BMI160_REG_TO_ODR(BMI160_ODR_TO_REG(29000)) << "\n" << "59:" << BMI160_ODR_TO_REG(59000) << ":" << BMI160_REG_TO_ODR(BMI160_ODR_TO_REG(59000)) << "\n" << "99:" << BMI160_ODR_TO_REG(99000) << ":" << BMI160_REG_TO_ODR(BMI160_ODR_TO_REG(99000)) << "\n" << "109:" << BMI160_ODR_TO_REG(109000) << ":" << BMI160_REG_TO_ODR(BMI160_ODR_TO_REG(109000)) << "\n" << "209:" << BMI160_ODR_TO_REG(209000) << ":" << BMI160_REG_TO_ODR(BMI160_ODR_TO_REG(209000)) << "\n" ; Returns: 10:4:6250 29:6:25000 59:7:50000 99:7:50000 109:8:100000 209:9:200000 Change-Id: I898d1077af78ab1d0e65ac0e8f7714a2a3b042b3 Reviewed-on: https://chromium-review.googlesource.com/1535160 Reviewed-by: Yilun Lin <yllin@chromium.org> (cherry picked from commit 0e99e97634135c9d4e6b60dcd6837bb76d91acf7) Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1597797 Reviewed-by: Enrico Granata <egranata@chromium.org>
* bmm150: lower max frequency to match a frequency supported by BMI160Gwendal Grignou2019-05-081-2/+14
| | | | | | | | | | | | | | | | | | | | | | Be sure the frequency we report does not need to be rounded up by BMI160 when BMM150 is behind BMI160. For instance, if we set 29Hz as maximum frequency, 29Hz will be rounded up to 50Hz (BMI160 samples at its own recognized frequency). At that speed, the BMM150 will lock up. BUG=b:120942904 BRANCH=none TEST=On eve with magnetometer check the maximum frequency reported by the magnetometer is 25Hz. Check the magnetometer is working with 'ectool motionsense 3' Change-Id: I7025fe8a400e050907af490784521295d987051a Reviewed-on: https://chromium-review.googlesource.com/1535161 Reviewed-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Yilun Lin <yllin@chromium.org> (cherry picked from commit e726fe4b2c1ea392ed059c4dbdedec253605cd7f) Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1597796
* FIXUP: sensor: Adjust max_frequency based on EC performanceGwendal Grignou2019-03-291-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Remove unnecessary code, sensor maximal ODR is guaranteed to be smaller than EC support maximial ODR. BUG=b:118205424,b:118851581,chromium:615059 BRANCH=none TEST=Check the limits have not change and an error is reported when frequency is set to high in sysfs. Check cheets_CTS_P.9.0_r6.x86.CtsSensorTestCases pass with image R74-11839.3.0. Change only BMI160 driver. Conflicts: driver/accel_lis2dh.c driver/accelgyro_lsm6dsm.c Change-Id: Ia10bf2cc58c5609c4fded16a0bff3018916a2346 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1390937 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> (cherry picked from commit f3931a6cd7a0c69e64caf87aa6ff3d9a4fdabf50) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1529141 Reviewed-by: Enrico Granata <egranata@chromium.org>
* sensor: Adjust max_frequency based on EC performanceGwendal Grignou2019-03-2913-20/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Put in max_frequency a value that the sensor AND the EC support. BRANCH=none BUG=b:118205424,b:118851581,chromium:615059 TEST=Compile. Check all max sensors frequencies have been altered with: for i in $(grep -rh max_frequency board | cut -d '=' -f 2 | sort | \ uniq | grep FREQ | sed 's/FREQ.*//') ; do echo -n $i ; git show | grep -q $i || break; echo check done Check on nocturne accel max frequency is still correct. Conflicts: driver/accel_bma2x2.h driver/accel_lis2dh.h driver/accelgyro_bmi160.h driver/accelgyro_lsm6dsm.h driver/als_opt3001.h driver/als_si114x.h driver/mag_lis2mdl.h include/config.h Change-Id: I848396d9f150a2e94d430a8feeafc1087a6bf2c3 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1352063 Commit-Ready: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Jesse Schettler <jschettler@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> (cherry picked from commit 77b306b340ca428ba6785add204ccdce82185274) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1529140 Reviewed-by: Enrico Granata <egranata@chromium.org>
* poppy: Lower sensor max ODRGwendal Grignou2019-03-291-2/+9
| | | | | | | | | | | | | | | | | | | | | | | EC seems to miss sample while providing sensor data at 200Hz. Limit sensors ODR to 100Hz. BUG=b:67112751 BRANCH=none TEST=compile, tbd Conflicts: board/poppy/board.h include/config.h Change-Id: Ic324c3d989854ae8b7f6b27bf6338266ce01ceda Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/753434 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit c5c061f9b5707205bb32abdac15dc14a9af14800) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1529139 Reviewed-by: Enrico Granata <egranata@chromium.org>
* driver: accel: Prevent ODR from crashing the ECGwendal Grignou2019-03-291-23/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | For accelerometers which are interrupt driven, setting ODR too high may exhaust the EC and trigger the watchdog timer. Use config variable to verify the ODR requested is not too big. Return an error when setting unsupported parameters. BUG=b:112672627 BRANCH=nocturne,eve TEST=Without this change, ectool motionsense odr 0 500000 crashes the EC Now, it returns EC result 3 (INVALID_PARAM) Change only BMI160 driver. Conflicts: driver/accel_lis2dh.c driver/accelgyro_lsm6dsm.c Change-Id: I64a4e522dcad450d619a7fc48a1330479f1cf81f Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200068 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit f932679e653a4b62fbe1fb28fba8a20d7a7e38c2) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1529138 Reviewed-by: Enrico Granata <egranata@chromium.org>
* driver: BMM150: Set max frequency based on repetitions settingGwendal Grignou2019-03-293-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The compass uses oversampling to produce accurate values. MAX_ODR is functions of the repetitions setting. 80Hz is too high, calculate the frequency based on preset setting. Currently, we use 'SPECIAL' that was calculated for Ryu. BUG=b:68394559 BRANCH=eve,reef,poppy TEST=Check with ectool motionsense info 3 the frequency is around 30Hz. Before: Min Frequency: 781 mHz Max Frequency: 80000 mHz After: Min Frequency: 781 mHz Max Frequency: 29579 mHz Check with AIDA64 the compass is not stuck and return changing values. Fixup of CL/570482 Do not apply to non-existent board. Conflicts: board/nautilus/board.c board/poppy/board.c Change-Id: Idcfed1418f59e755e5647d018351c6a7397ffe1b Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/742146 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 8a2d0a5de6fc03eeea79a65469b361ae0ca694c9) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1529137 Reviewed-by: Enrico Granata <egranata@chromium.org>
* driver: sensor: tune MAX_FREQGwendal Grignou2019-03-292-3/+3
| | | | | | | | | | | | | | | | | | | | | | | Reduce maximum frequency of BMM150 compass to 80Hz, 800Hz is a typo. Reduce SI1141 maximum frequency to 50Hz: 100Hz is too high when polling mode is used. Fix up of CL:482703 BRANCH=eve, glados BUG=chromium:615059 TEST=On eve, check CTS test android.hardware.cts.SensorBatchingTests#testMagneticField_fastest_flush passes. Observed that dumpsys sensorservice returns compass maxRate at 80Hz instead of 200Hz. Change-Id: If4e688ab59aa53c402d34714b6bb33ccd4a4ab96 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/570482 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 9fad1adc800cd950e4bd3f292f83186eb0e4f272) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1529136 Reviewed-by: Enrico Granata <egranata@chromium.org>
* driver: bm160: Fix minimal gyro frequencyGwendal Grignou2019-03-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | Was set in Hz unit instead of mHz. The minimal frequency of the gyroscope is 25Hz. By setting it at 25mHz, we make believe that the gyro was also supporting 5Hz or 10Hz: the test would complain when instead the samples came with a 25Hz. Fix up of cl/482703 BUG=b:65000611 TEST=compile BRANCH=caroline,eve,twinkie Change-Id: I162d0d2e9b545af82698d8d484875761f426efe4 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/674003 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit ad918d6c5668eea2de7e051bc69565094b7094a2) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1529135 Reviewed-by: Enrico Granata <egranata@chromium.org>
* common: sensors: add extra sensor attributesNick Vaccaro2019-03-2926-11/+200
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds min_frequency and max_frequency to struct motion_sensor_t. New attributes min_frequency and max_frequency are now returned in ectool's MOTIONSENSE_CMD_INFO response. Incremented ectool's MOTIONSENSE_CMD_INFO version to version 3. Add constants for MIN_FREQUENCY and MAX_FREQUENCY to each sensor's header file. BUG=chromium:615059,b:123039234 BRANCH=reef TEST=build/boot and verify MOTIONSENSE_CMD_INFO response on kevin, make buildall -j passes. TEST=Pass CTS P test. Conflicts: board/eve/board.c board/kahlee/board.c board/poppy/board.c board/reef/board.c board/rowan/board.c driver/als_opt3001.h driver/als_si114x.h include/config.h Only change boards present in the branch. Do not upgrade opt3001, not using motion sense task yet. Change-Id: I66db9715c122ef6bb4665ad5d086a9ecc9c7c93a Signed-off-by: Nick Vaccaro <nvaccaro@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/482703 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 9a0d0aa70d483be79c71a459dfd5f5e89da2638d) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1529134 Tested-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Enrico Granata <egranata@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
* Snappy: enable back discharging-on-ac if system is off with fully charged ↵Devin Lu2018-12-201-3/+4
| | | | | | | | | | | | | | | | | | | | | battery The CL:1011594 disabled discharging-on-ac if system is off will cause the erp certification failed in S5 and will cause audible noise back from system is off. This patch adds enabling back discharging-on-ac if system is off with fully charged battery. BUG=b:74586187, b:121192771 BRANCH=reef TEST=make sure system discharging-on-ac if system is off with fully charged battery Change-Id: I731c583047782baf1aa99d2658307ac639a58282 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/1383672 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Snappy: Fix build error for extpower_is_inrush_protection_neededDaisuke Nojiri2018-05-101-1/+1
| | | | | | | | | | | | | | | | | | | This patch fixes compilation error caused by extpwr_is_inrush_protection_needed. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:74586187 BRANCH=reef TEST=make BOARD=snappy Change-Id: I59e7a31e79d934fa5bb9c4c0faaaadbbf6cd8479 Reviewed-on: https://chromium-review.googlesource.com/1053687 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Saurabh Madan <ssmadan@chromium.org> Commit-Queue: Saurabh Madan <ssmadan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Trybot-Ready: Saurabh Madan <ssmadan@chromium.org>
* Snappy: Avoid Discharge-on-AC if system boots on ACDaisuke Nojiri2018-05-054-2/+29
| | | | | | | | | | | | | | | | | | | Inrush current doesn't happen when the system boots with an AC charger. Enabling battery learning mode to avoid inrush current might be harmful when the system is booting on a weak battery because it can cause brownout. This patch checks AC presence at start-up. If an AC adapter is plugged, it disables inrush current protection. BUG=b:74586187 BRANCH=none TEST=Boot Snappy. Verify discharge_on_ac doesn't happen on boot. Verify discharge_on_ac triggers after AC charger is unplugged/replugged. Change-Id: I5a1aa1b31b7e0419130468aab6450600a6ea16b3 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1033173 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Snappy: Don't discharge on AC if system is offDaisuke Nojiri2018-05-052-1/+14
| | | | | | | | | | | | | | | | | | | | | When an AC charger is plugged in, the EC enable discharge-on-ac: stopping current from VBUS and draw current from the battery. This feature is introduced to avoid drawing too much current at once from an AC adapter. (CL:431138) We suspect this feature causes the system to choke when the battery is deeply discharged. This patch disables discharge-on-ac if the system is in G3 or S5. BUG=b:35584495,b:74586187 BRANCH=reef TEST=none Change-Id: I2ddee48d4bbaa448b3d1f77b5ab079d76a4be8cb Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1011594 Reviewed-by: Saurabh Madan <ssmadan@chromium.org>
* Snappy: Keep BGATE on when entering hibernationDaisuke Nojiri2018-01-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | Currently, BD99956 turns off BGATE when the EC enters hibernation because the EC puts BD99956 into the lowest power level (POWER_SAVE_MODE=6). When BGATE is off, a voltage drop due to the internal diode causes VSYS to go below the threshold that PMIC requires to sustain PP1800_EC. This patch puts BD99956 into the second lowest power mode (POWER_SAVE_MODE=5) on hibernation. This will keep BGATE on thus prevent PP1800_EC from dropping. BUG=b:70183568 BRANCH=reef TEST=Connect Snappy to battery emulator. Boot it on AC. Unplug AC. Let it enter hibernation. Press power button. Verify DUT wakes up. It immediately goes back to hibernation as expected. Change-Id: I1ee3079bd12d557eb0e6d1c00bc5ea308545e49c Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/862546 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Snappy: Extend the watchdog timeout to 500ms after wakeup from hibernateCHLin2018-01-221-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, when EC enters hibernation because of critical battery level, upon AC plug-in, EC will wake up from hibernation and execute the watchdog reset immediately. However, on Snappy, we observed that there is a drop on the PP1800_EC power rail after AC is applied when VBAT is ~5.8V. If the drop happens when the EC booter accesses the SPI flash, it will cause EC to hang because booter may not find a valid image and go to an endless loop. This CL extends the watchdog reset timeout to 500 ms. This will delay the timing that EC's booter accesses the SPI flash to the period where PP1800_EC is stable. BUG=b:70183568 BRANCH=reef TEST=No build errors for "make buildall". TEST=Measure the F_CS pin and PP1800_EC after plugging AC; Make sure the EC start to access SPI flash after PP1800_EC drops. Snappy EC can reboot succesfuly and show the firmware screen 10 out of 10 attempts. Change-Id: I49fccdc3e588cdc24759b137af52af355d9bb47f Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/862545 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* Revert Snappy: Cutoff battery when system shuts down due to critical batteryDaisuke Nojiri2018-01-162-6/+1
| | | | | | | | | | | BUG=b:70183568 BRANCH=none TEST=none Change-Id: I1391e8e3c4e62bd5bef05c018621a27046edf4c1 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/838301 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* USB/PD: Request discover identity on bootDaisuke Nojiri2018-01-051-12/+19
| | | | | | | | | | | | | | | | | | | | This patch makes the TCPM request discover identity on boot instead of resume. BUG=chromium:644663,b:70165261 BRANCH=none TEST=Verified display works in the following cases: 1. On Fizz, plug in Dell type-c HDMI adapter in S0, shutdown, boot. 2. On Fizz, plug in Dell type-c HDMI adapter in S5, boot. 3. On Fizz, plug in type-c monitor in S0, suspend, resume. 4. On Fizz, plug in type-c monitor in S5, boot. 5. On elm, S5. Plug adapter with power+HDMI, boot. Change-Id: Ib068c60bc51ebddc461378028a48c64662bc5b81 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/847970 Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/852360
* Snappy: Cutoff battery when system shuts down due to critical batteryDaisuke Nojiri2017-12-192-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, Snappy EC hibernates when system shuts down due to critical battery level. This causes devices with deeply drained battery to fail to exit from hibernation. This patch makes Snappy EC cut-off battery when the system is shutting down due to critical battery level. This patch also disables hibernation. It'll make chipset_task sleep instead of hibernate in G3. So, charger_task should eventually cut off the battery when the battery reaches critical level. BUG=b:70183568 BRANCH=none TEST= [Setup] A battery is connected but deeply discharged. EC sees it 0% charged. Battery cells are connected to 5.8V power supply. [Test] 1. Boot the device by AC. If it doesn't boot, press reset button on servo. 2. Wait till EC jumps to RW (or firmware screen shows up). 3. Unplug AC. 4. Wait for EC to hibernate (~30 sec). 5. Make sure VBAT is 5.8V (indicating battery's CFET is closed). 6. Plug AC adapter to wake up the system. Snappy successfully boots 10 out of 10 attempts. Change-Id: I9e1a8b2b3175c2e914d745e5522b8b9bedda3a78 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/829985 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Snappy: fix battery voltage maximalDevin Lu2017-12-181-1/+1
| | | | | | | | | | | | | | | Snappy batteries V-desired is 8800mV, we don't need to limit to 8700mV, it should be 8800mV. BUG=b:70546151 BRANCH=reef TEST=use ec console command "charger" to verify V_batt is 8800mV while charging. Change-Id: Ib4e5b889c8164618423ac97d9e1564a2b68fc087 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/810285 Reviewed-by: Shawn N <shawnn@chromium.org>
* pd: Ignore Augmented PDOs when choosing PDO to request.Todd Broch2017-12-022-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Augmented PDOs are part of the PD3.0 specification. As present USB PD sinks can't support these PDO types we need to ignore them. BRANCH=samus,glados,oak,gru,reef BUG=b:37476637 TEST=manual, On samus, plug-in blackcat (EVT) charger and see it ignore these Augmented PDOs when making its PDO request. Signed-off-by: Todd Broch <tbroch@chromium.org> Original-Change-Id: I28a0377e1486368f25f37cad640af71244a4c30b Originally-Reviewed-on: https://chromium-review.googlesource.com/484687 Commit-Ready: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> (cherry picked from commit 49c776b5b78462ae2118fca240f7fb5df7dc444c) Change-Id: Icbdd1d04b15b1a3e4ace7df015dfeceecbad54f3 Reviewed-on: https://chromium-review.googlesource.com/804644 Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org>
* pd: prefer CD pin assignments over EF for USBC->USBC case.Todd Broch2017-12-021-5/+8
| | | | | | | | | | | | | | | | | | | | | | BRANCH=samus,glados,oak,gru,reef BUG=chromium:694597 TEST=manual, connect samus to USB-C monitor via cable and see it select pin assigmnent 'C' Signed-off-by: Todd Broch <tbroch@chromium.org> Original-Change-Id: Iddad5b654715bd30ba081c62f8fb53e07816498c Originally-Reviewed-on: https://chromium-review.googlesource.com/465379 Commit-Ready: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> (cherry picked from commit a8e6b070cbd107d8c2f44f44ae8231a4f4efea90) Change-Id: Ia200f52169c7e22f7ec46f053e5b1ef13f79618f Reviewed-on: https://chromium-review.googlesource.com/804643 Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org>
* Snappy: Blinking battery white LED on suspend for alan/bigdaddy boardsDevin Lu2017-10-271-1/+19
| | | | | | | | | | | | | | | | | Support battery led blinking for alan/bigdaddy boards, because alan/bigdaddy are non-power-led design, we align battery led behavior same as chell board (CL:332625). BUG=b:67870473 BRANCH=reef TEST=put alan/bigdaddy boards in suspend, plug in charger to see amber LED and then remove the charger and see that it blinks white again. Change-Id: I49bd32cbce49f00451ec583a51a4a602db8490b1 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/725007 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* snappy: override DP EQ setting for bigdaddy boardsHarry Pan2017-10-172-1/+23
| | | | | | | | | | | | | | | | | | As to PS8751 of bigdaddy daughter boards requires different DP EQ setting, apply overriding once the sku_id is set. Such that, every time PS8751 resumes from low power mode, it would apply the customized DP EQ setting. BUG=b:67674524 BRANCH=reef TEST=evaluate DP jitter test on bigdaddy boards. Alternately, use ectools to read PS8751 reg offset 0xd3 as 0x98 Change-Id: I90ccea46ee18d87d4deaeb3cf2b479414563d452 Signed-off-by: Harry Pan <harry.pan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/716936 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* ec_features / snappy: Allow disabling keyboard backlight featureDevin Lu2017-09-146-2/+58
| | | | | | | | | | | | | | | | | Allow reporting that keyboard backlight doesn't exist even when the code is compiled in. Useful if there are multiple device models that should share firmware. [refer to CL:633926] BUG=b:65359225 BRANCH=reef TEST=none Change-Id: I24dd17b50d1fe0967a804c1cb733f1d01a12fa65 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/662911 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* common: add host command to push AP SKU ID to ecDevin Lu2017-09-133-0/+66
| | | | | | | | | | | | | | | add host command to set AP SKU ID to ec. [cherry-pick edits: fix some merge conflicts] BUG=b:65359225 BRANCH=reef TEST=make buildall -j Change-Id: I0d26e0c964349471169ec8a81f124fc36d2a3acd Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/662698 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* anx3429: force chip reset on PD_RESUMECaveh Jalali2017-09-079-102/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | we need to properly restart the anx3429 after a firmware update. simply initializing the chip doesn't seem to get it to reload its firmware - at least not the portion of the chip that implements the firmware version register. so, we explicitly power down and reset the chip before reinitializing it to force it to run the new firmware. the chip also needs a 10ms "off" time so the reset is properly seen by the chip, so i did a light refactoring of the code paths that reset the anx3429. TEST=used 2 different firmware blobs and verified it switches between them during software sync. BRANCH=none BUG=b:35586895 (cherry picked from commit c1e5671e561c82c9532cb29b17fc7cf4061ab20a) Reviewed-on: https://chromium-review.googlesource.com/631976 Change-Id: I321b5bc365b477c9b8754417b01fd03921fc648b Signed-off-by: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/644771 Reviewed-by: Shawn N <shawnn@chromium.org>
* acpi: Map EC features into ACPI EC memory spacePatrick Georgi2017-09-053-1/+48
| | | | | | | | | | | | | | | | | | | | | | Reserve EC address space offset 0x0a-0x0d for device features. Same value as with the host command, just different way to access it. BUG=b:64705535 BRANCH=none TEST=none Change-Id: I420aed1ae8d0fb7da477fc72ac55ea75a9f9350b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/626976 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com> (cherry picked from commit f1dfc4cbac2140f51f4a40fec790755ca7d4fafe) Reviewed-on: https://chromium-review.googlesource.com/647957 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Trybot-Ready: Patrick Georgi <pgeorgi@chromium.org>
* ec_features: Move feature flags out of ec_command into its own unitDevin Lu2017-09-054-85/+109
| | | | | | | | | | | | | | | | | | | Prepare for exposing the feature flags through EC ACPI memory space by moving the definitions and collection function into its own unit. This CL is referring to: 6844e4c2793b736b873f97510238ae6ed03c0772 BUG=none BRANCH=reef TEST=builds and returns the same value Change-Id: I66eabebe0d039fdcd14d11b9ecf77c0f1040d006 Signed-off-by: Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/648892 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Trybot-Ready: Patrick Georgi <pgeorgi@chromium.org>
* charger: bd9995x: Disable topoff modeShawn Nematbakhsh2017-08-311-3/+1
| | | | | | | | | | | | | | | | | | | | | Zero ITERM_SET to keep the charger out of topoff mode, since it has undesirable side-effects related to dead / low battery charging. BUG=b:35575421 BRANCH=reef TEST=Previous testing on kevin with same register setting. Change-Id: Ic1dd280e1069d410895498c0f72989654a6b8c63 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/636152 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 98405d4eaec40e1ac9b8f0344ea8ddbc2747a4c9) Reviewed-on: https://chromium-review.googlesource.com/644806 Reviewed-by: Scott Collyer <scollyer@chromium.org> Commit-Queue: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Tested-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
* anx3429: read chip firmware version during initCaveh Jalali2017-08-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | fetching the chip firmware version toward the end of the chip anx74xx_tcpm_init() sequence is a good place to do this. we need this info in any case and this is a safe place to access device registers and cache the values. subsequent chip firmware queries typically return the cached value. also, tcpci_tcpm_init() is already structured this way. TEST=verified with follow-up CL that firmware update succeeds and new version is reported BRANCH=none BUG=b:35586895 Signed-off-by: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/634513 Reviewed-by: Shawn N <shawnn@chromium.org> (cherry picked from commit e4997a631e129df3d171da16de9504810891744c) Change-Id: Ia8f1d14717b0f0f8024caa1510d2fbb7658a1d68 Reviewed-on: https://chromium-review.googlesource.com/644854 Reviewed-by: Caveh Jalali <caveh@google.com> Commit-Queue: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com>
* anx74xx: enable driver "release".Caveh Jalali2017-08-311-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | TEST="make buildall" succeeds, "make runtests" passes for reef. returning SUCCESS instead of UNIMPLEMENTED from .release() means the pd_task() is allowed to reinitialize the TCPC when coming out of PD_STATE_SUSPENDED or similar scenario. TEST=verified anx3429 firmware update succeeds, USB port still usable for charging after update. BRANCH=none BUG=b:35586895 Signed-off-by: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/596797 Reviewed-by: Shawn N <shawnn@chromium.org> (cherry picked from commit 68dfee896ea433bd55e081e07f26b3534fd11bb9) Change-Id: I6e8867ffa5e440866d0783dfda63429ef5121897 Reviewed-on: https://chromium-review.googlesource.com/644853 Reviewed-by: Caveh Jalali <caveh@google.com> Commit-Queue: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com>
* pd_control: make DISABLE port specificCaveh Jalali2017-08-311-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | this makes the PD_CONTROL_DISABLE subcommand of EC_CMD_PD_CONTROL port specific like all the other subcommands already are. the only place depthcharge uses PD_CONTROL_DISABLE is in anx7688.c and that code already passes the correct chip ID along, so this will not affect the current use case. ectool already does the right thing as well. TEST=used ectool to verify each port can be disabled independently. BRANCH=none BUG=b:64956885 Signed-off-by: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/616259 Reviewed-by: Shawn N <shawnn@chromium.org> (cherry picked from commit 2668e5aeea93915c3720b7522e4a116cf6a20550) Change-Id: Ic08aef09d6426466d94558e9acc270b27c7a2067 Reviewed-on: https://chromium-review.googlesource.com/644852 Reviewed-by: Caveh Jalali <caveh@google.com> Commit-Queue: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com>
* ps8xxx: use custom tcpm_drvCaveh Jalali2017-08-229-8/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | the ps8xxx family of TCPCs (ps8751, ps8805) have historically used the generic tcpci_tcpm_drv functions, but we need to override some of these entry points because the parade parts need to be woken up before accessing registers. in most cases, this doesn't matter because we access the chip in quick succession where we can "safely" assume the chip is awake -- and the code is structured to implicitly keep the chip awake. the new case we need to address here is where we need to suspend the pd_task and TCPC at an arbitrary point in time. the driver's .release method is called to shut down the chip, and that involves first waking up the chip to be able to access its regs to mask off interrupts, etc. BUG=b:35586896 BRANCH=none TEST=tested from depthcharge - we no longer get errors in the EC console logs about TCPC "release" failed. Reviewed-on: https://chromium-review.googlesource.com/616460 Reviewed-by: Shawn N <shawnn@chromium.org> Change-Id: Ic2a90b71050b3f68c697b1cef48d736ed88b3f41 Signed-off-by: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/625356
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