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* Clear OWNERS for factory/firmware branchfirmware-scribe-10045.BBrian Norris2021-09-102-10/+1
| | | | | | | | | | | | BUG=none TEST=none Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155240 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Owners-Override: Jora Jacobi <jora@google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* stm32: Fix manual interrupt clearing functionCraig Hesling2020-03-171-1/+3
| | | | | | | | | | | | | | | | | | | | | This fixes a bug in gpio_clear_pending_interrupt, where all pending interrupts are unintentionally cleared. This is not in the code path for normal gpio interrupt handlers, since the normal interrupt clearing occurs in gpio_interrupt (right below this function). BRANCH=none BUG=chromium:1059520 TEST=none Signed-off-by: Craig Hesling <hesling@chromium.org> Change-Id: I4d6fe7947f4d76cf3b57dfbf3bb926e41851c80c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2101208 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> (cherry picked from commit c2c2c083fef813e3e3c70f8c13a1418717ba682d) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2107663
* host_event: Move host events and mask handling into common codeFurquan Shaikh2017-10-179-374/+172
| | | | | | | | | | | | | | | | | | | | Instead of duplicating the handling of host events and host event masks in chip lpc drivers, add routines in common code to provide basic functions like setting/getting of masks, setting/getting of events and handling of masks transitions across sysjump. BUG=None BRANCH=None TEST=make -j buildall. Verified following: 1. Event masks are correctly retained across sysjumps. 2. Wake from S3 works fine. 3. Wake from S0ix works fine. 4. SCI generated correctly. Change-Id: Ie409f91b12788e4b902b2627e31ba5ce40ff1d27 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/707771 Reviewed-by: Shawn N <shawnn@chromium.org>
* g:prevent SOF calibration debug message spewVadim Bendebury2017-10-171-12/+7
| | | | | | | | | | | | | | | | | | | It turns out the code logic is not exactly correct: the range for coarse trim values is 0..0xFF. Use the fixed top of the range value and do not print messages if the value is at the range boundary. BRANCH=cr50 BUG=b:67788437 TEST=Observed occasional messages on the Cr50 console when plugging/unplugging Suzy-Q, but not the constant spew. Change-Id: I94ab581769ba8326346b636b1342136e98d61ff1 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/723981 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* keyboard_8042: ensure key scanning on when keyboard enabledStefan Reinauer2017-10-171-0/+2
| | | | | | | | | | | | | BRANCH=none BUG=none TEST=Boot Windows in legacy mode and observe keyboard is working. Change-Id: Id203a8804b86e0fcfbb9974658f66e9bd2602151 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/722123 Tested-by: Stefan Reinauer <reinauer@google.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Fizz: enable fanGaggery Tsai2017-10-174-3/+50
| | | | | | | | | | | | | | | | | | | | This patch is to enable fan through PWM4 output and TACH feedback from TA2 GPIOA6, and move EC_PLATFORM_RST to GPIO45. BUG=b:64915426 BRANCH=None TEST=emerge-fizz chromeos-ec and use fanduty and faninfo from EC console to control and check fan status. Probed oscilloscope on PWM output and checked the duty as expected. Made sure the fan was stopped when DUT entered S3 and was running when DUT resumed from S3. Change-Id: I09f3ac43d2e4170b2aff3830f832bc5fd46a15c0 Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/627542 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* gsctool: allow to pass optional value for --rmaVadim Bendebury2017-10-171-45/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It would be much easier to use the --rma command line option if it allowed to pass the authentication code in a separate invocation. This patch changes the behavior of the --rma command line option and improves the help message to match actual features of gsctool. When passed without an extra parameter it requests the Cr50 to generate the RMA authentication challenge, prints the challenge on the console as before, and then exits instead of waiting for the user to enter the authentication code. When the extra parameter is given, it is considered the authentication code received from the server, the code is passed to the Cr50 and the response is reported to the user. BRANCH=none BUG=b:37952913 TEST=verified the expected behavior: localhost tmp # ./gsctool -r -t Challenge: CCYAQ 5ZUDP 9Q8NY S7TQR 7PVUR ETX7P T5YQK NGV9S 7TY8Z QY7H5 5DEH3 5EEWY UBJPA WN7YX SE35G TPS76 localhost tmp # ./gsctool -t -r EYE3E Processing response... rma unlock failed, code 1 localhost tmp # echo $? 3 localhost tmp # ./gsctool -t -r EYE3EWQG Processing response...RMA unlock succeeded. localhost tmp # echo $? 0 localhost tmp # Change-Id: I2c61ff3a3ef1718eb4f192321bebd8caba388aeb Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/722115
* gsctool: harden the APIs marking pointers constVadim Bendebury2017-10-171-2/+2
| | | | | | | | | | | | | | | This is just a tweak marking pointers to the vendor command payloads as const, as the command payloads are not supposed to be modified by the communication layers. BRANCH=none BUG=none TEST=make buildall -j; make -c ./extra/usb_updater Change-Id: I68f15e8c77dc892173ff0241072128d960712a80 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/722114 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* Fizz: Add EC_RW_B in FMAPDaisuke Nojiri2017-10-171-1/+19
| | | | | | | | | | | | | | This patch adds EC_RW_B entry in the FMAP. This allows FAFT to locate the RW_B image and manipulate it. BUG=b:64614832,b:67748602 BRANCH=none TEST=Run futility dump_fmap ec.bin. Change-Id: I03aec945e0c8c3e08fc629a34ea6e5183bcccb61 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/722024 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* EFS: Sysjump to active copyDaisuke Nojiri2017-10-172-2/+2
| | | | | | | | | | | | | In EFS, EC needs to sysjump to the active copy, which is hashed and validated by the AP. BUG=b:67748602 BRANCH=none TEST=Verify Depthcharge makes EC jump to RW. Change-Id: I2ca893f7691ad776a791f2044dd7a0983d06e3c5 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/717676
* charge_manager: Support no-battery / no-host boardsShawn Nematbakhsh2017-10-173-12/+22
| | | | | | | | | | | | | | | | Boards without batteries and/or without host command support may wish to use charge_manager. BUG=chromium:769895 BRANCH=None TEST=`make buildall -j` Change-Id: I2455528de3300a0651791752a05409c888b5f2a3 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/713943 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* scarlet: Fix SPI masterPhilip Chen2017-10-172-5/+27
| | | | | | | | | | | | | | | | | | | | Add startup/shutdown code for SPI2. Fix mapping for DMA channels. Set the initial level as high for CS pins. BUG=b:67694935, b:64798990 BRANCH=none TEST=boot scarlet rev1 without seeing auxiliary watchdog triggered, see reasonable accel and gyro measurement from 'accelread' Change-Id: Icb79c3b716adb90804231032505c31148b88a9ee Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/717735 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Alexandru M Stan <amstan@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* GLKRVP: Enable low power idle modeVijay Hiremath2017-10-171-0/+2
| | | | | | | | | | | | | BUG=b:67782644 BRANCH=glkrvp TEST=Make buildall -j Change-Id: I89eae439c7adebf9abdec7620f5b126aab48b9a4 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/719975 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* GLKRVP: Enable verified boot supportVijay Hiremath2017-10-171-0/+3
| | | | | | | | | | | | | | BUG=b:67780603 BRANCH=glkrvp TEST=EC console command 'hash' can print the vboot hash calculated values. Change-Id: I3d9efa7b6c57f8a862676929a1af9ae21b5c9b2d Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/719881 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* util: let cr50 signer use chroot version of gsctoolVadim Bendebury2017-10-161-2/+3
| | | | | | | | | | | | | | | | | | | Requiring installation of the gsctool locally in the EC tree could collide with debug versions or executables built for wrong architectures. Let's use the version installed in chroot and give user instructions how to install it if it is not there. BRANCH=cr50 BUG=none TEST=verified that create_released_image.sh still works with the chroot version of the tool Change-Id: Ib155e166297d28c1660f7f33bb000b3bb8fe7a15 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/709739 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* GLKRVP: Correct GPIO assignment for PCH_WAKE_LVijay Hiremath2017-10-161-2/+2
| | | | | | | | | | | | | BUG=b:67797598 BRANCH=glkrvp TEST=In S3, toggling PCH_WAKE_L wakes system to S0. Change-Id: If4d6786d8b24488c11f7894499c7e19f43a9b7f8 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/719486 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* npcx/flash: not enable the flash pinmux when using internal flashCHLin2017-10-152-0/+6
| | | | | | | | | | | | | | | | | | | | | | In npcx5, the flash interface pinmux should be turned on in order to access the external flash. However, in npcx7, the internal flash is used. It is meaningless to turn the pinmux on. And it also causes the alternative function of these pins not work normally(such as GPIOA0/GPIOA2) if the pinmux is enabled. This CL uses the preprocessor flag NPCX_INT_FLASH_SUPPORT to conditionally prohibit the execution of flash pinmux code. BRANCH=none BUG=none TEST=No build errors for "make buildall". Build npcx_evb and npcx7_evb boards, make sure the pinmux are correctly configured seperately. Change-Id: Iba2300159f204b65d15852ec1755714df0c64816 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/704316 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* util/iteflash.c: make sure that the file is closedPatrick Georgi2017-10-141-1/+1
| | | | | | | | | | | | | | | | | An insignificant bug, but Coverity complains about it. Reduce the cognitive load by making sure that file is closed in time. BUG=none BRANCH=none TEST=none Change-Id: I2efbe136f4991cf829b95568eef22eb7b2d1a8c6 Found-by: Coverity Scan #141758 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/702304 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Chris Ching <chingcodes@chromium.org>
* util/iteflash.c: Handle potential resource leaksPatrick Georgi2017-10-141-0/+2
| | | | | | | | | | | | | | | | | | | They're of really little consequence right now since an error in verify_flash() is only followed by resource tear down and process exit. verify_flash could gain other call-sites though, so better be safe than sorry. BUG=none BRANCH=none TEST=none Change-Id: I5fa8276dc3b3e124dacceca1ea857430982f7567 Found-by: Coverity Scan #141761, #141762 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/702482 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Chris Ching <chingcodes@chromium.org>
* [fan] Add CONFIG_FAN_SPEED option to override EC fan speedChris Ching2017-10-134-7/+9
| | | | | | | | | | | | | | | | Fans will be initialed at the given RPM, and not the max speed. Changed kahlee to use new method and set speed to ~50%, down from 75% BUG=b:67055475 TEST=run on kahlee board BRANCH=none Change-Id: Iad40a58b531f46ac80572b47aef9378b47222be1 Signed-off-by: Chris Ching <chingcodes@google.com> Reviewed-on: https://chromium-review.googlesource.com/714386 Commit-Ready: Chris Ching <chingcodes@chromium.org> Tested-by: Chris Ching <chingcodes@chromium.org> Reviewed-by: Chris Ching <chingcodes@chromium.org>
* tcpc: Don't retry sending of source capsShawn Nematbakhsh2017-10-132-1/+9
| | | | | | | | | | | | | | | | | TCPM will retry sending of source caps on failure and retrying in TCPC will cause us to violate PD_T_SEND_SOURCE_CAP. BUG=None TEST=Attach servo_v4 to twinkie, verify source caps are sent in ~100ms intervals and not in bursts of four. BRANCH=servo_v4 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I3264e5578afbde7b9d2c003b6744974329a253d4 Reviewed-on: https://chromium-review.googlesource.com/719729 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* coral: Remove LED signals from pwm channel liststabilize-10032.86.Bstabilize-10032.75.Bstabilize-10032.72.Bstabilize-10032.71.Bstabilize-10032.68.Bstabilize-10032.56.Bstabilize-10032.111.Brelease-R63-10032.BScott Collyer2017-10-132-5/+1
| | | | | | | | | | | | | | | | | | The GPIO lines for the charger LED are being used as simple on/off and no PWM control is used. Removed them from the pwm channel list so that it reflects more accurately what PWM is used for on Coral. BUG=b:64192049 BRANCH=None TEST=make -j BOARD=coral Change-Id: I3546001f96cb01f81fa1c373de28e460b63012c1 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/717187 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
* coral: Add support for power LED for Robo devicesScott Collyer2017-10-132-6/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | Robo devices have a power button LED. For these devices the desried power button LED behavior is: S0 -> always on S3 -> charging, then 500 mSec off, 3 seconds on S3 -> not charging, always off S5 -> always off Because the hook tick runs at 200 msec, using 600 msec for the off period when blinking in S3. BUG=b:64015212 BRANCH=None TEST=Manual This LED is not connected on EVT, so added a wire on GPIO02 and used a scope. Verifed that in S0 the signal level is low, and in S3 that it control signal toggles 600 mSec high/3 sec low. Verifed than in S5 control signal is high. Change-Id: I72438a009a507fcddaae5a673bf3bc83988f2dd5 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/717183 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
* chip/g: Run unrestricted image even if Board ID can't be readRandall Spangler2017-10-131-2/+11
| | | | | | | | | | | | | | | | | | | | | | Previously, an error reading Board ID would prevent any image from running, even a wildcard (unrestricted) image with mask=flags=0 which would match any Board ID. Now, if Board ID can't be read, match the image against type=type_inv=flags=0. This will match only an unrestricted image. (This is better than checking directly for an unrestricted image, because that check is more susceptible to clock-jitter-induced errors.) BUG=b:67651806 BRANCH=cr50 TEST=Hack read_board_id() to return error. See that an unrestricted image will now boot. Change-Id: I1071e146b4541e8efd50c8409b8f76012a107731 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/713574 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Revert "hana: disable console input when system is locked"Rong Chang2017-10-131-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit df12bc1c0246ceec39f28151efadb73f8e5fd7a5. Reason for revert: the config flag is deprecated and should not use in any project. Original change's description: > hana: disable console input when system is locked > > Shipped devices were found that batteries could enter ship mode > unexpectedly. Fail rate is about 5/700pcs per day. Failure happens > when battery is charged fully and eneters sleep(mem), and then AC is > plugged out. > Battery ship mode is entered because ec execute console command > "cutoff". Still do not know what causes that when no any device > connected to servo board connector (console TX and RX are floated). > Enable this config item will cut off route from RX input and fix > the issue. > > BUG=b:67033247 > BRANCH=none > TEST=with 50 DUTs, flash ec to DUTs and then lock the system, charge > the battery from about 80% capacity to 100% capacity, close the lid > for 20 minutes, unplug AC, boot the system, all DUTs boot, no DUT's > battery enter ship mode. The same test repeats 3 times. > > Change-Id: I9939fed1467026bc2d85c645b6ecebae4b6796c6 > Signed-off-by: Chao Ge <chao.ge@bitland.com.cn> > Reviewed-on: https://chromium-review.googlesource.com/693921 > Commit-Ready: ge chao <chao.ge@bitland.com.cn> > Tested-by: ge chao <chao.ge@bitland.com.cn> > Reviewed-by: Rong Chang <rongchang@chromium.org> Bug: b:67033247 Change-Id: Ide8a3cc8d1eeee9914922d47ec12c44b7d0e9675 Reviewed-on: https://chromium-review.googlesource.com/718237 Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
* coral: Remove support for ALS since coral devices don't have itScott Collyer2017-10-132-65/+1
| | | | | | | | | | | | | | | | | No Coral configurations will contain the ambient light sensor (ALS). Therefore, no reason to have support for this in the board.c/.h files. BUG=b:38271876 BRANCH=eve TEST=make -j BOARD=coral and verify no errors. Change-Id: Ib8f6c546d5fb4d0bb8d37e84a62c4725e37be6f5 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/711196 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* cleanup: Use CONFIG_BATTERY to indicate whether a board has a batteryShawn Nematbakhsh2017-10-136-16/+18
| | | | | | | | | | | | | BUG=b:35528297 BRANCH=None TEST=`make buildall -j` Change-Id: I9e4814b4172f20711f7edd691c9569f9130aec8e Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/713395 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* common: add rma_auth console commandVadim Bendebury2017-10-131-9/+81
| | | | | | | | | | | | | | | | | | | | The new console command uses the alternative TPM command execution path to generate the RMA challenge and also allows to verify the RMA authentication code. This patch also limits the rma challenge/auth code printouts to images supporting debug features (built with CR50_DEV=1), and limits the code included when building test images. BRANCH=cr50 BUG=b:67008109 TEST=while running TCG tpm test ran the new console command multiple times, observed all tests pass and the command always succeed. Change-Id: I9ca3e86040d8adbdbe70f33cf2b317075f823f36 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/699524 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* common: add alternative TPM command execution contextVadim Bendebury2017-10-132-14/+129
| | | | | | | | | | | | | | | | | | | | | | | | | The TPM task provides access to various cryptographic functions which require huge stack size. Some other contexts might require to execute these functions, but no other task in the system has enough stack. The suggested solution is to create an alternative TPM task execution path, where the command comes not from the communications interface (SPI or I2C), but from another task in the system. An interface function is created to allow a single task to pass the command to the TPM task. The task requesting the alternative execution path creates the command context, sends an event to the TPM task to alert it to the presence of the command and then polls the flag indicating that the TPM task has completed execution of the command. BRANCH=cr50 BUG=b:67008109 TEST=tested after applying the next patch (add console command for generating RMA auth challenge). Change-Id: I168489a5fbb4a3e1d718198812019116738b2f61 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/699523
* flash_ec: Save more variables.Aseda Aboagye2017-10-121-3/+6
| | | | | | | | | | | | | | | | | | | It was found on zoombini, when flashing via flash_ec failed, it would prevent the board from booting as certain controls were left in their "flashing" state. This was because these controls were missing from the variables list which is what was used to restore the controls. BUG=b:65694294 BRANCH=None TEST=Attempt to flash zoombini without the flex connected. Attach the servo flex, apply power, verify DUT boots up. Change-Id: Ic2bc74ef1a61d4f10da6d3ceac77fbd373697838 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/714023 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* coral: Use SKU ID to initialize motion_sensor_countScott Collyer2017-10-123-18/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL adds the config option CONFIG_DYNAMIC_MOTION_SENSOR_COUNT and SKU table which contains the form factor for all known SKUs. Once the SKU ID is known, the variable motion_sensor_count is set based on CLAMSHELL or CONVERTIBLE designation in the SKU table. If there isn't a matching SKU ID in the table then motion_sensor_count will be initialized to the ARRAY_LENGTH of motion_sensors. BUG=b:38271876 BRANCH=None TEST=Manual Tested with Robo360 (SKU ID 71) and verified the motion sensor count and that the motion senors were initialized in the EC console log. [0.088188 Motion Sensor Init: count = 3] [0.346097 Lid Accel: MS Done Init type:0x0 range:2] [0.370386 Base Accel: MS Done Init type:0x0 range:2] [0.386790 Base Gyro: MS Done Init type:0x1 range:1000] Tested with Santa EVT (SKU ID 3) and verified motion_sensor_count is 0 and no EC console messages showing sensor initialization failures. Change-Id: Ia3d60f8c8dd4435dd7cfb80a860f809de2fb931e Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/711195 Commit-Ready: Aaron Durbin <adurbin@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* grunt: initial setup for ecYH Lin2017-10-119-0/+1768
| | | | | | | | | | | | | | Initial files for grunt, to be revised later. BUG=b:67187149 TEST=None BRANCH=None Change-Id: I392bb4982fea0c9374ba8d262f8f4288522207d5 Signed-off-by: YH Lin <yueherngl@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/699554 Reviewed-by: Jason Clinton <jclinton@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* scarlet: Use LSE as RTCCLKPhilip Chen2017-10-111-0/+1
| | | | | | | | | | | | | | BUG=b:63908519 BRANCH=none TEST=boot scarlet rev1 and wait for an hour, confirm rtc time == kernel system time. Change-Id: Ieb21dce51eb468bb4e1989ea21100599c91fa903 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/679602 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* motion_sense: Add CONFIG_DYNAMIC_MOTION_SENSOR_COUNT config optionScott Collyer2017-10-112-0/+6
| | | | | | | | | | | | | | | | | | | | | Some projects, such as Coral use a common image to support different SKUs. In this case the number of motion sensors supported may need to be determined at runtime. CONFIG_DYNAMIC_MOTION_SENSOR_COUNT removes the const assumption for the global variable motion_sensor_count. Based on CL https://chromium-review.googlesource.com/444587 BUG=b:38271876 BRANCH=None TEST=make -j buildall Change-Id: I4dd3384d245641136f3329b60d1d941927366387 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/711194 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
* Fizz: Set proper PD source voltage and currentDaisuke Nojiri2017-10-111-6/+1
| | | | | | | | | | | | | | Fizz allocates 15W to the type-c port. This patch allows the port to use it. BUG=b:67682343 BRANCH=none TEST=Verify 5V 3A PDO is offered. Change-Id: I1560c0c7cb04379f5e4c9893753afe4a7f0cefe4 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/713583 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* chip/stm32/clock: Optionally use LSE as RTCCLKPhilip Chen2017-10-115-26/+55
| | | | | | | | | | | | | | | | | | | | The default RTCCLK comes from LSI, which can vary from 30kHz to 60kHz. To use stm32 RTC for applications requiring accurate timing, let's setup LSE (a more accurate clock source) as RTCCLK. Also fix a typo in register.h as 'BCDR' should be 'BDCR' globally. BUG=b:63908519 BRANCH=none TEST=boot scarlet rev1 and wait for an hour, confirm rtc time == kernel system time. Change-Id: If4728bdd3b6384316e5337004a49c172eaec869d Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/679601 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* hana: disable console input when system is lockedgc2017-10-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Shipped devices were found that batteries could enter ship mode unexpectedly. Fail rate is about 5/700pcs per day. Failure happens when battery is charged fully and eneters sleep(mem), and then AC is plugged out. Battery ship mode is entered because ec execute console command "cutoff". Still do not know what causes that when no any device connected to servo board connector (console TX and RX are floated). Enable this config item will cut off route from RX input and fix the issue. BUG=b:67033247 BRANCH=none TEST=with 50 DUTs, flash ec to DUTs and then lock the system, charge the battery from about 80% capacity to 100% capacity, close the lid for 20 minutes, unplug AC, boot the system, all DUTs boot, no DUT's battery enter ship mode. The same test repeats 3 times. Change-Id: I9939fed1467026bc2d85c645b6ecebae4b6796c6 Signed-off-by: Chao Ge <chao.ge@bitland.com.cn> Reviewed-on: https://chromium-review.googlesource.com/693921 Commit-Ready: ge chao <chao.ge@bitland.com.cn> Tested-by: ge chao <chao.ge@bitland.com.cn> Reviewed-by: Rong Chang <rongchang@chromium.org>
* g: rename usb_updater into gsctoolVadim Bendebury2017-10-108-17/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The usb_updater utility has long been not just an updater, and has long been using other interfaces in addition to USB. gsctool is a much more suitable name. CQ-DEPEND=CL:709776 BRANCH=cr50 BUG=b:67007500 TEST=verified that make -C ./extra/usb_updater generates ./extra/usb_updater/gsctool: $ ./extra/usb_updater/gsctool --help Usage: gsctool [options] <binary image> This updates the Cr50 RW firmware over USB. The required argument is the full RO+RW image. Options: [...] $ Change-Id: I3ab70c28acf3664ddefaa923a87ba1fd5c3c437b Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/709738 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* util/ectool.c: Make sure device_name is NUL terminatedPatrick Georgi2017-10-091-1/+2
| | | | | | | | | | | | | | BRANCH=none BUG=none TEST=none Found-by: Coverity Scan #144116 Change-Id: I9ec030c1a3820af7d08c2a83e3c1f4c3ee7a3f0a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/702302 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Chris Ching <chingcodes@chromium.org>
* coral: Update Nasher SMP-SDI3.72 battery FET infoScott Collyer2017-10-061-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Nasher simplo battery uses the Reneas fuel gauge. The table entry for this battery had TI fuel gauge assumption. This CL modifies the FET info to use register 0x43 and bits 1|0. In addition added console log entry for the FET register, mask, and expected value. In normal cases this log message will appear only once, but when recovering from battery cutoff, will have have one entry per call until the battery is no reporting as disconnected. BUG=b:64887361 BRANCH=None TEST=Using nasher proto system connected the SMP-SDI3.72 battery. Tested normal start up and after doing a battery cutoff. Normal caseL: [0.038624 found batt:SMP-SDI3.72} [0.046017 SW 0x01] [0.068892 hash start 0x00040000 0x00020d08] [0.075775 Battery FET: reg 0x001b mask 0x0003 disc 0x0000] After battery cutoff: [0.146889 Battery FET: reg 0x0008 mask 0x0003 disc 0x0000] [0.161523 Battery FET: reg 0x0008 mask 0x0003 disc 0x0000] . . [0.476275 Battery FET: reg 0x001b mask 0x0003 disc 0x0000] Change-Id: Ie378e9a795f543763a02c6c062235b265be0f71c Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/705260 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* coral: Modify LED code to support different behavior based on SKU IDScott Collyer2017-10-061-69/+183
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implemented an led state table based implementation for LED control of the battery LED. The states are the same as previous Coral/Reef single LED control with the exception of allowing for 3 charging states based on the current battery state of charge level. Now the desired state is determined and that's used to access the correct LED behavior based on the current tick count. Changed from a one second tick to the NPCX 200 msec tick so the Robo power button pattern can be supported as well. The are currently two tables implemented, one for Robo devices, and the default table. At init time, after the SKU ID is determined, the correct table is assigned. BUG=b:64192049 BRANCH=None TEST=Manual Tested both Coral proto and Robo EVT systems. Verifed operation in the different states. During tested used modified charging level tables so the 3 different charging states could be exercised. Also removed battery to verify the error state. Change-Id: Ifc6935f73d4fed1eeec9c5aab13f6346f61857ff Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/693387 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* charge_ramp: Move ramp allowed / ilim callbacks to common codeShawn Nematbakhsh2017-10-0634-849/+562
| | | | | | | | | | | | | | | | | | | | | The decision on whether to ramp (and how high) depends on the quirks of charger identification, so move the decision out of board, into the drivers that implement usb_charger. Also, rename CONFIG_CHARGE_RAMP to CONFIG_CHARGE_RAMP_SW, to better contrast with the existing CONFIG_CHARGE_RAMP_HW. BUG=None TEST=Manual on kevin, verify ramp occurs when port plugged into Z840 workstation. BRANCH=None Change-Id: I5b395274133837a18a4f4ac34b59b623287be175 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/702681 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* mn50: add data signing capabilityNick Sanders2017-10-0613-6/+431
| | | | | | | | | | | | | | | | | | | Add a PERSO_AUTH appid to sign data passed through the AUTH mn50. Add a signer command to start and generate signatures. Clean UART init to avoid spurious nonprinting characters that will contaminate the siugnature. BUG=b:36910757 BRANCH=None TEST=generates signature for uart and spi Signed-off-by: Nick Sanders <nsanders@chromium.org> Change-Id: I5fc3c4ee34898421060b57b774a09734f6a1bae5 Reviewed-on: https://chromium-review.googlesource.com/670984 Reviewed-by: Marius Schilder <mschilder@chromium.org>
* scarlet: Wake up EC from STOP mode by UARTPhilip Chen2017-10-061-2/+4
| | | | | | | | | | | | | | | | | | Turn on FORCE_CONSOLE_RESUME and also shuffle around the context to ensure alphabetical order. BUG=b:67379662 BRANCH=none TEST=manually on Scarlet rev1: put AP in suspend mode, verify EC console still works, and confirm EC goes into low power idle mode by EC console command 'idlestats'. Change-Id: I2563e6ed4fdb47123912932ad8ba9172b0c9c13c Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/702918 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* chip/stm32/clock: Don't wake up the host when the host resets rtcPhilip Chen2017-10-061-1/+2
| | | | | | | | | | | | | | | | | | | The way AP resets ec rtc alarm is to set rtc alarm wake time in 0 sec. In current implementation, this still sets host_rtc_alarm_set. ...So when rtc irq is triggered next time, it wakes up the host even if the alarm is not set by the host. Let's fix it. BUG=b:66971951, b:67379662 BRANCH=none TEST='powerd_dbus_suspend' and see the host stay in suspend mode Change-Id: I1e14f669e3d887874548813c7c5b4d21d80bc62e Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/699657 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* pd: Move *_set_input_current() to common codeShawn Nematbakhsh2017-10-0522-483/+20
| | | | | | | | | | | | | | | | | | | Boards that use charge_manager have identical implementations of typec_set_input_current_limit() and pd_set_input_current_limit(), so move these functions to charge_manager. BUG=b:67413505 TEST=`make buildall -j`, also verify that fizz continues to power-on and boot AP, in both protected and unprotected mode, with barrel jack power and with zinger. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I99a5314d02c4696db944c0f8ac689405f4f1f707 Reviewed-on: https://chromium-review.googlesource.com/701412 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cleanup: pd: Remove CONFIG_CASE_CLOSED_DEBUGShawn Nematbakhsh2017-10-058-111/+20
| | | | | | | | | | | | | | | | | | CONFIG_CASE_CLOSED_DEBUG (CCD functionality implemented by EC) is no longer used in conjunction with CONFIG_USB_POWER_DELIVERY, and the common routines are only used by one board. BUG=chromium:737755 BRANCH=None TEST=`make buildall -j` Change-Id: Idc3d2fccef6cbec2af786cef634d752a02a0e859 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/656315 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* poppy: Enable pull-down on SPI flash MISO pin to avoid leakageNicolas Boichat2017-10-051-0/+8
| | | | | | | | | | | | | | | | | | | | This enables pull-down on F_DIO1 (SPI MISO), and F_DIO0 (SPI MOSI), whenever the EC is not doing SPI flash transactions. This avoids floating SPI buffer input (MISO), which causes power leakage. BRANCH=none BUG=b:64797021 TEST=Flash soraka, check output of rw .b 0x400C3029 is 0x80 Check that U58 (SN74LVC244ARWPR) leakage drops from 1.2 mA to 0. TEST=1. flashrom from host to EC spi flash using servo 2. flashrom from host to EC spi flash using suzyq 3. flashrom from device to EC spi flash 4. EC SW sync Change-Id: I5ac22142f6a1a5b1c31d6ae272ed7516a112f29e Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/701717 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* Fizz: Lock systemDaisuke Nojiri2017-10-041-1/+2
| | | | | | | | | | | | | | | | | | This patch undefines CONFIG_SYSTEM_UNLOCKED, which forces the system to be unlocked, and defines CONFIG_USB_PD_COMM_LOCKED, which enables PD only if EC is in RW. With this change, if SW write-protect is enabled, the system will stay in G3 until 50W or more power is supplied. BUG=b:38462249 BRANCH=none TEST=Lock Fizz and boot it on type-c adapter. Verify RW image is successfully verified and executed. Change-Id: Id8255c5c8e6af93bda3fd4de079008561f46e14c Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/558377 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* common: make rma_auth work with the serverVadim Bendebury2017-10-043-11/+6
| | | | | | | | | | | | | | | | | A couple of bugs have crept in with the latest series of patches: - the board ID value endianness does not have to be changed - the test RMA server public key value is wrong BRANCH=cr50 BUG=b:67007905 TEST=the generated challenge is now accepted by the server, and the generated auth code matches between the server and the Cr50. Change-Id: I18f413ab0bcc14d9cc50b115ac3784fdfcd5851c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/700798 Reviewed-by: Michael Tang <ntang@chromium.org>