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* zephyr/it8xxx2: RO flash region excludes the PSTATE bankfirmware-skyrim-15369.B-mainDino Li2023-03-022-2/+5
| | | | | | | | | | | | | | | | | Since it8xxx2 uses a dedicated flash bank to store persistent state, this change excludes the PSTATE bank from the RO flash region. This configuration is the as same CrOS EC OS. BRANCH=none BUG=b:270589902 TEST=Updating EC FW using flashrom utility without verify failure on PSTATE region. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: Iea5a4fbfde43675af58acbb85023d18503d3c3c9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4297063 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* USB-PD: Use VDO_MAX_OBJECTS to define max VDO objectsDaisuke Nojiri2023-03-026-16/+17
| | | | | | | | | | | | | | | | | | | Currently, VDO buffers are defined literally or by PDO_MAX_OBJECTS. This isn't applicable for EPR since it extends PDO_MAX_OBJECTS to 11. This CL redefines VDO buffers using VDO_MAX_OBJECTS, which is set to 6. This allows VOD buffers and PDO buffers to be defined in different sizes. BUG=b:257320026 BRANCH=None TEST=buildall LOW_COVERAGE_REASON=This patch doesn't contain new execution lines. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I760c10eb604733f2f8cc1a643d3ba77e036255c6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4290368 Reviewed-by: Diana Z <dzigterman@chromium.org>
* USB-PD: Print DPM state only if debug_level >= 2Daisuke Nojiri2023-03-024-3/+41
| | | | | | | | | | | | | | | | | | | | | | Printing DPM state names is not much useful unless you're debugging timing issues). Normally, it's mostly either in 'waiting' or 'ready'. This patch introduces dpm_debug_level and sets it to DEBUG_LEVEL_1 by default. It can be configured by CONFIG_USB_PD_DEBUG_LEVEL. This prevents the EC console from being flooded by DPM state names when a policy engine sends an EPR keep alive message. BUG=b:257320026 BRANCH=None TEST=On Agah, turn on/off DPM debug messages by the pd dump command. LOW_COVERAGE_REASON=code coverage falsely reporting no coverage for closing braces on if conditions Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I7da0c2fb775cd0978e08464c8923757094c12ca7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4289286 Reviewed-by: Keith Short <keithshort@chromium.org>
* Reduce AP communication failure spamTim Van Patten2023-03-023-7/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When communication with the AP is unavailable (not in S0, dead, etc.), the EC spams these logs to the console: 23-02-28 12:11:54.993 [53.641200 RMI: Unexpected command value in out bound message] 23-02-28 12:11:55.004 [53.642300 STT: Failed to write SOC temp rv:1] 23-02-28 12:11:55.008 [54.653200 RMI: Unexpected command value in out bound message] 23-02-28 12:11:56.023 [54.654500 STT: Failed to write SOC temp rv:1] 23-02-28 12:11:56.027 [55.663800 RMI: Unexpected command value in out bound message] 23-02-28 12:11:57.042 [55.665500 STT: Failed to write SOC temp rv:1] The actual content of the message is ignored by developers, and the messages are instead interpreted to indicate that communication with the AP is currently down. For nooglers and external developers, this can lead to confusion and wasted time mis-attributing the log messages to a different/separate error. This CL removes the STT log message, and instead relies on sb_rmi_mailbox_xfer() to log a single message when there is an AP communication failure. The flag is reset when the AP communication is restore. BRANCH=none BUG=b:271142544 TEST=tast run <IP> crash.WatchdogCrash, verify only a single error log TEST=Load known bad AP FW onto DUT (whiterun, R113-15367.0.0) where suspend/resume fails, close then open lid, validate EC logs are not spammed Change-Id: Iad08dbef64738d1a1f2d676fd47fbe7e66201e5e Signed-off-by: Tim Van Patten <timvp@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4298592 Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* util: Switch MIN/MAX from inline to macroRob Barnes2023-03-021-9/+20
| | | | | | | | | | | | | | | | | The MIN/MAX in util/misc_util.h is an inline function with signed int arguments. This fails when the arguments are unsigned or larger than an int. Switch the implementation to a MACRO. Borrowed the implementation from include/util.h. BUG=None TEST=Run ectool Change-Id: I06f478bec09dcafb3e20189dc43b21165ee109c9 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4299570 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Replace CONFIG_DMA with CONFIG_DMA_CROS in EC codebasePatryk Duda2023-03-0115-16/+17
| | | | | | | | | | | | | | | | The config from EC collides with the same config from Zephyr. BUG=b:239712345 BRANCH=none TEST=make runhosttests buildall Change-Id: Ic6e63ea6dd9e745e82feb2af04b77069c2d78af1 Signed-off-by: Patryk Duda <pdk@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4295699 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Patryk Duda <patrykd@google.com> Tested-by: Patryk Duda <patrykd@google.com>
* hades: Initial ECDavid Huang2023-03-0119-1/+1888
| | | | | | | | | | | | | | | | | Create the initial EC for hades by copying the agah reference board EC files. BUG=b:269387225 BRANCH=None TEST=make BOARD=hades Change-Id: Icfca9f64654f8683aaa6851b823463c740501b3d Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4286378 Tested-by: YH Lin <yueherngl@chromium.org> Code-Coverage: YH Lin <yueherngl@chromium.org> Commit-Queue: YH Lin <yueherngl@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com>
* rex: Update arail and rsmrst system boot timestampRajesh Kumar2023-03-012-0/+5
| | | | | | | | | | | | | | | | | | This change updates ARAIL and RSMRST timestamp for rex platform. BUG=b:249163956 BRANCH=none TEST='ectool boottime' AP console command is used to fetch data 'reboot' on AP console to trigger warm reboot 'apshutdown' on EC console to trigger cold reboot Change-Id: Ie621f862f704bf35d249d57fb33411bf4e9f4348 Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4263103 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Al Semjonovs <asemjonovs@google.com> Reviewed-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
* system_boot_time: Fix warm reboot counter update for native power seqRajesh Kumar2023-03-011-1/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | Warm reboot counter is being reset to 0 on hook shutdown and increments on PLTRST. In coldboot scenario, warm reboot counter is incrementing on PLTRST and hook_shutdown was executed after PLTRST resetting the counter to 0 resulting the expected value of counter, but with native power sequencing, hook shutdown is being executed before PLTRST and counter is not being reset to 0. This change handles the PLTRST transition appropriately to identify cold and warm reboot scenario and updates the warm reboot counter as expected. BUG=b:249163956 BRANCH=none TEST='ectool boottime' AP console command is used to fetch data 'reboot' on AP console to trigger warm reboot 'apshutdown' on EC console to trigger cold reboot Change-Id: I969bd9480bbfade481370a5a35f47cbbc53bc4bc Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4240334 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: caveh jalali <caveh@chromium.org>
* crystaldrift: Modify the charger configurationTang Qijun2023-03-015-63/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | The charger ic used in the crystaldrift project is ISL9238. BRANCH=none BUG=b:268621319 TEST=$ charger Name: isl9238c Option: (0x280004) Man id: 0x0049 Dev id: 0x000c V_batt: 17600 (2048 - 18304, 8) I_batt: 4300 ( 4 - 6080, 4) I_in: 512 ( 4 - 6080, 4) I_dptf: disabled localhost ~ # ectool usbpdpower 1 Port 1: SNK Charger PD 20300mV / 3250mA, max 20000mV / 3250mA / 65000mW Change-Id: I29aa36bcf034571aaba7aabdcc9a33e5fe861bd3 Signed-off-by: Tang Qijun <qijun.tang@ecs.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4286385 Commit-Queue: Chao Gui <chaogui@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Tested-by: Chao Gui <chaogui@google.com>
* USB-PD: Fix RDO object position macrosDaisuke Nojiri2023-02-281-2/+2
| | | | | | | | | | | | | | | | RDO object positions are stored in B31...28, which account for 4 bits. This CL fixes the helper macros, which mask only B30...28, 3 bits. There is no functionality change. BUG=b:257320026 BRANCH=None TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I4f98f8e7faa7704a35ad33b64705e4cdeb3f2bd4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4290369 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* USB-PD: Use TCH_SET_FLAG to set PRL_FLAGS_CHUNKINGDaisuke Nojiri2023-02-281-1/+1
| | | | | | | | | | | | | No functionality change. BUG=None BRANCH=None TEST=None Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I13a4646d65712d07d51d8656fca8bd776d79ac79 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4290367 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* zephyr/program/skyrim: Remove extra GPIO definition `ec_gpio56`Robert Zieba2023-02-281-3/+0
| | | | | | | | | | | | | | | `ec_gpio56` is an extra definition now that the STB dumping functionality has been added. Remove it. BRANCH=none BUG=b:270710890 TEST=Verified that STB dumping command still works as expected. Change-Id: I089fbff3a0f96c9e89ee9046e8950b91106ac4e7 Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4297652 Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* skyrim/program.conf: Enable CONFIG_PLATFORM_EC_ACCEL_SPOOF_MODETim Van Patten2023-02-281-0/+1
| | | | | | | | | | | | | | | | Enable CONFIG_PLATFORM_EC_ACCEL_SPOOF_MODE to allow spoofing the current body detect mode. This is in preparation for the next CL which adds the command 'bodydetectmode'. BRANCH=none BUG=b:261141172 TEST=None Change-Id: Ief8fa8031cbe157a36386bcfba90d435676b5644 Signed-off-by: Tim Van Patten <timvp@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4277883 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* board/hyperdebug: Calculate SPI speed depending on clock speedJes B. Klinke2023-02-281-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Previous SPI code computed clock divisors based on the assumption that the "peripheral clock" was 16Mhz. I have since increased the core clock, and peripheral clock with it, to 104Mhz, in order to improve performance. This CL adds code to take the higher base clock into account when computing the divisor required to achieve a certain SPI clock speed. Also, if the requested QSPI speed is slower than what can be achieved with 8-bit divisor, clamp at the slowest possible speed (406 kbps). These SPI speeds are faster than what I would have liked. The STM32L5 chip supports a clock divisor between the core CPU clock and the peripheral clocks, which could have helped, but the EC codebase does not support it, and gets the UART speed calculations wrong if used. BUG=266832220 TEST=Observed opentitantool being able to flash via SPI Change-Id: I35ba83c978d8a6ac845a8a703cab4a9de0f486aa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4295368 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jes Klinke <jbk@chromium.org> Tested-by: Jes Klinke <jbk@chromium.org>
* board/hyperdebug: Avoid trampling ALTERNATE modeJes B. Klinke2023-02-281-88/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | The HyperDebug board will routinely be asked to reconfigure GPIO pins as input/open drain/push pull or tweak other aspects of the signals. It supports a "reinit" command to re-initialize all GPIO pins according to their default setting (input or UART/SPI/I2C alternate mode) as declared in gpio.inc. However, the reinit logic was flawed. GPIO_INT_BOTH is declared on almost every pin, for the case that the user later instructs HyperDebug to closely monitor a set of pins. The problem is that GPIO_INT_BOTH implicitly adds GPIO_INPUT, and this breaks the pins that are declared as GPIO_ALTERNATE in gpio.inc, because the code in gpio-f0-l.c will ignore GPIO_ALTERNATE if conflicting GPIO_INPUT is also given. With this change, SPI, I2C, and UART pins revert to the default non-GPIO mode, when the "reinit" command is issued. BUG=266832220 TEST=Observed opentitantool being able to flash via SPI Change-Id: Ic496ebbda561eb12dbbb506f382f8715c67b8d18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4295367 Commit-Queue: Jes Klinke <jbk@chromium.org> Tested-by: Jes Klinke <jbk@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* docs: Don't recommend 'stable' manifestBrian Norris2023-02-281-7/+3
| | | | | | | | | | | | | | | | | | This has been un-recommended for a while, and the developer guide link points to a missing anchor. Also replace 'trunk' with 'chromiumos'; the latter has been recommended for a while. BRANCH=none BUG=none TEST=none Change-Id: I5d7ba9601762f98d8a87af7bacc0163d7735476c Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4295357 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Tom Hughes <tomhughes@chromium.org>
* gpio: Wrap gpio_get_default_flags by gpio_get_flagsDaisuke Nojiri2023-02-283-10/+11
| | | | | | | | | | | | | | | | | | | | | | | Currently, gpio_get_flags returns the runtime GPIO flags while gpio_get_default_flags return the compile time flags. This patch makes gpio_get_flags call gpio_get_default_flags if CONFIG_GPIO_GET_EXTENDED isn't defined so that callers will get the runtime flags by default and fall back to the compile time flags only if runtime flags aren't available. This patch itself introduces no behavior change (since currently gpio_get_flags is defined only if CONFIG_GPIO_GET_EXTENDED is defined). Callers should individually switch to gpio_get_flags if it's calling gpio_get_default_flags by mistake. BUG=None BRANCH=None TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I714bf8ea135d3c91a8cefcc3a1ba577f5650200d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3712029 Reviewed-by: Jes Klinke <jbk@chromium.org>
* dibbi: Remove overridden typec_set_source_current_limit().Sam McNally2023-02-281-13/+0
| | | | | | | | | | | | | | | | With a PPC in use, overriding typec_set_source_current_limit() is no longer necessary. The implementation included some remnants of the pre-PPC implementation, causing 3A to map to 1.5A. BUG=b:270077963 TEST=dibbi charges at over 1.75A BRANCH=none Change-Id: I17f9bae3f2c168b9502734d11afc18c4e23a59bf Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4290947 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Commit-Queue: Peter Marheine <pmarheine@chromium.org>
* board/hyperdebug: Analog input supportJes B. Klinke2023-02-274-17/+88
| | | | | | | | | | | | | | | | | | The HyperDebug board is a versatile debugger, serving a similar purpose to uServo for development boards for Google Security Chips or other microcontrollers, rather than full Chromebooks. This change allows the ADC circuits of HyperDebug to be enabled, and allows about a dozen pins to be used as analog input. BUG=b:269621551 Change-Id: I437412260003712ac4a5ff27f969182612feb35e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4259216 Tested-by: Jes Klinke <jbk@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org> Auto-Submit: Jes Klinke <jbk@chromium.org>
* zephyr: config: drop PINMUX referencesFabio Baltieri2023-02-276-18/+0
| | | | | | | | | | | | | | | | Drop all CONFIG_PINMUX from various boards. The pinmux subsystem have been removed upstream and these are just leftover that were not doing anything anyway. BUG=none BRANCH=none TEST=cq dry run Cq-Depend: chromium:4291267 Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I24bbb31f6ed107652d57823f76957e563a333a8d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4288784 Reviewed-by: Al Semjonovs <asemjonovs@google.com>
* flash_fp_mcu: Remove any numbers from board namestabilize-15364.B-mainPatryk Duda2023-02-241-1/+5
| | | | | | | | | | | | | | | | | | | | Strongbad64 is a variant of strongbad board, so flash_fp_mcu should recognise it as strongbad similar to e.g. strongbad-kernelnext. BUG=b:270542279 BRANCH=none TEST=tast run <IP> firmware.Fp{FlashFpMcuHello,UpdaterSucceeded,\ AddEntropy,BioWash,CheckWriteProtect,RDP0,RDP1,ROCanUpdateRW,\ ObeysRollback,ROOnlyBootsValidRW,RWNoUpdateRO,ReadFlash,\ RebootPowerCycle,RebootToRO,SoftwareWriteProtect,SystemIsLocked,\ TpmSeed,Updater} Change-Id: Ifc69a1f3dd58d7f01d0da1439bebf9def7f52ee3 Signed-off-by: Patryk Duda <pdk@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4287435 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Tested-by: Patryk Duda <patrykd@google.com> Commit-Queue: Patryk Duda <patrykd@google.com>
* Add host event: EC_HOST_EVENT_BODY_DETECT_CHANGETim Van Patten2023-02-243-4/+7
| | | | | | | | | | | | | | | | | | | | | | Add the host event EC_HOST_EVENT_BODY_DETECT_CHANGE. Previously, the EC sent the host event EC_HOST_EVENT_MODE_CHANGE when body detection changed between lap/desk mode. However, that event is a wake event, which resulted in spurious AP wake events being triggered when the EC detected lap/desk mode changes while the AP was suspended. To resolve this, the new host event EC_HOST_EVENT_BODY_DETECT_CHANGE is being added, which will not be a wake event. BRANCH=none BUG=b:261141172 TEST=bodydetectmode on|off, verify host event is received Change-Id: Id03ffaea81da6321987ec4c517d22a8c1d72ba97 Signed-off-by: Tim Van Patten <timvp@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4255279 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* zephyr: Make sure EEPROM is initialized after I2C busAl Semjonovs2023-02-241-0/+3
| | | | | | | | | | | | | | | Upstream changed the order of initialization of devices. Make sure I2C is initialized before EEPROM. BUG=None BRANCH=NONE TEST=./twister -T zephyr/test Cq-Depend: chromium:4280782 Change-Id: Iff57ee114cbaa258b6c4a91ac1863e0546c997da Signed-off-by: Al Semjonovs <asemjonovs@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4290234 Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* zephyr: make bc1.2 optionalTing Shen2023-02-244-1/+71
| | | | | | | | | | | | | | | | For devices that don't support bc1.2, the code should not depend on anything related to usb_charge module (e.g. bc12_ports) BUG=b:269989432 TEST=zmake build --all BRANCH=none Change-Id: I6be47485bbd606f93a581d1638b3402337233b7c Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4274111 Reviewed-by: Eric Yilun Lin <yllin@google.com> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* geralt: disable RT9490 ADC on AC offEric Yilun Lin2023-02-241-0/+10
| | | | | | | | | | | | | | | | | | | | The RT9490 ADC is used as IBUS ADC, so this is not needed when there's no AC coming from the port. Disable it when AC is off. BUG=b:269708282 TEST=unplug power, in G3. $ dut-power -t 60 | grep @@ BRANCH=none LOW_COVERAGE_REASON=geralt early bringup Change-Id: I5dacd383420f942aa863b45a4e70d858fa7ac1f3 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4290092 Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Tested-by: Alvis Hsu <alvishsu@google.com> Tested-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* TCPMV2: Remove EC_CMD_USB_PD_DEV_INFOAbe Levkoy2023-02-2410-130/+25
| | | | | | | | | | | | | | | | Restrict the implementation of EC_CMD_USB_PD_DEV_INFO to TCPMv1. Remove code and storage to support it from TCPMv2. Remove a test covering it in TCPMv2. BUG=b:250015035 TEST=twister -T zephyr/test/drivers BRANCH=none LOW_COVERAGE_REASON=TCPMv1 is not supported Change-Id: If86e79eab739f8100fb677d7f2fc9c81ea5b45ef Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4265367 Reviewed-by: Diana Z <dzigterman@chromium.org>
* test: Document emul output gpio bugAaron Massey2023-02-231-0/+10
| | | | | | | | | | | | | | | | Document that using gpio_set_level() won't be observable from a gpio_get_level() unless the output gpio is also configured as an input gpio. BRANCH=none BUG=b:270601972 TEST=none Change-Id: Idf9e9cabd9f4f8db7b5a8045c6f1f9cb991d7819 Signed-off-by: Aaron Massey <aaronmassey@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4288470 Commit-Queue: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* Zephyr test: Add a test for mfallow commandstabilize-15361.B-mainDiana Z2023-02-236-0/+264
| | | | | | | | | | | | | | | The mfallow console command was created for developer testing to switch between preferred DP pin modes. Add a test for it, and have the test snoop the PD traffic to ensure the command functions correctly. BRANCH=None BUG=None TEST=./twister -T ./zephyr/test Change-Id: I98c02ecd4cfd9b2df57adb900df8a0d83af44d22 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4283690 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* TCPM: Correct mfallow error returnsDiana Z2023-02-232-4/+4
| | | | | | | | | | | | | | The mfallow command returns the incorrect errors for parameters being wrong. BRANCH=None BUG=None TEST=zephyr mfallow console command test Change-Id: I475cc8283d6bb926dd330d7434af5d7d84f21979 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4283689 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* Zephyr test: Add HPD GPIO to DP alt mode testDiana Z2023-02-235-2/+151
| | | | | | | | | | | | | | Add the HPD GPIO configuration to the DP alt mode tests so the module can test for HPD to be set and cleared. BRANCH=None BUG=b:170372521,b:159856063 TEST=./twister -T ./zephyr/test Change-Id: I344631c7548ee70914c2ab434216aac73a3fad4c Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4283688 Reviewed-by: Al Semjonovs <asemjonovs@google.com>
* TCPM: Divorce v1 and v2 alternate mode handlingDiana Z2023-02-2310-819/+1196
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Retire the common DFP mode support to the TCPMv1 specific module from whence it came. Since TCPMv1 does not support TBT, all TBT functions can be removed from its copy. Move the DFP support for TCPMv2 to the DPM and its modules. Note that the reduced redundancy in tracking active alternate modes means that we can remove the majority of the "generic" mode handling. This results in approximately 1k additional free flash space for boards. For now, leave the svdm_dp_* interfaces in place as boards are using them as entry points to modify the DP mode sequencing. Also leave a stripped down version of pd_dfp_exit_mode() in place, though this would be worth consolidating to a new API in the future. BRANCH=None BUG=b:170372521,b:159856063 TEST=all unit tests passing, confirm display works on nipperkin (ECOS) and skyrim (zephyr) boards, USB4 and TBT regression tested on skolas LOW_COVERAGE_REASON=b/243151272 filed for improving TBT coverage, common/mock files no longer relevant Change-Id: Idbe59bc7c6a0ab6103e8fa158e69275a142f8a16 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4211277 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPM: Remove active mode caps from the PE console commandDiana Z2023-02-231-10/+0
| | | | | | | | | | | | | | | | | The PE console command prints out the active mode capabilities. However, this is just the first mode position for all the alternate modes we currently support. Remove this print in the interest of being able to clean up the VDM interfaces more easily. BRANCH=None BUG=None TEST=CQ+1 Change-Id: Ib6c1ec6161ce5a217fcd7294fb3006e8aa5382b7 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4283687 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* zephyr: Handle scenario where an assert is not found in the logAl Semjonovs2023-02-231-1/+7
| | | | | | | | | | | | | | | | | Sometimes the assert occurs in the setup of a test which is outside of the `START` and `FAIL` markers of a test leaving the test with no valid assertion marker. BUG=None BRANCH=NONE TEST=Add failing assert in setup, ./twister -T zephyr/test Change-Id: I96999fe2eb40b33390df8c7ac24a48f8050b5767 Signed-off-by: Al Semjonovs <asemjonovs@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4287588 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Simon Glass <sjg@chromium.org>
* dibbi: add back the MKBP event for the power keystabilize-15359.B-mainZhuohao Lee2023-02-231-4/+0
| | | | | | | | | | | | | | The MKBP event is needed otherwise the UI won't sense the power key event correctly. BUG=b:270501058 BRANCH=none TEST=deployed to the device and press power key in UI Change-Id: I8167f551f304bdf621e881bd653472e94a3615d5 Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4286384 Reviewed-by: Sam McNally <sammc@chromium.org>
* dibbi: Always enable EN_PP5000.Sam McNally2023-02-232-11/+2
| | | | | | | | | | | BUG=b:269050050 TEST=Boot to OS on USB-C power BRANCH=none Change-Id: If2334dc5408fd0f86c7ae2880168e3653dfa22bc Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4240913 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* dibbi: Update temp sensors.Sam McNally2023-02-232-2/+17
| | | | | | | | | | | | | Temp sensor 2 is SoC power; temp sensor 3 is ambient. BUG=b:268309238 TEST=dibbi reports temperature values for 3 sensors BRANCH=none Change-Id: I0601ee49bdaf3d139931d37880f7934857837d2c Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4273929 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* Increase supported host events to 64Tim Van Patten2023-02-222-2/+13
| | | | | | | | | | | | | | | | | | | | | | ectool is hard-coded to support 32 host events even though the EC supports 64 host events. Add an enum value to indicate what the current count of the host events is, so it can used by ectool in place of magic numbers. Also add an assert to enforce the 64 host event limit. BRANCH=none BUG=b:261141172 TEST=Manually build and flash, verify device boots TEST=ectool version Change-Id: If9724cf905a7d2eb42a2ad67c5e1da784ca05e8e Signed-off-by: Tim Van Patten <timvp@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4261961 Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* mtlrvp: rex: Send VW based overcurrent to APVijay Hiremath2023-02-222-6/+19
| | | | | | | | | | | | | | | | Meteorlake PCH uses Virtual Wire for over current error, hence Send 'Over Current Virtual Wire' eSPI signal. BUG=b:243120083 BRANCH=none TEST=Observed 'usb usb3-portX: over-current condition' on MTLRVP Kernel console Change-Id: Ia4ac4b71622e91377410458efd57b1fa75c985a7 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3863940 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Brandon Breitenstein <brandon.breitenstein@intel.corp-partner.google.com>
* zephyr/test/skyrim: Kconfig cleanupRobert Zieba2023-02-221-3/+0
| | | | | | | | | | | | | Cleanup unneeded default values. BRANCH=none BUG=b:247151116 TEST=Ran skyrim tests Change-Id: I2d99543db54f0b96deab54b9e0cb1325dd8863b1 Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4263561 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* zephyr/test/skyrim: Finish general refactorRobert Zieba2023-02-2213-2/+21
| | | | | | | | | | | | | Finish general refactor by moving remaining variant-specific code. BRANCH=none BUG=b:247151116 TEST=Ran skyrim tests Change-Id: I8c7f1c612292e96a66daf0df08e968c39293b168 Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4263560 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* zephyr/test/skyrim: Refactor USB mux config testRobert Zieba2023-02-229-13/+56
| | | | | | | | | | | | | | Move USB mux config test to match new code structure. Add fake functions to allow frostflow test to compile pending implementation of full test. BRANCH=none BUG=b:247151116 TEST=Ran skyrim tests Change-Id: I63d62b9957846dd761c83db9f58f9900f722be45 Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4263559 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* zephyr/test/skyrim: Refactor fan testRobert Zieba2023-02-224-5/+11
| | | | | | | | | | | | | | Move fan test to match new code structure. BRANCH=none BUG=b:247151116 TEST=Ran skyrim tests Change-Id: I0d243d0836b62526f73f89bce35d72e672833c27 Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4263558 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr/test/skyrim: Refactor alt charger testsRobert Zieba2023-02-224-5/+11
| | | | | | | | | | | | | | Refactor alt charger tests to match new code structure. BRANCH=none BUG=b:247151116 TEST=Ran skyrim tests Change-Id: I18b6c4bd01c6451172d8bceb66e1ade73a87634b Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4263557 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* zephyr/test/skyrim: Refactor ppc_config testsRobert Zieba2023-02-227-15/+24
| | | | | | | | | | | | | | Move ppc_config tests to match new code structure. BRANCH=none BUG=b:247151116 TEST=Ran skyrim tests Change-Id: If6237b909a92b775006b9125eccf1b3c0bd341ee Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4263556 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr/test/skyrim: Refactor baseboard codeRobert Zieba2023-02-223-1/+6
| | | | | | | | | | | | | | Move baseboard pd tests to match new code structure. BRANCH=none BUG=b:247151116 TEST=Ran tests Change-Id: I180b2681db3b526966dd9e16020dfe77b998c488 Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4263555 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr/test/skyrim: Refactor common codeRobert Zieba2023-02-223-1/+8
| | | | | | | | | | | | | | Move common code as the first step of a larger refactor. BRANCH=none BUG=b:247151116 TEST=Ran skyrim tests Change-Id: Ic527a71629d899e3f46463898373ded7314d9867 Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4263554 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Skyrim: Remove i2c transactions from interrupt contextDiana Z2023-02-221-2/+10
| | | | | | | | | | | | | | | | | | Calls to retrieve the status of GPIOs on the I/O expander require running i2c commands, which should not be run from the interrupt context. Instead, use a deferred call to schedule these to be processed. BRANCH=None BUG=b:268491130 TEST=on frostflow, ensure overcurrent tool no longer causes a watchdog reset Change-Id: Ia7e3bd673ddc5a995cb846a0807cfaebcd43d36b Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4277882 Tested-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Reviewed-by: Robert Zieba <robertzieba@google.com>
* osiris,volmar: disable TCPC VCONNBoris Mittelberg2023-02-222-4/+1
| | | | | | | | | | | | | | | | | Disable TCPC sourcing VCONN via SYV682. The CC pins on SYV682 are not 5V tolerant, use internal VCONN sourcing instead. BUG=b:180973460 BRANCH=none TEST=make buildall Change-Id: I5a852a998cfcef613c720e200b542e43eece9cd5 Signed-off-by: Boris Mittelberg <bmbm@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4279301 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: YH Lin <yueherngl@chromium.org> Commit-Queue: YH Lin <yueherngl@chromium.org>
* mt8186,mt8188: force turning off PMIC at S3S5Eric Yilun Lin2023-02-222-96/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL ensures that before going to S5, the PMIC has turned off the power source to AP, and we can move SHUTDOWN_COMPLETE to S3S5. It did this by asserting EC_PMIC_EN_ODL at S3S5. For pressing button shutdown, the flow becomes: S0 -> hold powerkey 8 seconds -> S3 -> S3S5 -> hold EC_PMIC_EN_ODL for 8 seconds -> S5 -> G3 For the other shutdowns: S0 -> S3S5 -> hold EC_PMIC_EN_ODL for 8 seconds -> S5 -> G3 Also, the AP won't boot when it's turning off the PMIC (S3S5) until it goes to S5. BUG=b:242012415 b:267268982 TEST=On Steelix, Tentacruel and Geralt: * Cold reset: $ dut-control cold_reset:on sleep:0.2 cold_reset:off Result: G3 -> S0 * Long power press to shutdown: $ dut-control dut-control power_key:8.2 Result: S0 -> S5 -> G3 * Long power press to power-on but then shutdown: $ dut-control dut-control power_key:9.2 Result: G3 -> S0 -> S5 -> G3 * Short power press to power-on: $ dut-control dut-control power_key:tab Result: G3 -> S0 * Console command: apreset Result: S0 -> S0, AP reboots * Console command: apshutdown Result: S0 -> S5 -> G3 * Lid open to power-on: $ dut-control lid_open:no sleep:0.2 lid_open:yes Result: G3 -> S0 * AP console: reboots Reulst: S0 -> S0 * AP console: poweroff Reulst: S0 -> G3 * Short power press to power-on: $ dut-control dut-control power_key:tab Result: G3 -> S0 BRANCH=none Change-Id: Iacaa3dbcdafd61b2f3371e2ba376ebdcf29659ff Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4269797 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Tested-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com>
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