| Commit message (Collapse) | Author | Age | Files | Lines |
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ctn730 isn't immediately ready for i2c write after normal mode
initialization.
This patch adds 5 msec delay between INITIALIZATION and ENABLE
commands.
BUG=b:173235954, b:178096436
BRANCH=trogdor
TEST=CoachZ
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: Ic3c51212c2f9a7bca827b040166aa18ec0a06b63
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2656765
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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ctn730 push-pulls the IRQ line. When it's off, the line should stay
low to prevent the EC from getting false IRQ.
This patch also configures the ctn730 reset line as GPIO_ODR_HIGH so
that the line is kept high and a reset can be issued if needed.
BUG=b:173235954, b:178096436
BRANCH=trogdor
TEST=CoachZ. Verified reset line goes up and down by gpioset.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I0023d9a980826a6ea4741459a0b65c2cc11e6106
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2656766
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Add support to C1, assign the gpio to put the PPC in FRS mode and add
the config options.
Volteer boards need the SYV682B rework to support FRS, but this will not
break existing boards. FRS will be enabled but fail, and enter
ErrorRecovery, enter Unattached.SNK, or successfully FRS depending on
the situation.
Volteer HW can supply 3A per port, so changes to reserve the FRS current
aren't needed to enable it on Volteer.
BUG=b:148144711
TEST=Check that FRS is functional. FRS devices should not re-enumerate
after adapter power is removed. Test with the SYV682B and using both the
PS8815 and RT1715 TCPCs.
BRANCH=none
Change-Id: I7a599f1c350529d910a331f1ebc78ab41ff44a24
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2057495
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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This allows CoachZ to wake from suspend when a stylus is attached to
the WLC port.
BUG=b:177664326, b:173235954
BRANCH=trogdor
TEST=Verified on CoachZ.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I242ef509ef220e717d1888d08225cdf50b8eb217
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2633649
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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CL:2633981 was created when flags in usb_mux was set using bitwise OR
assignment. During review, all set and clear flag operations in usb_mux
was changed to use atomic functions. This CL changes recently added
flag set to atomic one.
BUG=b:151155658
BRANCH=none
TEST=make buildall
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I10813deaa8b9f4799d29f06f8fe482974257b715
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2656035
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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After the removal of the wait argument in task_set_event function,
the comment should be deleted.
BUG=b:172360521
BRANCH=none
TEST=none
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I2a25baece6851dd3cdf82690574148c3ab02b248
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2592488
Commit-Queue: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The wait argument of task_set_event was used in tests. Replace it in a
consistent way with task_wait_event(0) in all tests.
BUG=b:172360521
BRANCH=none
TEST=run tests
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I2bb7c2cf3fb538c2ed08e60791465f98e7c47700
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2592489
Commit-Queue: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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There are 3 battery configs present for Volteer board in ECOS based
firmware:
-CONFIG_PLATFORM_EC_BATTERY_CUT_OFF
-CONFIG_PLATFORM_EC_BATTERY_HW_PRESENT_CUSTOM
-CONFIG_PLATFORM_EC_BATTERY_REVIVE_DISCONNECT
so enable them also on Zephyr.
BUG=b:175248556
BRANCH=none
TEST=Build Volteer with the configs enabled
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I0022881c61eb3c9c3550f3a9a7e05f9077b55a2e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648681
Commit-Queue: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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There are 3 battery configs missing for Zephyr:
-CONFIG_PLATFORM_EC_BATTERY_CUT_OFF
-CONFIG_PLATFORM_EC_BATTERY_HW_PRESENT_CUSTOM
-CONFIG_PLATFORM_EC_BATTERY_REVIVE_DISCONNECT
Add them to the Kconfig.battery.
BUG=b:177604307
BRANCH=none
TEST=Build Zephyr with the configs enabled
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I4e3c834470b9f4977b3f779b4246868feaea4bd7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645092
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Simon Glass <sjg@chromium.org>
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BRANCH=none
BUG=b:178648877
TEST=view in gitiles
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I0ac5581ba7bc512234d40dbf34222422afa9c725
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2650551
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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The up-to-date program/zork/program.star has a new LTE_PRESENT bit in
the fw_config.
Define it, so we can use it to steer the USB 3 mux for the LTE modem.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=b:178457388
BUG=b:177389383
BRANCH=zork
TEST=On a vilboz360 LTE, program the CBI as for the next production
batch (e.g. 'sudo ectool cbi set 6 0x20099200 4') then run with the
next CL and see the LTE modem enumerated as USB 3.
Change-Id: I7834aa5bc8a7ba45debbc1f5c20d82f04de8d84b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648108
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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1. Using CONFIG_KEYBOARD_KEYPAD to choose actual_key_mask w or w/o keypad.
2. Enable keypad function on Magpie.
3. Disable scan KSO13 & 14 and modify actual_key_mask for SKU w/o keypad
on Magolor.
BUG=b:173908972
BRANCH=cros/main
TEST=`make buildall` both PASS
Change-Id: Ia23945f01ca142926551fe3f5a6bb83e43e29ff2
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2637163
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Originally bc12_detect function not only detects BC12 status but also
update result to charge manager. Now bc12_detect can be called not only
when VBUS is on but also off because of CL:2626791. The result is that
charge manager would report charging available even if VBUS is off.
As a result, we split charger manager update from bc12_detect as the
single function so bc12_detect can be called when VBUS is on or off but
charger manager update for available charging will be triggered when
VBUS is on.
BUG=b:177845650, b:177265749, b:178509655
BRANCH=octopus
TEST=make buildall -j 8
TEST=check online parameter in /sys/class/power_supply can report
correct value when PD adapter or BC12 charger is plugged in/out.
TEST=check `ectool usbpdpower` can report correct values for PD adapter
and BC12 charger.
Change-Id: Ifc4f23edb9272177a6b3637b812b86cf9bef2378
Signed-off-by: Marco Chen <marcochen@chromium.org>
Signed-off-by: Marco Chen <marcochen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2652112
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Some boards (eg. ampton) uses TCPC/MUX chips (eg. PS8751) as muxers
only. In this case CC lines are simply not connected. Nevertheless
setting CC lines to approptiate value can decrease power consumption.
This patch implements custom PS8xxx MUX driver which is responsible for
setting RP on both CC lines on Low Power Mode enter when this TCPC is
used as muxer only (USB_MUX_FLAG_NOT_TCPC flag is set). Due to flash
size constraints, this driver is only available when appropriate config
is defined.
Unfortunately, RP can't be set once during initialization because
after switching mux appropriately there is no connection. To work
properly RD should be set on both CC lines. Changing RD -> RP after
switching mux doesn't work (breaks connection), even with some delay
before switching to RP again.
Moreover, when PS8751 is in standby mode, first I2C transaction always
fails. Documentation suggests that device could be woken up by
performing I2C read from PS8XXX_REG_I2C_DEBUGGING_ENABLE register.
For more information about purpose of this change please refer to
b:113830171#comment18 and further.
BUG=b:151155658
BRANCH=none
TEST=Flash EC ToT on Ampton. Check if power consumption is lower.
Don't connect devices to tested USB-C port.
Issue 'i2cxfer r 2 0xB 0x1A' 2 times within 2 seconds and check
if it returns 0x05 (DRP disabled, RP default, CC1, CC2 set to RP).
Repeat above with command 'i2cxfer r 4 0xB 0x1A'.
NOTE: PS8751 goes to Low Power Mode automatically after 2 seconds
when RP is set that is why we need to read register 2 times, first
to wake up device, second to read value.
TEST=Connect device to USB-C port, check in dmesg that device is
recognised as SuperSpeed device. Repeat this test 10 times. Check
also different rotation.
Change-Id: Ie1bac6caa9912c024c87792536d7a35863fa96a0
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2614618
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
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Fix rotation matrix of base motion sensor
BUG=b:178338414
BRANCH=master
TEST=Using ectool 'motionsense' verified lid angle now goes
from 0 to 360 and swtiches to tablet mode after crossing 200
threshold.
Change-Id: Ica60a90270bddbfad4117ecec422e72502284018
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2652109
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Rather than passing in the port and iterating over the global
spi_devices variable, pass in the specific spi_device that is being
enabled/disabled. The spi_device_t struct has the port.
This change makes the functions in spi.h more consistent since they now
all take a spi_device_t*. This change is the first step in making the
SPI configuration more dynamic.
BRANCH=none
BUG=b:177908650
TEST=git grep 'spi_enable(CONFIG' => no results
TEST=make buildall
TEST=Flash dragonclaw v0.2 and view console to verify FP sensor ID
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I64124e0ebcf898e88496acb77703b5f59ae931c2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2654081
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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CL:2644843 modified the TC state machine to prevent changing the USB mux
state from the CHIPSET task. However, that change also caused
transitions to and from suspend states to update the mux, clearing any
althernate mode information (DP, TBT, and USB4).
Update the TC so that only chipset startup and shutdown transitions
update the USB mux.
BUG=none
BRANCH=volteer
TEST=make buildall
TEST=Connect USB4 partner, verify USB4 entered. Force AP into S0ix and
resume, verify USB4 mode is still active.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: If6e9c3a5f017918a985f78a09873f02ccd7121fd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2653339
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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On EC chips that support CONFIG_CHIP_DATA_IN_INIT_ROM, the code
execution RAM is smaller than flash, leaving some flash unused.
The CONFIG_CHIP_DATA_IN_INIT_ROM moves the .data section into the unused
flash area, where it is copied directly into data RAM at startup.
Add a new attribute __const_data that allows constant data objects to
link into the .data section instead of .rodata.
This saves 1600 bytes of RO and RW flash space on boards that enable
CONFIG_CHIP_DATA_IN_INIT_ROM.
delbin_npcx796fc
eldrid_npcx796fc
halvor
lindar
lingcod
magolor_legacy
malefor
metaknight_legacy
terrador
todor
trondo
voema
volteer_apmodeentry
volteer
waddledoo
BUG=none
BRANCH=none
TEST=make buildall
TEST=boot Volteer and verify USB-PD operation
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ibb97a499442bbab8185b1d07f8867a7af1e793f4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2651208
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Rename variables and comments for the ANX7447 driver to match current
i2c naming conventions.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I42ea7b190bf82c900a4ce9bc5ac49f155d9ecf14
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649355
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Rename i2c variables in the fusb302 driver and c-file references.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ifaf7984c52fc197403d447e00c02af036e54987e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649354
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Rename i2c variables in fusb307 driver.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ib1e4b25a0b2b233d8d4c828590cb48b771faa418
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649353
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Rename i2c comments in PI3USB2x532 driver to match current naming.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I08e7b94cc3c1cbe7b2f5e1a9dc9f0757a7cd85ea
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649352
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Rename i2c comments in SBI-TSI temperature driver to match current
naming.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ib1c281964105624a733057ed896efcd9b1e357ea
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649351
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
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Add a Kconfig option for enabling the CONFIG_BRINGUP platform/ec
option: CONFIG_PLATFORM_EC_BRINGUP, and make a command line flag in
"zmake configure" for toggling this on: --bringup.
BUG=none
BRANCH=none
TEST=zmake configure -B ~/volteer-build -b --bringup zephyr/projects/volteer
flash on volteer
observe bringup functions (siglog, power on delay, etc)
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Ib915abba7c5777aa1d9391b55b1f912e53a5fdf5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2631353
Commit-Queue: Yuval Peress <peress@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
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There are 4 charger configs present for Volteer board in ECOS based
firmware:
-CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON
-CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC
-CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT
-CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON
so enable them also on Zephyr.
BUG=b:175881762
BRANCH=none
TEST=Build Volteer with the configs enabled
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: Iba02e347176367ad7c69fd4d81dac0665ef1a8fb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2652745
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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There are 3 battery configs missing for Zephyr:
-CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON
-CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC
-CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT
-CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON
Add them to the Kconfig.usbc
BUG=b:177604307
BRANCH=none
TEST=Build Volteer board with the configs enabled
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I0700138a74f9879caf1c6f259377a376bde45364
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648487
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This patch implements the ELAN FP API, which is used to control the
ELAN FP sensor and matching algorithm on stm32f4.
Therefore, we reduce the size of TEMPLATE_SIZE on STM32f4 and
implements elan sensor reset API.
BRANCH=None
BUG=None
TEST=We build on bloonchipper and dartmonkey, and testing Elan sensor
with libelan_515_m4/m7.a and libelan_80_m4/m7.a successfully.
Signed-off-by: herman lin <herman.lin@emc.com.tw>
Change-Id: Iaf4b85744a49a3ae12f20d91740515b7dc198e56
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643744
Reviewed-by: Yicheng Li <yichengli@chromium.org>
Commit-Queue: Yicheng Li <yichengli@chromium.org>
Tested-by: Yicheng Li <yichengli@chromium.org>
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Change base accel sensor to BMA253.
BUG=b:169356807
BRANCH=main
TEST=Check "ectool motionsense" get sensor data.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I2edd83c316ab3aed1d6f89fed077d0bdc54d7b8c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649289
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This patch adds checking if I2C writes to PS8751 muxer succeded.
There are many reasons causing fail during mux_write(), one of them
is that device is in standby mode. With this CL, problems will be
reported to developer.
BUG=b:151155658
BRANCH=none
TEST=make -j buildall
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: Ide342ed8c713e58d91880d41a584c56866f95fec
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2633982
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Current code allows setting or getting muxer state without initializing
it. During mux initialization driver can prepare some internal
structures for use by other driver functions.
This patch implements checking if there was at least one mux
initialization before performing action.
BUG=b:151155658
BRANCH=none
TEST=Flash ToT EC on octopus (eg. ampton) board. Make sure that muxer
initialization is performed before performing any other muxer
action.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I2766305a49d377bd9a0ac91eea7988e58eb1059a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2633981
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Correct the binary search interval for small x.
The range should be at least [0, sqrt(2 ** 31)] ~= [0, 46341].
Also fixed some corner cases and added unit test for it.
BUG=b:177384512
TEST=1)`watch -n 0.3 ectool motionsense lid_angle`
verify the angle looks reasonable.
2) TEST_LIST_HOST=fp make runhosttests
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I394fe3a59ac51ec4491a24399848f179c1074b95
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2646041
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Yilin Yang (kerker) <kerker@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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This change introduces a new driver for the battery
backed RAM on the npcx chipset. The API includes
the ability to check various status fields as well
as reading/writing to the memory. To add this to
the devicetree we must use both the `memory` and
`status` register names.
BRANCH=none
BUG=b:174481378
TEST=zmake testall
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I576c3c30d970b2878aee712f6dda3579d0960e76
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649462
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The Makefile uses awk to find a section named FLASH in the output map
file and parses the size of the section to determine the free space
remaining.
NPCX RO images include sections named FLASH and FLASH_HDR. Modify the
awk command so the FLASH_HDR section isn't used by mistake.
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I3e420fbb45fdebc4f1e2578f819bbbce4994d2a8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2640873
Commit-Queue: caveh jalali <caveh@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
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The NPCX flash layout was setting the erase size based on RO image size
to ensure the host can erase the entire image using.
When 1/2 flash is smaller than code RAM, the NPCX reserves one 4 KiB
flash block for the NPCX header. This has the side effect of reducing
the erase block size from 64 KiB to 4 KiB, and introduces a boot time
regression when processing flash blocks.
CL:2325764 modified the common flash support to allow the host to
program up to CONFIG_WP_STORAGE_SIZE bytes for the RO image and
CONFIG_EC_WRITABLE_STORAGE_SIZE bytes for the RW image.
Set the erase size to a fixed value of 64 KiB, with build checks
to verify the total flash size is a multiple of 64 KiB.
Both the RO and RW image starting addresses are already aligned to at
least a 64 KiB boundary, so there is no impact when the RW firmware
is upgraded.
BUG=b:175115527
BRANCH=volteer
TEST=make buildall
TEST=Boot EC on Delbin with NPCX797FC
TEST=Increase the RW image size to 0x3ed1c (maximum is 0x3F000) and
verify EC software sync is successful at updating the image.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I8823da2b909dfa36646b411a146001c618ce0e8c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643579
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
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Enable/disable teblet mode by fw_config
BUG=b:173908972
BRANCH=cros/main
TEST=`make buildall` PASS
Change-Id: Ia375fd18e8f910a547351b5c8b96c5e0ce16d383
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644795
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Add basic panic implementation for Zephyr. Not using any fancy shared
or always-on memory for now ... need to resolve how that will be
handled later.
BUG=b:178011288
BRANCH=none
TEST=run various crash commands on volteer, observe output
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Ia1ce386f738283a2a2b9b60ef7e0bf97f8317837
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645687
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Rename i2c comments in the BB retimer to reflect current naming
conventions.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I8160b851b84795ffd13934c2be2e12fd2a04c5f5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649350
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Rename i2c related comments and variables in the PS8802 driver.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Id52177261edc604f610ace0e72b4d42f09a5de0c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649349
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Added minimum required uart_* functions for panic to work, using
printk as backend. Probably should switch filling-out enough to
support uart_buffering.c in the future, requiring switching to
Zephyr's UART drivers instead of printk().
BUG=b:178033156,b:178011288
BRANCH=none
TEST=compile with panic_output.c
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I2879cd05cd858d13241e6fc1a7f818b6649e4bd6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649497
Reviewed-by: Keith Short <keithshort@chromium.org>
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These instructions clarify how to use J-Link/J-Trace to flash the FPMCU
dev boards.
BRANCH=none
BUG=b:178124518
TEST=view in gitiles
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I73e0774e0721001f229e3a608262a64129d2ab44
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643588
Reviewed-by: Josie Nordrum <josienordrum@google.com>
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Enable MKBP event for Zephyr on Volteer.
BUG=b:173507858
BRANCH=none
TEST=make buildall -j8
build volteer on zephyr
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.corp-partner.google.com>
Change-Id: I0c663f5a0bde8dece09c48a012de8f1903dd82d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639856
Reviewed-by: Keith Short <keithshort@chromium.org>
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Add MKBP support to zephyr.
BUG=b:173507858
BRANCH=none
TEST=make buildall -j8
build volteer on zephyr
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.corp-partner.google.com>
Change-Id: I9b7d979241b0df5dc0fa5d9741f05dc9875189ab
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639854
Reviewed-by: Keith Short <keithshort@chromium.org>
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1. Base on schematics, modify the motion sensor related setting to
BMI160 and KX022.
2. Modify base rotation matrix depend on schematics.
BUG=b:178451001
BRANCH=firmware-zork-13434.B
TEST=make BOARD=shuboz
1. Using "ectool motionsense" check x/y/z value.
2. Using "ectool motionsense lid_angle" check angle.
Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com>
Change-Id: I6f07e6795b6a28a805270250a0ef78babf4a5d75
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649886
Tested-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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NPCX chip uses MFT as a tachometer module. The counter clock select is
not synced with the datasheet. For the LFCLK, the value of clock select
should be set to 4. This CL fix the LFCLK clock enumeration.
BUG=b:178376892
BRANCH=None
TEST=pass buildall
TEST=use PWM to generate the waveform to the tachometer. Check that the
tachometer gets the correct value by 'faninfo'.
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I22f47e0de403b144a8604e818db8f230764b4fc0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649292
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Add new battery AP15O5L
BUG=b:176860886
BRANCH=main
TEST=1) See "[found batt:PANASONIC KT00305013]" on EC console
2) battery readings looks reasonable.
3) cutoff workable.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: Ie2522ab2a782def304ae2588b7f34d7422e97345
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639418
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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During power contract negotiation, after sending Accept, wait for
tSrcTransition before transitioning the supply and sending PS_RDY. See
PD r3.0, v2.0, Table 7-22.
BUG=b:173023378
TEST=Pass TDA.2.1.2.2 using MQP compliance tester (or at least don't
fail due to sending PS_RDY too early).
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I76e31ff5df6bfd71f78642bda25e1e8f9f590f9c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644179
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: JC Huang <j.c.huang@quanta.corp-partner.google.com>
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No projects set this anymore.
BUG=b:178363068
BRANCH=none
TEST=zmake testall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Ib28017048695a5dbabaead83de49c85363fde665
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2647537
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
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coreboot-sdk is working now, this hack can go away.
BUG=b:178363068
BRANCH=none
TEST=compile without -t coreboot-sdk, run on device
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Ifc5b05557ecf623e709bfd2b464648bd24197e1c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2647536
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
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gcc's libgcc is built with a compile time notion of what an
architecture's ABI will look like. If that happens to be wrong, you're
out of luck.
Instead, use our own implementation which, while written in assembly
(and as such not as flexible as it could be) is processed with the
right set of flags.
BUG=b:178363068
BRANCH=none
TEST=zephyr boots on kohaku when built with coreboot-sdk.
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Change-Id: I6d27bb48478081b6c2ff8927734492282e55e898
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648666
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
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CTS tests are failing because sensor values from axis 1 and 2 are
negated. When the test expects 360 degrees, -360 degrees gets reported.
Set the standard base translation matrix to resolve this.
BUG=b:175996778
TEST=Try CTS
BRANCH=None
Signed-off-by: Evan Green <evgreen@chromium.org>
Change-Id: I9ede658cef042caf72b81d08e4c47de4c7b5e820
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648730
Tested-by: Kazuhiro Inaba <kinaba@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Kazuhiro Inaba <kinaba@chromium.org>
Commit-Queue: Kazuhiro Inaba <kinaba@chromium.org>
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