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* Snow: Make i2c slave work in interrupt contextCharlie Mooney2012-08-153-8/+39
| | | | | | | | | | | | | | | | | | | To make software Sync work, they need to be able to call i2c_send_response() from within host_command_received() while still in an interrupt context. This won't work if you're using interrupts to know when the dma transfer has completed. This puts a switch in that will toggle between interrupts and polling the interrupt flag based on if the program in in an interrupt context or not. BUG=chrome-os-partner:12688 TEST=Run "battery" "pmu" boot the machine and use the keyboard. Then replace the in_interrupt_context() function with "0" to force it to use polling and repeat the test. Everything should work in both cases. Change-Id: Ie989c1a6ad29529a7ec390065b310ad4af8cf0bf Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30483 Reviewed-by: Simon Glass <sjg@chromium.org>
* Snow: Switching i2c from polling to InterruptsCharlie Mooney2012-08-143-57/+98
| | | | | | | | | | | | | | | | | | | | | | | | | To reduce the amount of time spent polling to see if the i2c bus has completed its transfer, I'm converting it over to interrupts. Before starting a dma transfer, the i2c code now enables dma interrupts with an ISR that will just wake up the i2c task when the transfer is complete. This leaves the cpu free while the dma is handling all the i2c work. The slave-receiver didn't require any updates as it is already interrupt driven, via the i2c events. The other three cases: master-receiver, master-transmitter, and slave-transmitter, have all been converted over to use the dma interrupts. With these changes, the cpu should spend very little time waiting for i2c transfers to complete. BUG=chrome-os-partner:12405 TEST=To test the master modes, from the EC console run "battery" and "pmu." If those work, then master mode is functioning. For slave modes, power on the machine and monitor the cpu console for errors. When it's on, try typing and confirm there are no errors there either. Change-Id: I1ca020911b7be6762389ca2b858b2b973f8754bc Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30229 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* Include 0xea byte as the last byte in RO/RW imagesRandall Spangler2012-08-142-6/+17
| | | | | | | | | | | | | | | | | | | | | | | This is better than having the 0xea byte only appended in ec.bin, since now the byte is present in ec.RW.flat and ec.RO.flat. Needed for EC software sync. BUG=chrome-os-partner:12412 BRANCH=link,snow CQ-DEPEND=30305 TEST=manual 1. xxd ec.RW.bin | tail; should end with 0xea 2. xxd -g4 build/link/ec.bin | grep -C3 454e44ea That word should be the last one before a bunch of 0xfffffff bytes. There should be 2 matches (since there's RO and RW firmware) Change-Id: I0de5cc78083f1a9b49202fbe2305a3101f401db3 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30303 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Handle IRQ from TPS65090, pass AC status to APSimon Que2012-08-148-47/+90
| | | | | | | | | | | | | | | | | | | Changes made by this patch: 1. Create IRQ handler for the TPS65090 IRQ. IRQ wakes up charger task. 2. Charger task sets the AC_STATUS GPIO based on the AC status. 3. Initialize PMU at power-on. BRANCH=snow BUG=chrome-os-partner:11739 TEST=Power on the system, with servo v2 connected to EC console. Plug and unplug AC. The IRQ handler should be triggered. Change-Id: Ice23411c275111fdb56d2c47ba28c3c44dee4d71 Signed-off-by: Simon Que <sque@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29914 Commit-Ready: Rong Chang <rongchang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* drop get_default_board usageMike Frysinger2012-08-141-2/+0
| | | | | | | | | | | | The common code will set up DEFAULT_BOARD for us automatically now. BUG=None TEST=`flash_ec --help` showed the right default board Change-Id: I02a009bba757c78fa5606debe567be6f6bc4f742 Signed-off-by: Mike Frysinger <vapier@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30261 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Initialize temperature reading buffer to sane valuesVic Yang2012-08-134-5/+57
| | | | | | | | | | | | | | This is to prevent temperature value being read before the first time we poll sensors causes unexpected error. BUG=chrome-os-partner:12614 TEST="sysjump RW" and then "temps" immediately. Check all temperature readings are near 300 K. Change-Id: I5c84d9696b4876fdfcf14c3a416cbc09c040d4ee Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30138 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Lucas: Switching i2c slave-mode over to dmaCharlie Mooney2012-08-131-42/+42
| | | | | | | | | | | | | | | | | | | | | | | | There was an errata issued for the i2c on STMF100xx. It specified that not all guarantees apply to i2c on these chips if you are not using DMA to load the data. To prevent problems, I am converting the i2c code on the EC for Lucas over to DMA. The master functionality was already converted over in change I2fb80dcb, this change switches over the slave-mode i2c code to also use dma now, instead of polling, as per the errata. BUG=chrome-os-partner:10901 TEST=The slave mode i2c code is used heavily during normal use of the Chromebook, including boot up and using the keyboard. Start up the cpu uart console, and boot the system. Then once it's fulling started, make sure that pressing keys does not cause any errors and that the key presses are working. Change-Id: I8d665054bccbd3ca9b8dcc5e0fa74b2fbe49f52d Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30024 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org>
* port80: Track and export last post code in previous bootDuncan Laurie2012-08-134-2/+46
| | | | | | | | | | | | | | | | | | | | | | | - Add a special port80 event for LPC reset assertion and use that event to store the previous post code. - Add a new command to retrive the last saved post code so I can easily query it at boot/resume and log unusual codes. BUG=none TEST=manual (with additional coreboot/mosys changes) - interrupt boot process by issuing x86reset on EC console or by using warm reset button on servo - read event log with mosys on next boot 78 | 2012-08-13 09:24:04 | System boot | 262 79 | 2012-08-13 09:24:04 | Last post code in previous boot | 0x9e 80 | 2012-08-13 09:24:04 | System Reset Change-Id: I7b9f10442b9c468d89fde4e75adb94b0c07c2c8d Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29995 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Clean up EC hibernate logicRandall Spangler2012-08-134-26/+45
| | | | | | | | | | | | | | | | | | | | | | | | system_hibernate(0, 0) now hibernates until a wake pin assert, with no RTC wake. BUG=none TEST=manual command -> expected reset flags from 'sysinfo' 1. reboot -> soft 2. reboot hard -> power-on hard 3. hibernate (and press power button) -> power-on wake-pin 4. hibernate 3 (and wait for timeout) -> power-on rtc-alarm 5. hibernate 10 (and press power button before 10 sec) -> power-on wake-pin hibdelay 10 then shut system down and run on battery 10 sec later, system should hibernate. Change-Id: I399413d265f6fcf808adf9ed1db7b812a1b12fc2 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29923 Reviewed-by: Vic Yang <victoryang@chromium.org>
* Lucas: Switching the i2c transmit code over to dmaCharlie Mooney2012-08-133-59/+143
| | | | | | | | | | | | | | | | | | | | | There was an errata issues for the i2c on STMF100xx. It specified that not all guarantees apply to i2c on these chips if you are not using DMA to load the data. To prevent problems, I am converting the i2c code on the EC for Lucas over to DMA. Here the i2c's master functionality is retrofitted to use DMA instead of polling to fill the i2c buffer. The slave functionality is still left in the old style for the time being, but will also be converted soon. BUG=chrome-os-partner:10901 TEST=From EC console, make sure that "battery" and "pmu" commands work. They both use i2c, so if i2c had been broken they would fail. Change-Id: I2fb80dcb68632938df1c9165ebd5a67cb5194451 Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29811 Reviewed-by: Simon Glass <sjg@chromium.org>
* Add GEC lock mechanism.Louis Yung-Chieh Lo2012-08-1011-4/+782
| | | | | | | | | | | | | | Basically re-use the gec lock code from flashrom package. BUG=chrome-os-partner:12319 TEST=Build and run on link. Only build on snow. while true; do ectool hello; done & ; run 10 instances. ; expect all instances runs okay. Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Change-Id: I11d5824f46810c6f5a04a564a81387cdea081697 Reviewed-on: https://gerrit.chromium.org/gerrit/29763 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* link: update IR3570A settingsVincent Palatin2012-08-091-5/+5
| | | | | | | | | | | | | | | | | | | update settings according to IR3570Axxxx_REV5_DRC_7-27-12. This should fix the spurious UVLO during reboot, so it re-activates the fault. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:11947 TEST=on Link EVT reworked with IR3570A, run software and check we can reboot normally and we have no GPU warning. Change-Id: I5882f1d25a65c81fdaa4326ead913bc080b71ee9 Reviewed-on: https://gerrit.chromium.org/gerrit/28650 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Add ectool command to read snapshot of EC's console outputRandall Spangler2012-08-094-2/+131
| | | | | | | | | | | | | | BUG=chrome-os-partner:12483 TEST=from root shell, 'ectool console', then on the ec console, type 'help list' a few times to generate lots of debug output, then repeat 'ectool console'. Then on EC console, 'syslock', and then 'ectool console' should fail. Change-Id: Ie1c74c7e35d6b8228615d20192fd90093977de64 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29825 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Tidy shared memory moduleRandall Spangler2012-08-094-37/+64
| | | | | | | | | | | | | | | | Adds shmem command to print amount of shared memory. This is also a useful indicator of how much IRAM is left, since shared memory will expand to fill all unused IRAM. Removes never-implemented wait param to shared_mem_acquire(). BUG=none TEST=shmem Change-Id: I798ff644d701dcba52219b70bec99c06a23d03ec Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29809 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* stm32: add wakeup from serial port as a debug featureVincent Palatin2012-08-091-0/+38
| | | | | | | | | | | | | | | | | | | | | | | When STOP mode is activated, the UART is not able to wakeup the EC when sleeping, preventing to enter commands on the EC serial console. Allow to switch the UART RX line as a GPIO connected to EXTINT10 to wakeup the system on incoming character. This is just a debug feature since EXTINT10 is normally used to scan the keyboard. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8866 TEST=on Snow, enable CONFIG_FORCE_CONSOLE_RESUME at build time and type "sleepmask 0" on the EC console, see I can get the serial console back by typing a character on the serial console. Change-Id: I936cbf13707ef8cde277f1053a4d35d23ff06511 Reviewed-on: https://gerrit.chromium.org/gerrit/29776 Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Enable PLL only briefly during ADC initRandall Spangler2012-08-094-34/+58
| | | | | | | | | | | | | | | | | | It was previously only enabled for 1500us during boot, but in a way that triggered a needless round of notifications to other modules. This is cleaner. This also fixes adc_init() not initializing the task IDs to wake when interrupts come in, and removes some unneeded code from other init functions. BUG=chrome-os-partner:12472 TEST=boot system and run adc command. Should still provide reasonable data. Change-Id: I9ae5857d988c727caf5d53f551a2f12b30974c0f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29806 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Clear hibernate data when enabling hibernate module clockRandall Spangler2012-08-091-0/+4
| | | | | | | | | | | | | | | | | | | | This ensures it comes up in a known-good state. BUG=none TEST=manual scratchpad write 0x12345 hibernate 1 scratchpad -> still 0x12345 keyboard reset scratchpad -> still 0x12345 pull power and battery, then plug back in scratchpad -> now 0 Change-Id: I2c205f53e03eefe915260b9be39c809ea7d69293 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29500 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Don't drive HDA_SDORandall Spangler2012-08-091-1/+5
| | | | | | | | | | | | BUG=chrome-os-partner:12453 TEST=play a youtube video, hear audio Cherry-pick to link. Change-Id: Ibc81fb5ac91b15aeb7c222b637aace31562d6170 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29775 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* stm32f100: implement low power modeVincent Palatin2012-08-098-7/+247
| | | | | | | | | | | | | | | | | | | | | When the AP is not running and we have enough time go to STOP mode instead of simple idle. The EC consumption should drop from 12mW to a few mW. This is currently not activated by default, you need to type "sleepmask 0" in the EC console to activate it. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8866 TEST=on Snow, check the software is still working properly when STOP mode is activated and measure power consumption on 3v_alw rail. Change-Id: I231d76fe6494c07b198c41694755b82d87c00e75 Reviewed-on: https://gerrit.chromium.org/gerrit/29315 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
* i2c: stm32: Increase tx timeout in slave mode from 10ms to 100msDoug Anderson2012-08-081-9/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | We have seen instances where the AP has interrupts disabled for a long period of time (specifically when doing a lot of printk messages to the console). When this happens the host can't service i2c in < 10ms (it needs an interrupt per byte) and we were getting a timeout. We'll increase the timeout to 100ms to avoid these problems. Better to be safe than sorry. This timeout runs from the host command task so having the delay shouldn't be a terrible thing (we're not running from an IRQ handler or anything). Only affected the timeout for slave mode specifically so as not to affect any untested behavior. BUG=chrome-os-partner:12123 TEST=With serial console enabled, run this in two different ssh sessions: a) while true; do flashrom -p internal:bus=i2c -r /tmp/ec.bin; done b) while true; do /usr/local/lib/flimflam/test/connect-wifi GoogleGuest; done ...if flashrom reports success over and over again then this is good. Change-Id: I7f32d5f1e4134896c857ee26f449a1fdd579d589 Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29621
* stm32f: Use FLASH_KEYR to lock entire flashVic Yang2012-08-084-60/+110
| | | | | | | | | | | | | | | | | | | | | | | | Writing wrong key to FLASH_KEYR locks entire flash and effectively performs RW_NOW. Therefore we can use this and remove RW_AT_BOOT to prevent having to reboot for RW to be protected. BUG=chrome-os-partner:12043 TEST=1. fakewp 1 -> wp_gpio_asserted 2. flashwp now -> nothing happens 2. flashwp enable -> wp_gpio_asserted ro_at_boot 3. reboot -> wp_gpio_asserted ro_at_boot ro_now 4. flasherase 0x10000 0x1000 -> success 5. flashwp now -> wp_gpio_asserted ro_at_boot ro_now rw_now 6. flasherase 0x10000 0x1000 -> error 7. reboot -> wp_gpio_asserted ro_at_boot ro_now 8. flasherase 0x10000 0x1000 -> success Change-Id: I22df188e31404c190c5830c6d94c9646224eb9ab Reviewed-on: https://gerrit.chromium.org/gerrit/29255 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Clean up debug outputRandall Spangler2012-08-078-46/+53
| | | | | | | | | | | | Should print with [%T prefix BUG=none TEST=if it boots, it works Change-Id: I035c081ae3e8ad0088daf0bba404118e1a1f9b41 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29480 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Add real-time clock supportRandall Spangler2012-08-074-12/+215
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:12290 TEST=manual From EC console, rtcget (wait a few sec) rtcget hibernate 3 (wait for wake) rtcget (hold power+refresh; wait for reboot) rtcget rtcset 20000 rtcget (wait a few sec) rtcget Each rtcget should be a few seconds after the previous one. Pull the battery and remove AC power. Then restore AC power and rtcget (wait a few sec) rtcget Should be close to 0. That is, it should have reset to 0 when power was lost. From root shell, ectool rtcget should match the time from rtcget, truncated to the nearest second. ectool rtcset 30000 should set the time (do a rtcget to check). Change-Id: I535097feb7af8aa6583c8ef50ade66bb19bdff8f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29349 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Remove signature-based vboot supportRandall Spangler2012-08-0715-581/+6
| | | | | | | | | | | | | | | | | | | | Superseded by EC software sync (hash-based). Sig-based vboot was correctly implemented, but ended up being too slow to be useful given the limited processing power of the EC chips, and we also couldn't come up with a manageable way to handle A/B autoupdate of signed EC firmware. This change and an associated vboot_reference change shrinks the EC binary by ~2KB. BUG=chrome-os-partner:11232 TEST=build link,snow; boot link and check that 'hash' command still works. Change-Id: I3f03ae2d0a4030977826980d6ec5613181e154c2 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29496 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Add host events for shutdown due to thermal or batteryRandall Spangler2012-08-074-0/+9
| | | | | | | | | | | BUG=chrome-os-partner:12353 TEST=hack the thermal monitoring and/or battery code to trigger a shutdown then see that the events get set Change-Id: I5ef2ac03cdd793ab0c50c0db518cba1ede3ea036 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29429 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Fix stack overflow in i2c stack for ECCharlie Mooney2012-08-071-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There were a number of problems resulting from i2c crashes, particularly when trying to access the battery. The problem is that the stack was overflowing on this particularly deep path, all the way down to wait_status. This in itself was fine, but if there was a timeout, debugging information would be printed to the uart, and that function would cause an exception and restart the EC. To fix it, I stripped the debugging CPRINTFs from wait_status. This allows everything to work fine, but looses some information for debugging. To allow future developers to still see what event the i2c was waiting for, I added an additional variable to store it in, so that it can be displayed/handled further up the stack. BUG=chrome-os-partner:12245 TEST=Boot the machine using a Servo. On the AP's UART, run "cros_test i2c" to start pounding the i2c bus. Then from the EC, run "pmu 1000" and then "battery 1000" there should be no error messages, exceptions, and the EC should not restart. Repeat this process with i2c arbitration disabled (remove the flag in ./board/snow/board.h). You should suffer no fatal errors. cros_test may report errors detected, but the EC will never crash, restart, or throw exceptions. These other errors are the EC and the AP stepping on each other's toes now that you have disabled arbitration. Change-Id: Idd2f017d3557652bf3e8536c4ac776c1f70319cb Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29351 Reviewed-by: Simon Glass <sjg@chromium.org>
* Enhance port 80 loggingRandall Spangler2012-08-073-12/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - 'port80 intprint' toggles printing port 80 codes in interrupt handler (turning that off speeds up port 80 capture a bit, if you're sending port 80 codes very rapidly) - 'port80 flush' flushes the log buffer - log buffer expanded to 256 entries - log buffer tracks S3->S0 power state transitions, so you can tell where each boot starts This uses ~500 bytes more RAM on the EC, but we've got piles of RAM (with this change we're using 17KB out of 32KB). BUG=none TEST=manual - boot system - port80 -> prints data - port80 intprint -> now disabled - reboot; wait for reboot; no port80 debug output during boot - port80 -> prints data from previous boot AND this one - port80 flush - port80 -> nothing in log Change-Id: I64ee72fb13ab0fdd85d04b9640b5390fdac31400 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29420 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* Hibernate when in G3 for 24 hoursVic Yang2012-08-071-2/+62
| | | | | | | | | | | | | | | | | To save power, make the EC hibernate after we go into G3 for 24 hours. BUG=chrome-os-partner:9386 TEST=Use "hibdelay 5" to change the delay to 5 seconds. Remove AC power, power down and check device hibernates after 5 seconds in G3. Connect AC power, power down, wait for G3. Remove AC power and check device hibernates after 5 seconds. Change-Id: I6fb907c904798076a763f22bd35f53f7424d6200 Reviewed-on: https://gerrit.chromium.org/gerrit/29400 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Periodically set power LEDVic Yang2012-08-071-1/+16
| | | | | | | | | | | | | | | It is possible that power LED goes off while AC still connected. Let's set power LED periodically to aviod this problem. BUG=chrome-os-partner:10386 TEST=Disconnect power LED while leave AC connected. Check LED goes off. Connect LED again and check it comes back after few seconds. Change-Id: I2a199446be5da772af8027b735b9f431f697bacd Reviewed-on: https://gerrit.chromium.org/gerrit/29403 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* add a function to fast forward system timerVincent Palatin2012-08-065-3/+33
| | | | | | | | | | | | | | | | | | | When we wake up from a deep sleep mode, the system timer clock might have been stopped. We need to be able to set using another time source (e.g. the RTC). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8866 TEST=make BOARD=snow && make BOARD=link on Snow, on a software implementing STOP mode, check the system time is still accurate by comparing it to the wall clock. Change-Id: Ieddbb423d052c7aceb398470866b25b25a74c0a0 Reviewed-on: https://gerrit.chromium.org/gerrit/29314 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* snow daisy: compute RW firmware hashVincent Palatin2012-08-064-0/+10
| | | | | | | | | | | | | | | | | Activate the VBOOT code to compute the SHA256 hash of the RW partition of the EC firmware. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=On Snow, reset the EC and see the hash is computed at startup. Change-Id: Id1930f823ef516e459b4905c7d0f301568fddf0f Reviewed-on: https://gerrit.chromium.org/gerrit/29279 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* snow: remove debug features to save RAMVincent Palatin2012-08-061-2/+2
| | | | | | | | | | | | | | | | | | We need a bit more internal RAM for verified boot hash feature, let's de-activate RAM hungry debug features. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:12271 chrome-os-partner:10895 TEST=make BOARD=snow check RAM size with CONFIG_VBOOT and CONFIG_VBOOT_HASH activated. Change-Id: I4d1d6c0f99a8b03011af6eb2d73455beba93c535 Reviewed-on: https://gerrit.chromium.org/gerrit/29278 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* vboot: fix flash offset for hashVincent Palatin2012-08-061-2/+2
| | | | | | | | | | | | | | | | | | CONFIG_FW_RW_OFF is already relative to the base address of the flash, we don't need to substract it. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=on Snow, run with CONFIG_VBOOT and CONFIG_VBOOT_HASH activated and see the hash is correctly computed and display. Change-Id: I1643b07a59459baa973bfd7ee80cbf98963a85d4 Reviewed-on: https://gerrit.chromium.org/gerrit/29276 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Add TPSChrome comments on charging codeRong Chang2012-08-061-5/+38
| | | | | | | | | | | | | | | This change adds more comments on charging states and fixes battery temperature out of range log messages. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:10900,12222 TEST=none Change-Id: Ie3240dc246ad7590078929e41575c67798373aca Reviewed-on: https://gerrit.chromium.org/gerrit/29253 Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* Change link charging profileRong Chang2012-08-061-43/+64
| | | | | | | | | | | | | | | Change vendor specific charging current table to meet battery specification. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:12012 TEST=run firmware_ECCharging Change-Id: I41a8060834bd02153d8c722ae5ffed7749226b83 Reviewed-on: https://gerrit.chromium.org/gerrit/29258 Reviewed-by: Vic Yang <victoryang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org>
* Fix stm32 i2c timeout debug messageRong Chang2012-08-061-3/+0
| | | | | | | | | | | | | | | | | | The i2c timeout error message is false positive warning. It happened when wait_status() function got a good result, but took too long to complete (> 1ms). This warning message can be removed safely. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:9759,12222 TEST=none Change-Id: I2a670b76a5d741dc82ea59eacc233c4719eb3263 Reviewed-on: https://gerrit.chromium.org/gerrit/29254 Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org>
* Add x86indebug commandRandall Spangler2012-08-031-0/+27
| | | | | | | | | | | | | | | | | | | | Prints all x86 signal power state transitions at interrupt level, so we can see lines toggle more precisely. BUG=chrome-os-partner:12229 TEST=manual 1. power on system 2. no debug output that looks like [501.001742 x86 in 0x563f] 3. reboot 4. x86indebug 0xffff 5. power on system 6. should see lots of lines that look like [501.001742 x86 in 0x563f] Change-Id: Ie3b346ee4d4beee3f13ac1245f1eb022b48dabf4 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29192 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Fixing lid power behavior -- shutdowns vs rebootsCharlie Mooney2012-08-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | When the user is logged in a closes/opens the lid of the laptop the lid_changed flag gets set, but never cleared. Normally, it would get cleared when it powered back on from being opened, but without powerm running or is the machine is only suspended, then that never happens. This fixes the problem by additionally clearing the flag whenever the computer is powered down. This forces the computer to not turn on based on anything that happened to its lid before it was turned off, which is the behavior you'd expect. BUG=chrome-os-partner:12189 TEST=Log in to your Chomebook completely. Close, then open the lid. Shut the computer down. It should stay off now. Once it's back on close the lid and confirm that it still suspends correctly. Now open the lid and make sure it turns back on. Repeat these steps, but kill powerm first. Change-Id: I2275b3125115b4eacc6a5d074978d7a1d51b0695 Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29111 Reviewed-by: Benson Leung <bleung@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Revert "Set power LED to green when we are trickle charging nearly full"Vic Yang2012-08-033-30/+28
| | | | | | | | | | | | | | | | This reverts commit f322e1b96a5a7400d283b2a6397e020e6200522c. Now that we notify kernel when charge_full changes, this workaround should be abandoned. BUG=chrome-os-partner:11248 TEST=Check power LED still works. Change-Id: I87c269dcf4cb6b9f0da2472f139e39cced28232b Reviewed-on: https://gerrit.chromium.org/gerrit/29147 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Notify kernel when charge_full changesVic Yang2012-08-031-0/+9
| | | | | | | | | | | | | This way kernel always know the current value of charge_full. BUG=chrome-os-partner:11248 TEST=Check charge_full is updated when it changes Change-Id: I623d84a4d6e556097b9214672e016b0c2e6cfdb9 Reviewed-on: https://gerrit.chromium.org/gerrit/29133 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Fix 'reboot' console commandVic Yang2012-08-021-5/+5
| | | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:12155 TEST=Check 'reboot' command works with the following parameters: - No parameter - 'hard' - 'soft' - 'hard ap-off' - 'soft ap-off' - 'soft preserve' - 'hard ap-off preserve' Change-Id: Ib54d6a0fe419ff7b47265698fae2fcd554f707d4 Reviewed-on: https://gerrit.chromium.org/gerrit/29017 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* snow: add keypress noise suppressionDavid Hendricks2012-08-011-0/+7
| | | | | | | | | | | | | | | | | | | This was implemented for Daisy a long time ago, but left out on Snow due to some confusion. GPIO remapping is already handled because PD1 and PD0 (which is used for ENTERING_RW) are remapped together. So all we need here is the board_keyboard_suppress_noise() function definition which gets called from the keyboard scanning code whenever a change is detected. BUG=none TEST=Verified using a scope that CODEC_INT line is driven when a key is pressed (15us pulse) Signed-off-by: David Hendricks <dhendrix@chromium.org> Change-Id: Ifd358eb89a9547c4f4b9536b8922c93d2c3b77a0 Reviewed-on: https://gerrit.chromium.org/gerrit/28989 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Add additional host command debug outputRandall Spangler2012-08-011-5/+39
| | | | | | | | | | | | | | | | | | | Prints when a host command returns an error code. When 'hcdebug on', hex-dumps the host command params and response. BUG=none TEST=manual (> is ec console, $ is root shell) $ ectool gpioget foobar --> EC console shows error 2 returned > hcdebug on $ ectool hello --> EC console shows params and response as hex > hcdebug off $ ectool hello --> no extra output on EC debug console Change-Id: I2dbc77be5b59125f394d970cf1c83c2a976e926e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28948 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Snow has write protect pin (PB4) wired to EC.Louis Yung-Chieh Lo2012-08-015-13/+9
| | | | | | | | | | | | | | Intend to keep fake_wp functions for test. BUG=chrome-os-partner:9986 TEST=build only (success on link/snow/daisy/bds). Have no hardware to test. Change-Id: I1e2ae923790d65b6c95819f5274dbe8c7f254429 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28793 Commit-Ready: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com> Tested-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Wait STM I2C stop bit sentRong Chang2012-07-311-1/+26
| | | | | | | | | | | | | | | | | This CL prevents the risk of CR1 write access causes duplicate STOP. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:11974 TEST=manual console command "pmu 200" Change-Id: I717336d87230139a1a17e6f39e70502c0e0c7a18 (cherry picked from https://gerrit.chromium.org/gerrit/#/c/26832) Reviewed-on: https://gerrit.chromium.org/gerrit/28811 Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Fixing bug: Keyboard locks up after 8s pwr pressCharlie Mooney2012-07-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The EC was not re-enabling keyboard scanning on boot if the power button was released. This works fine if the power button is released before the shutdown is complete, but if the user holds it down until the device is completed powered down the lock will never be released, and the next time they turn on the computer, the keyboard won't work. To fix this, all that is needed is to make the power event task keep unlocking it whenever the power button isn't pressed down. There's no problem with unlocking multiple times, so it's not dangerous to do this. BUG=chrome-os-partner:12070 TEST=Boot the machine normally, then press and hold the power button until the machine is entirely powered down before releasing it. Press the power button a second time to turn on the machine. You should be able to type as normal. Change-Id: I88852ed228bd8f6a9446406bab642812ef1327db Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28871 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* Fix setting initial debounced power button stateRandall Spangler2012-07-311-3/+6
| | | | | | | | | | | | | | | If it's pressed, need to track that or we'll ignore the release. And then we'll leave the power button signal asserted to the PCH, and it'll shut down 4 seconds after the power button was pressed. BUG=chrome-os-partner:11971 TEST=hibernate 10, then press power button for ~0.5 sec, then release system should boot normally Change-Id: Ibb9b8a8827cca6c81bac06dc9543de1a76fa5aad Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28863 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* security: Check for integer overflow in VbExMalloc()Bill Richardson2012-07-311-1/+2
| | | | | | | | | | | | | | | Make sure we don't roll over when rounding up to align the requested size. BUG=chrome-os-partner:11642 TEST=none No test; if security guys approve code change, it's fixed. Change-Id: I2e915a6e6b37fc315ab7adb435e2fce4eed670ba Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28729 Reviewed-by: Sumit Gwalani <sumitg@google.com> Reviewed-by: Gaurav Shah <gauravsh@chromium.org>
* Rename TMP006 sensorsVic Yang2012-07-311-33/+33
| | | | | | | | | | | BUG=chrome-os-partner:12010 TEST=Build success Change-Id: I2557ec1568bc0b13a4dd25bbd85dffb9dccd6468 Reviewed-on: https://gerrit.chromium.org/gerrit/28764 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Fix a bug that a line longer than 80 char kills EC consoleVic Yang2012-07-301-1/+1
| | | | | | | | | | | | | | BUG=chrome-os-partner:11938 TEST=Type a command longer than 80 char and press enter. Check console is still alive. Change-Id: Ib86c5f97cc12220ac62ab8855ef8e5c65ecd2d82 Reviewed-on: https://gerrit.chromium.org/gerrit/28679 Reviewed-by: Charlie Mooney <charliemooney@chromium.org> Tested-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
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