| Commit message (Collapse) | Author | Age | Files | Lines |
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BUG=none
TEST=none
Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155289
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Owners-Override: Jora Jacobi <jora@google.com>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
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BUG=chrome-os-partner:29545
BRANCH=wolf
TEST=Run evtest. Push every key. Verify correct key code
reported.
Change-Id: I6f9eb2ca6fca4750ed1f826c16be484f6f618c18
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Original-Change-Id: Ic6e4a38608f4bc8c66f487998912a7921ddb03cb
Reviewed-on: https://chromium-review.googlesource.com/65623
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203602
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
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BUG=chrome-os-partner:29545
BRANCH=wolf
TEST=None
Change-Id: Ie996d65aa73d0cbf2e27dce03292987a607df7b9
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Original-Change-Id: I48b7524608c546d67eb7975de7ff48874df4568b
Reviewed-on: https://chromium-review.googlesource.com/203603
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
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BUG=chrome-os-partner:28636
TEST=none
This reverts commit 9dfc5c000e5035fa91f64d8eeb578c778e4bdab5.
Change-Id: Ibb630b7bb06475c30be95a91f01ba5b7e883e78d
Reviewed-on: https://chromium-review.googlesource.com/199897
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
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Will reapply changes after adding the firmware screens for all locales
Revert "Wolf: Shutdown immediately if PP5000 rail goes down unexpectedly"
This reverts commit 6b10085733ac20d1274b98374b43999f4ace8d8c.
Change-Id: I3629a9b205432fdf5a8a66acd4940b4e689fc100
Revert "Wolf: Shutdown immediately if PP5000 rail goes bad in S0."
This reverts commit d835acaba9895fbb75c23c3a4dea5faf2ec40417.
Change-Id: I5d787bcfb381d0c3b44e91915431d12b4adf7f48
Revert "Wolf: add LED control by ectool support for wolf"
This reverts commit c61e0c00a0feddf01d8a830bc9e56bcdb280d8f1.
Change-Id: Ic1d040e9e552320cf24930e6589c45992665fd9f
Revert "CHERRY-PICK: lm4: fix enabling RTC alarm"
This reverts commit 55e9b8d98e767a986be8c12c2d22725b1a224fd0.
Change-Id: Ib6aea66cbb6aa6b521e075899682d61bdde6c7c5
Revert "CHERRY-PICK: lm4: Fixed low power idle doesn't always wake up."
This reverts commit 08794e43283f596aecd7e6efbb1b49d908c1fa1a.
Change-Id: Ic79642b12e7a6e1ce1a982dd935380d239fb0274
Revert "CHERRY-PICK: lm4: Fixes low power bug after a sysjump"
This reverts commit 655dfad2ecfd4538d8047e4e8905ae1bdcadab7d.
Change-Id: I2b87078ba3bb706a90401cdf91549d6638d92eb4
Revert "Reapply "CHERRY-PICK: Fix bug with hibernate delay when running off battery""
This reverts commit f95a1b6b75163c56b34d9eb93c61b8e532a1f154.
Change-Id: I12dfbcd85888f04cbbc2bd738b073b09d1eb7f13
Revert "Reapply "CHERRY-PICK:lm4: Use low speed clock in deep sleep.""
This reverts commit 70faf7b5577d5d908a02058e5c4ab6a2fa9f5fdb.
Change-Id: I71b004fdb56cbd549df5f0e04d5a2240d7828452
Revert "Reapply "Changed Wolf to use low power idle.""
This reverts commit 220b0b31ca6a8b36e0756dd1c98083a3dd7a1956.
Change-Id: I3bc6e301ccb6fd86b18e7b68d3396dffb18dcf8f
Revert "Reapply "CHERRY-PICK:lm4: Add a low power idle task.""
This reverts commit 81abeb6135cabeb2325e4acc5d694f4c2942f899.
Change-Id: I2b0bb7ff7a96f0e10e918daf052fb5348d6f9bee
Revert "Reapply "CHERRY-PICK:lm4: Modified clock gating to allow easy expansion to low power.""
This reverts commit f11cdd71da3dae3fa1935a67202d436621db77ac.
Change-Id: I2399f38c18df85cdf9fbf9a58903008e2fcd90b6
Revert "Wolf: Restrict I2C host passthrough when WP enabled"
This reverts commit a075fb49d71f4d4c15a4af212c728724444383f3.
Change-Id: Ia3cae3eb6b2615526f003455fb864dfa3baf0d15
Revert "Wolf: Change the low battery piont"
This reverts commit be3cafb306e196c975a50417c04cde36c697a84b.
Change-Id: I66eb1eeb78777523bb59831e671f8a747dc7d72f
Revert "Wolf: Lower temp thresholds to match updated PECI TjMax"
This reverts commit 52c14a9be114e4dc21ff819cb263dc3a6bf0a695.
Change-Id: Idbda461320c6a600ec59c713f71dc1f980aee4f9
Revert "CHERRY-PICK: Change PECI_TJMAX to a board config option"
This reverts commit b3379a5798a879a81f9b395b7c85b78826491fb5.
Change-Id: I42e7e69c3e90e3217d7108b166a032c295618c25
Revert "CHERRY-PICK: lm4: Fix potential false over-temperature on entry to S0"
This reverts commit eacad2e273e5bbfdbd6f40593e67d5e13257e7e2.
BUG=chrome-os-partner:28636
TEST=none
Change-Id: Ic06beb8bee0d06c6434c35372ec51c59cb67f3b9
Reviewed-on: https://chromium-review.googlesource.com/199615
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
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BUG=chrome-os-partner:25833
BRANCH=wolf
TEST=Trip the PP5000 VR by over-volting the rail. Verify that
the system shuts down rather than the EC becoming unresponsive
due to loosing PP3300_EC unexpectedly. Check both S0 and S3
cases.
Change-Id: Ifcf0cbfe1319cae1a0bdc6ce60c3884423d862d8
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/189248
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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BUG=chrome-os-partner:25833
BRANCH=wolf
TEST=Trip the PP5000 VR by over-volting the rail. Verify
that system shuts down rather than the EC becoming unresponsive
in a semi-hibernated state.
Change-Id: I8b0ccce66729c985f9577cf719587e4d4e23f8e8
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188915
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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BUG=None
BRANCH=wolf
TEST=emerge-wolf chromeos-ec
Change-Id: Ic944fe20cbbf553160af6c080ad3c89b67aa0a99
Signed-off-by: Crag.Wang <crag.wang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/183914
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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All hibernate register writes must wait for the WC bit. When we're
enabling the RTC alarm, it's important to wait for the WC bit
afterwards, too, or else we could go into deep sleep before the write
to HIBIM is committed.
Also make sure that the normal hibernate() path enables the RTC alarm
if it has a timeout. This bug wasn't noticed until the low-power idle
code called system_reset_rtc_alarm(), since before then HIBIM was
initialized to 1 and just stayed there.
BUG=chrome-os-partner:25661
Original-BUG=chrome-os-partner:23678
BRANCH=anywhere we use low power idle (wolf/leon, too)
TEST=with hacked firmware, note that HIBIM=1 just before the wfi
instruction in chip/lm4/clock.c
Change-Id: Iede8ddc071ab5c174aad08fe74edc17a6d50d4bb
Original-Change-Id: Ie01b106ac6a6c5894811f9a333715b22ef896f82
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175013
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186018
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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Temporary fix to the bug in which we miss wake events when in deep
sleep with the LFIOSC (32kHz) clock and the EC is cold. This fix
involves simply using a faster clock, 250kHz, when in low speed
deep sleep. This fix consumes more power but solves the bug.
Renamed EC console command dsleepmask to dsleep.
BUG=chrome-os-partner:25661
Original-BUG=chrome-os-partner:23678
BRANCH=none
TEST=Go in to low speed deep sleep by going into either S3 or G3
and letting the EC console timeout. Then freeze-spray the EC chip.
Wake up the EC via the console and make sure that the idlestats
show that we have not missed a deadline.
Change-Id: Ie5e3b700d76bf90fd4db2ba8e269b172c5731744
Original-Change-Id: I4f9844f1937bc8c95cf1540502f7d8fb4cbc097e
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175614
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186017
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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This fixes a bug in which after a sysjump, the sleep_mask is
reset, and the EC is allowed to go into a low power mode even
though the AP is still running. This causes numerous problems,
must notable of which is that a flashrom write fails with an
EC protocol mismatch error.
BUG=chrome-os-partner:25661
Original-BUG=chrome-os-partner:23645
BRANCH=none
TEST=Execute a flashrom write and make sure the system does not
use the low power code immediately after.
Change-Id: Ibfe2208e8e33d008b407f080fd391b6c70b39b86
Original-Change-Id: I4d50282da0c5ba5b6488ed14a267a4d8cafe09a7
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174943
Reviewed-on: https://chromium-review.googlesource.com/186016
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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This reverts commit c28f7336668b033a08dafc394795fba289a78e9a.
BUG=chrome-os-partner:25661
BRANCH=None
TEST=build BOARD=wolf -j
Change-Id: I2edeb5029fc1c0bf4ea8d76f75b896a161fd8d8e
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186015
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This reverts commit faac872c63748407ca228219161bb8593d8882aa.
BUG=chrome-os-partner:25661
BRANCH=None
TEST=make BOARD=wolf -j
Change-Id: Ia79300eaf6205d352a80d97bfb389578050438c8
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186014
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This reverts commit 45252efae14f2e42ec964838ce025385341beffc.
BUG=chrome-os-partner:25661
BRANCH=None
TEST=make BOARD=wolf -j
Signed-off-by: Dave Parker <dparker@chromium.org>
Conflicts:
board/wolf/board.h
Change-Id: Ie63c0cbdceb6a60ec2fbcc2269ea634f7ef51a6a
Reviewed-on: https://chromium-review.googlesource.com/186013
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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This reverts commit c087788a0579e7ba3a5a0f27361ead35d848743c.
BUG=chrome-os-partner:25661
BRANCH=None
TEST=make BOARD=wolf -j
Signed-off-by: Dave Parker <dparker@chromium.org>
Conflicts:
board/falco/board.h
board/peppy/board.h
Change-Id: If79d491c4fc543353cea0a7fb2e8502d8cea328a
Reviewed-on: https://chromium-review.googlesource.com/186012
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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low power."
This reverts commit 3f580b83129488742082178225928a4f09960a3c.
BUG=chrome-os-partner:25661
BRANCH=None
TEST=build BOARD=wolf -j
Change-Id: I73a9c41fb49c670b4ea5c2cf98d16539a896a088
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186011
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BUG=chrome-os-partner:25201
BRANCH=None
TEST=Run 'ectool i2cread 8 0 0x16 0' to read a byte
from the battery with write protect enabled. Should
return "EC result 4" error.
Change-Id: If97b9bd0ff4b1840d2077e6685215f9635b4f69a
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185961
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Change low battery point to 15% as the issue reports.
BUG=chrome-os-partner:25198
BRANCH=wolf
TEST=None
Change-Id: I30003152cd023fa63e2540653b0d816314b8ceb2
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/184121
Reviewed-by: Mohammed Habibulla <moch@google.com>
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Temps in the fan table are lowered by 5 degreess to match
the corrected TjMax temp at 100C (from 105C). Also updates
the the warning, cpu power off, and system power off
thresholds to be less than TjMax.
BUG=chrome-os-partner:24455
BRANCH=wolf
TEST=Manual. Run a device with the fan disabled until it
shuts down at 97C.
Change-Id: I317d7a65ebc154ee37f7db3499eafb794649c7d6
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180525
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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BUG=chrome-os-partner:24455
BRANCH=none
TEST=Manual: Verify that CONIFG_PECI_TJMAX set per-board matches
the value queried over the PECI bus with the restricted
"peciprobe" command.
Original-Change-Id: I8e99a23a66f26d6101e01cc751d0a8ca79686321
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179682
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Conflicts:
board/bolt/board.h
board/falco/board.h
board/link/board.h
board/peppy/board.h
chip/lm4/peci.c
Change-Id: Ic14504db16f0b5210ce92df539bcb62672b19998
Reviewed-on: https://chromium-review.googlesource.com/180524
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Dave Parker <dparker@chromium.org>
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This fixes a rare problem in which the EC could shutdown due to
a false over-temperature when entering S0 on Haswell architectures.
The fix involves requiring two valid reads of the temperature
sensor (out of the last 4 readings) in order to report it.
BUG=chrome-os-partner:24204
BRANCH=none
TEST=See bug report for a patch that recreates the bug at a
significantly higher rate then it would occur on its own. Using
that patch, I implemented this fix, and made sure that there
were no false over-temperatures reported.
Change-Id: If7483715671c90f3871d457a2e3818092756264c
Original-Change-Id: I0454eca1b96fd2fa1833b080026ed8f1caeeddc4
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177963
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180523
Commit-Queue: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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Only affect discharge behavior.
1. Off all the led in S5.
2. Amber in S0/3 till battery capacity more than or equalto 10%.
BUG=chrome-os-partner:23991
BRANCH=Wolf
TEST=manual
Battery only and less the 10%, led is amber in S0/S3, and off
in S5/G3.
Change-Id: If00877df8942e4ce399f06657e22bf1389597e09
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/176327
Reviewed-by: Dave Parker <dparker@chromium.org>
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low power."
This reverts commit d9bcfdeb0b67345c65e70e47906ff5c845a324dd.
Change-Id: Ia4981ab679182235c2753ba3ba478d99381c6313
Reviewed-on: https://chromium-review.googlesource.com/174917
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
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This reverts commit 139bb49e5b6fc034abbdabff61fdd7605f4d4a2a.
Change-Id: I96c484f50b6891b4946cfbefe645c967b12c94b8
Reviewed-on: https://chromium-review.googlesource.com/174929
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
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This reverts commit 8972040ddc0778c75818f83b1f6c5aeaefd287fd.
Change-Id: I4122bd33d22547bd47b5ba6439675399e103d5f5
Reviewed-on: https://chromium-review.googlesource.com/174921
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
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This reverts commit b8d0f532f6378d9b0645e72e7e2bf165017f9336.
Change-Id: Id0e17220bd11330335e95039eaed40b947ecd5b3
Reviewed-on: https://chromium-review.googlesource.com/174920
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
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This reverts commit 873c9f46ee03060093efbb169d5fd454dfabed4e.
Change-Id: I2d093432249899c85e8785df3eb2a6153353d69b
Reviewed-on: https://chromium-review.googlesource.com/174911
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
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Fixes hibernate delay logic for chipset x86. With this change
the machine will go in to hibernate one hour after going into G3
when running off battery.
BUG=chrome-os-partner:23224
BRANCH=none
TEST=Used console command hibdelay to set a reasonable hibernate
delay time and tested all combinations of running off battery vs.
AC and shutting off before or after the machine has been on for
a hibdelay amount of time.
Change-Id: Icfb118fdc737ad53db60bb1bb96fc51c95b8bbdc
Original-Change-Id: Idd94d3677669dcd405732195b8cbbc1edca1e171
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172512
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174792
Commit-Queue: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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Changed the low power idle task to use the low speed clock in deep
sleep. The low power idle task is currently only enabled for Peppy,
Slippy, and Falco. This change decreases power consumption when
the AP is not running.
Note that the low speed clock is slow enough that the JTAG cannot be
used and the EC console UART cannot be used. To work around that,
this commit detects when the JTAG is in use and when the EC console
is in use, and will not use the low speed clock if either is in use.
The JTAG in use never clears after being set and the console in use
clears after a fixed timeout period.
BUG=None
BRANCH=wolf
TEST=Passes all unit tests.
Tested that the EC console works when in deep sleep.
Tested that it is possible to run flash_ec when in deep sleep and
using the low speed clock.
Ran suspend_stress_test.
Oringal Change-Id: Ia65997eb8e607a5df9b2c7d68e4826bfb1e0194c
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173326
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Change-Id: I17a97805f861f4c687c360177d5fe2f8974f1817
Reviewed-on: https://chromium-review.googlesource.com/174043
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
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Changed Wolf to default to using the low power sleep mode.
BUG=None
BRANCH=wolf
TEST=Ran on a wolf machine and made sure that the power usage
was lower in S3 and G3. Also verified that I could wake from
sleep normally via keyboard or AP signal.
Change-Id: I248eda9f981226475e5ee494bc68441d3677272a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174042
Reviewed-by: Dave Parker <dparker@chromium.org>
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First implementation of a low power idle task for the LM4 chip. The
low power mode is selected by defining CONFIG_LOW_POWER_IDLE in a
board.h file. This commit turns it on for Peppy, Slippy, and Falco
only because those are the only boards tested.
When using the low power idle task, the chip goes in to deep sleep
when it can. Deep sleep disables clocks to most peripherals and puts
the onboard flash and RAM into a low power mode. The chip is woken
out of deep sleep using the RTC in the hibernate module. Increased
the idle task stack size to handle more involved idle task.
In board.c, the array of GPIO info can be used to select which GPIO
points can wake up the EC from deep sleep. Currenlty selected are
the power button, lid open, AC present, PCH_SLP_S3, and PCH_SLP_S5.
Additionally the port with the KB scan row GPIO point is also
enabled to wake up the EC from deep sleep.
BUG=None
BRANCH=wolf
TEST=Passes all unit tests. Runs on slippy, peppy, and falco with no
noticeable side affects. Verified that the power consumed by the EC
is lower when in S3, S5 and G3 by scoping the sense resistor
powering the chip.
Original Change-Id: I83fa9a159a4b79201b99f2c32678dc4fc8921726
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172183
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I1b27b841bfac1634d7da214703e3465340b234cb
Reviewed-on: https://chromium-review.googlesource.com/174041
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
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Created a new function to enable or disable clocks to various
peripherals. This new function makes it easy to specify if you
want the clock enabled in run mode, sleep mode, and/or deep
sleep mode.
Added infrastructure to specify which GPIOs should interrupt the
EC from deep sleep.
BUG=none
BRANCH=wolf
TEST=Passes all unit tests. Ran on wolf and verified that
the clock gate control registers in run mode (LM4_RCGC regs)
were the same before and after this change.
Original Change-Id: Ia5009ac8c837f61dca52fe86ebdeede2e1a7fe4d
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172454
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I3ee69f562a361fafb155ee8d2a12a9b2ef1c4101
Reviewed-on: https://chromium-review.googlesource.com/174040
Tested-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
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Support wolf enter ship mode.
BUG=chrome-os-partner:23431
BRANCH=Wolf
TEST=manual
triger command 'ectool batterycutoff', then system shut down
after 10 seconds.
Change-Id: If3c23ebb33b83ebe4c98726ed6309696b94fb795
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/173666
Reviewed-by: Dave Parker <dparker@chromium.org>
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Remove the comment for battery error and the final behavior is:
1.Under DC mode, LED is off when system enters to(S3 & S5) and
will be on when resume.
2.Once plugging in adapter ,LED will be on soon if battery is
not full.
BUG=chrome-os-partner:23373
BRANCH=Wolf
TEST=manual
login then LID close(enter S3), LED be off.
logout then LID close(enter S5), LED be off.
Change-Id: I4414082d23cfbd77fb34693d2dbf037150ef5634
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/173661
Reviewed-by: Dave Parker <dparker@chromium.org>
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Use BAT_TEMP to detect the battery.
BRANCH=wolf
BUG=chrome-os-partner:22123
TEST=none
Change-Id: I95c5fb04fc2c5de2894524737575418e27f21894
Signed-off-by: Hsu Henry <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/171820
Reviewed-by: Dave Parker <dparker@chromium.org>
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If keyboard scanning is active when the lid closes, it will disable
scanning put the scan task to sleep. We need a corresponding task
wake when the lid opens, or scanning will be stuck off (until
something else happens, like poking the power button).
BUG=chrome-os-partner:23032
BRANCH=wolf
TEST=Hold down a key. Use a magnet to trigger the lid switch. Scanning
should stop while the lid is "closed", and restart when the magnet is
moved to "open" the lid again.
Change-Id: Ib60c593fcebaaff5c38899b9e13013fe0421a28b
Original-Change-Id: I0a900f17f65b75cbdb45950cea7f50190d2bf9b1
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170993
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/171541
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Hsu Henry <Henry.Hsu@quantatw.com>
Tested-by: Hsu Henry <Henry.Hsu@quantatw.com>
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The SPEC is
1. When plugged in and charging, the battery charge LED illuminates
while. When the system reaches full charge, the LED extinguishes.
2. When not plugged in and in a low power state, the battery LED
illuminates Amber.
3. When not plugged in and not in a low power state, the LED behavior
is Amber.
4. When battery error, the LED behavior is RED.
5. The near full charge state, the LED extinguishes.
6. Low battery state behavior is Amber.
But item 4 should be modified because of inexistence of RED led,
Now let it blink amber quickly instead.
BUG=chrome-os-partner:22043
BRANCH=Wolf
TEST=manual
Change-Id: Ice0a2dd5e5aa5101c9f18e82e688f686d1b64dbe
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/168424
Reviewed-by: Dave Parker <daveparker+DONTUSE@gmail.com>
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Commit-Queue: 志偉 黃 <David.Huang@quantatw.com>
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This is hard code for wolf. (code base from CL Falco: set fan/thermal
steps (BRANCH ONLY) )
The thermal table for wolf is
Step Fan RPM trigger point (CPU Tj) unit K / 'C
Step 1 0 under 318K / 45'C
Step 2 3000 318K / 45'C
Step 3 3500 323K / 50'C
Step 4 4000 328K / 55'C
Step 5 4200 332K / 59'C
Step 6 4500 335K / 62'C
Step 7 4800 338K / 65'C
Step 8 5000 341K / 68'C
368K / 100C => assert PROCHOT
373K / 105C => give the CPU three second to cool off, then shutdown
378K / 110C => shutdown immediately
BUG=none
BRANCH=wolf ONLY!
TEST=manual
Change-Id: I2e2048b5b226a5de091bf101e23018eee031b6af
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/168395
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
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Since the keyboard_scan_task is the only place that calls
keyboard_raw_enable_interrupt(1) it is possible for the keyboard
to be left with interrupts disabled/pending if the keyboard scan
task is asleep.
This change will wake the keyboard_scan_task when the 8042
keystroke_enable(1) is called, which will wake up the task and
it will call into enable the keyboard interrupt and clear pending
interrupts.
I thought keyboard_enable() might be a better place to do this
but that seems to cause a hung task when flashing firmware...
This condition happens semi-regularly on resume on Falco and Peppy
devices. There may be a better approach here so for now I am only
commiting this to the Falco/Peppy firmware branch but a similar
or better fix is probably needed in TOT.
BUG=chrome-os-partner:22169
BRANCH=falco,peppy
TEST=manual: many suspend/resume cycles on falco with the physical
lid to ensure that the keyboard is still functional.
Change-Id: I3e0a4ea3b6cbc68ebc1941600e2c92a49a515e9f
Original-Change-Id: I2f56f9c07b852c4b03b090d0da6b7128804962ab
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66986
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/168815
Commit-Queue: Mohammed Habibulla <moch@google.com>
Tested-by: Mohammed Habibulla <moch@google.com>
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Update 3S1P battery setting to meet spec.
BRANCH=wolf
BUG=none
TEST=none
Follow battery spec.
Signed-off-by: Hsu Henry <Henry.Hsu@quantatw.com>
Change-Id: I456ebdcf0dbb016941df96512aaa2937c4684fa2
Reviewed-on: https://gerrit.chromium.org/gerrit/66804
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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The BOOTCFG register configures a couple of important things: whether to
allow jumping into the builtin ROM bootloader at reset, and whether or not
to allow JTAG access for programing and debugging.
The default is "no" and "yes". But the BOOTCFG register can be locked so
that it can't be changed again, which means that if the wrong values are put
into it, the system is pretty much bricked.
On Link, we wrote a BOOTCFG value that allowed a GPIO to be used as a bypass
to optionally trigger the ROM bootloader, but on Slippy and its derivatives
that GPIO is not pulled up. If you program the Link values into BOOTCFG on a
Slippy, the system is stuck in the ROM bootloader more or less forever.
This change disables that GPIO, keeps JTAG enabled, and locks those settings
for all LM4 chips (it's a chip config now, not a board config). We've never
actually used the GPIO to invoke the ROM bootloader, but we have managed to
brick a number of systems just by having it enabled, so we're going to lock
it into a safe configuration now.
BUG=chrome-os-partner:19247
BRANCH=falco,peppy
TEST=manual
Reflash, boot, power cycle (actually unplug the EC from AC and battery) a
few times. It should continue to work.
Change-Id: Idadfe7f638d0ea64090d97ca97ec162339757be3
Original-Change-Id: Iaf1a81d6814104421a56425490e3d5164ea9b617
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66538
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66867
Tested-by: Dave Parker <dparker@chromium.org>
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Due to the order of pre-processing, TASK_ID_CHARGER and
TASK_ID_SWITCH aren't defined even if they are in the ec.tasklist
for a board.
BUG=chrome-os-partner:21565
BRANCH=falco,peppy
TEST=Turn device off, remove AC power. Plug AC power back in.
Charging LED should light in ~1 second.
Change-Id: I5ff6fb373a048aa0360544ff998bcf3928e52611
Original-Change-Id: I20ebbec71ca5e5dc8ab34da946d3dfeb91fc7849
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66466
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66866
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This tests that command history is as expected. Also fix a bug that some
checks in console_edit test are skipped.
BUG=chrome-os-partner:19236
TEST=Pass console_edit test.
BRANCH=None
Change-Id: I2dc35b00e3b381c869bac84ea65cb2fd2ca741d4
Original-Change-Id: Ifbd3d1690f25b35bf5efe523e656b013aa534d26
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64837
Reviewed-on: https://gerrit.chromium.org/gerrit/66865
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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The BAT_LED0 and BAT_LED1 connected to EC PD0 and PD1 pins,
change it to fit the schematic.
BRANCH=wolf
BUG=chrome-os-partner:22043
TEST=manual
Use the new setting, the LEDs can be controlled by console.
Change-Id: I1072908e87a21f7659d50d9867d07513c9fc302e
Signed-off-by: Hsu Henry <Henry.Hsu@quantatw.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/66341
Commit-Queue: 志偉 黃 <David.Huang@quantatw.com>
Reviewed-by: 志偉 黃 <David.Huang@quantatw.com>
Tested-by: 志偉 黃 <David.Huang@quantatw.com>
Reviewed-by: Dave Parker <dparker@chromium.org>
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BUG=chromium:271236
BRANCH=falco,peppy
TEST=Run 'ectool temps all' Verify temp. values are present
for the g781.
Change-Id: I48e544b76510f03c32f7565aa01607c9981c937d
Original-Change-Id: I2ea8aff9e256167bf04abc959f971da94fc51e77
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65597
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66150
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It looks like a line of code was accidentally left in during
refactoring gpio_set_flags(). That line is equivalent to
gpio_set_level(signal, 0).
It's so far been harmless, because it's immediately followed by
gpio_set_level(signal, 1) - but it does mean the signal may glitch for
a few clocks at this point.
BUG=chrome-os-partner:21678
BRANCH=none (or Spring, but it seems to work fine even with this line)
TEST=boot Spring
Original-Change-Id: Id7a48e2c9bd543f2aa6a0b710faa5dd2b482fd84
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64719
Conflicts:
chip/stm32/gpio-stm32f.c
Change-Id: I5ea1ea0c1dca26b5fbe8b2d7c0f034d8254f81ef
Reviewed-on: https://gerrit.chromium.org/gerrit/65842
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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We often need to watch for transitions between one state and another, so
that we can issue warnings or take action ONCE. This abstracts that "have I
already reacted to this" stuff into a single set of functions.
For example, this code reads a GPIO every time through the loop, but it only
generates an event when the GPIO value changes from 0 to 1:
cond_t c;
cond_init_false(&c);
while(1) {
int val = read_some_gpio();
cond_set(&c, val);
if (cond_went_true(&c))
host_event(SOMETHING_HAPPENED);
sleep(1);
}
BUG=none
BRANCH=falco,peppy
TEST=manual
make BOARD=falco runtests
Change-Id: I301d97b0e96cc3e2bfd3283db308b2cd900fd4c1
Original-Change-Id: I42393fcf3c4eb71b9551118a0f442d55c0691315
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65071
Reviewed-on: https://gerrit.chromium.org/gerrit/65456
Commit-Queue: Dave Parker <dparker@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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We've been pausing in S5 for ten seconds for various arcane reasons related
to clock rates and USB peripherals. We don't need to do that anymore, and
there are other arcane reasons why it's better if we don't.
BUG=chrome-os-partner:21791
BRANCH=falco,peppy
TEST=manual
On the EC console, limit the output to just the chipset channel:
> chan 4
Now boot the AP, then shut down.
Before you'd see a ten-second pause in S5, like this:
[29.586858 x86 power state 3 = S0, in 0x00df]
[29.587268 x86 power state 7 = S0->S3, in 0x009f]
[29.587707 x86 power state 2 = S3, in 0x009f]
[29.587959 x86 power state 8 = S3->S5, in 0x009f]
[29.588474 x86 power state 1 = S5, in 0x009c]
[29.588733 x86 power state 1 = S5, in 0x009c]
[29.603317 x86 power state 1 = S5, in 0x0094]
[39.603612 x86 power state 9 = S5->G3, in 0x0094]
[39.604137 x86 power state 0 = G3, in 0x0000]
[39.604376 x86 power state 0 = G3, in 0x0000]
With this change the pause is gone:
[26.764160 x86 power state 3 = S0, in 0x00df]
[26.764570 x86 power state 7 = S0->S3, in 0x009f]
[26.765011 x86 power state 2 = S3, in 0x009f]
[26.765262 x86 power state 8 = S3->S5, in 0x009f]
[26.765777 x86 power state 9 = S5->G3, in 0x009c]
[26.766220 x86 power state 0 = G3, in 0x0008]
[26.766526 x86 power state 0 = G3, in 0x0008]
[26.770517 x86 power state 0 = G3, in 0x0000]
Change-Id: Ie60419309bd83b65f94fffb9a0835aefef953fc8
Original-Change-Id: I05e19ddfe9dfa1bcc2a29103d120910c4371b88e
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65336
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65455
Commit-Queue: Dave Parker <dparker@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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Only link actually used this function, but all batteries were required
to provide an (empty) implementation. Use
CONFIG_BATTERY_VENDOR_PARAMS to gate this functionality, so non-link
battery code can be simpler.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms and pass unit tests
Change-Id: Iffdea121a39dd930a29269b5e3339d6c62c9c56f
Original-Change-Id: Ic2c6dd1163a981e48873d798f77891cc7de1f8cf
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65257
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65454
Commit-Queue: Dave Parker <dparker@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
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Read status, set temperature alert thresholds, get and set
configuration options. I2c offsets and status/config register
bits are documented in temp_sensor_g781.h
Usage by example:
g781 - Print status info
g781 settemp 0x0e 12 - Set remote low temp alarm to 12C
g781 setbyte 0x09 0x40 - Enable single-shot mode
g781 getbyte 0xfe - Read device ID
BUG=None
BRANCH=falco,peppy
TEST=Manual. Run g781 console command
Signed-off-by: Dave Parker <dparker@chromium.org>
Change-Id: I2529d2c284cae3a82343fa9db15aa2962a7b29b7
Original-Change-Id: Id051f79ea643255d57c3fc694b7ae685a6611c81
Reviewed-on: https://gerrit.chromium.org/gerrit/65234
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dave Parker <dparker@chromium.org>
Tested-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65453
Reviewed-by: Dave Parker <dparker@chromium.org>
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