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* g: enforce order of enabling RO/RW sectionsVadim Bendebury2019-06-071-8/+14
| | | | | | | | | | | | | | | | | | | | | When a post update reset happens and the host sends the vendor command to enable the update, in case both RO and RW have been updated, the Cr50 should enable the RW section first, and then the RO. This would cover the case when the new RO has the new key and would not be able to start the old RW, so the matching RW must be available first. Enabling RW without enabling RO is not a problem, worst thing which could happen is that the old RO would not start the new RW and the update process will have to be repeated. BRANCH=cr50, cr50-mp BUG=b:74100307 TEST=none yet. Will verify when a new RO is available. Change-Id: I00175a5a957166d4423fb270bbe9f92d4e408d5c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1644479 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* cr50: optimize set_ec_on() by prioritizing the case EC is onNamyoon Woo2019-06-071-8/+10
| | | | | | | | | | | | | | | | | | | | This patch prioritize the case that EC is in ON over other cases like INIT, INIT_DEBOUNCING or DEBOUNCING in set_ec_on(). set_ec_on() is called every second to monitor EC status when EC_UART signal is detected. set_ec_on() shall finish quickly in most of time when EC is ON. BUG=None BRANCH=None TEST=ran flash_ec and uart_stress_tester.sh on Bob. Signed-off-by: Namyoon Woo <namyoon@chromium.org> Change-Id: I6a53ca86ccb4f65c7450bfbfda78cb5cf5b6409d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1644598 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org>
* common: Add EC_CMD_LOCATE_CHIPDaisuke Nojiri2019-06-066-61/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces EC_CMD_I2C_LOOKUP with EC_CMD_LOCATE_CHIP. This is a more generic command which locates a peripheral chip in i2c or other bus types. Additionally, it includes the following changes: - Change chip (device) type # of CBI_EEPROM (from 1 to 0). - Support TCPCs. localhost ~ # ectool locatechip 0 0 BUS: I2C; Port: 0; Address: 0x50 (7-bit format) localhost ~ # ectool locatechip 1 0 BUS: I2C; Port: 0; Address: 0x0b (7-bit format) localhost ~ # ectool locatechip 1 1 BUS: I2C; Port: 1; Address: 0x29 (7-bit format) localhost ~ # ectool locatechip 1 2 EC result 11 (OVERFLOW) Index too large localhost ~ # ectool locatechip 2 Usage: locatechip <type> <index> <type> is one of: 0: CBI_EEPROM 1: TCPCs <index> instance # of <type> Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=Verified ectool locatechip work on Nami. Change-Id: I1a773ced65b1c5ce3656f03eff04a6eadd4bc5ff Reviewed-on: https://chromium-review.googlesource.com/1614582 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: motion_sense: Spread timestamps in motion sense fifoYuval Peress2019-06-067-106/+333
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This changes moves the specialized logic for timestamp spreading away from the accelgyro_lsm6dsm and into the main motion_sense loop. The motion_sense_fifo_add_data function was replaced by a stage equivalent, and a commit function was added. Similarly, internal static functions for motion_sense.c were renamed to use the stage terminology. The idea is: When a sensor is read, it might provide more than one measurement though the only known timestamp is the one that caused the interrupt. Staging this data allows us to use the same fifo queue space that the entries would consume eventually anyway without making the entries readable. Upon commit, the timestamp entries are spread if needed. Note that if tight timestamps are disabled, the commit becomes a simple tail move. BUG=chromium:966506 BRANCH=None TEST=Ran CTS on arcada. Change-Id: Ib7d0a75c9c56fc4e275aed794058a5eca58ff47f Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637416 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* fpsensor: Add instructions for using screen instead of minicomTom Hughes2019-06-061-1/+18
| | | | | | | | | | | | | | Also increase timeout to provide enough time to hit enter when download prompt pops up. BRANCH=none BUG=b:124996507 TEST=fpcapture from fingerprint console Change-Id: I1e608161aceae4431dedcaffd648d20549b97a8b Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1593956 Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* Intelrvp: Get current DP modeAyushee2019-06-061-1/+6
| | | | | | | | | | | | | | | | | Added get_dp_pin_mode function to get the current state of the DP pin to configure the virtual mux on Intel SOC. BUG=None BRANCH=None TEST=Verified the correct DP mode status on iclrvpy_ite Change-Id: I52cdb7bfbb87074d48d61a0a1cd21d0afcb9c59a Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1646534 Tested-by: Ayushee Shah <ayushee.shah@intel.corp-partner.google.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* ish: max-retries mechanism for watchdog timerJack Rosenthal2019-06-063-1/+49
| | | | | | | | | | | | | | | | | | This adds a relevant config option, as well as implementation for a max-retries mechanism on the watchdog timer. Included is an implementation for ISH which counts persistent data storage and halts when the max-retries is exceeded. BUG=b:132059981 BRANCH=none TEST=observed system halt after 4 resets, then re-enable once we had a successful reset Change-Id: I7b443d9a20a474b294d494c5b6046a38eaf6ff12 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1609605 Reviewed-by: Jett Rink <jettrink@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
* ish: use magic number to verify persistent dataJack Rosenthal2019-06-0610-55/+142
| | | | | | | | | | | | | | | | | | | Move persistent data definitions to a structure and have linker script define the address of the symbol into the AON ROM (persistent data storage). Use the magic number "ISHd" to verify persistent data storage and copy to static memory when valid. Commit changes from the local copy during reset. BUG=b:133779707,b:133647823,b:132059981 BRANCH=none TEST=power-on is only reset flag under cold reset, panic data persists, watchdog reset produces correct reset flags, UART always printing system info on boot Change-Id: I65a458cc2656f8fe26361ef2117ceb5439edff6c Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636293 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
* ish: fix to follow HECI specHyungwoo Yang2019-06-061-39/+71
| | | | | | | | | | | | | | | | Some of current implementaion doesn't follow HECI spec. This patch fixes those wrong implementation. BRANCH=none BUG=b:133300213 TEST=Tested on Arcada platform, HECI bus&clients are working fine. Change-Id: I3a7e242d3414187342aca33aa1efc789e66af105 Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637140 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* Makefile: create new rules for host and fuzz testsJack Rosenthal2019-06-061-2/+4
| | | | | | | | | | | | | | | | | | | | In order for chromeos-ish ebuild to run tests, it must run the fuzz tests, which are not related to ISH features, and introduce a lot of library dependencies into the ebuild. Provide two new targets: runhosttests and runfuzztests to allow the host tests to be run separately. runtests (and buildall) remain the same. BUG=b:134446400 BRANCH=none TEST=ran new targets, they functioned as intended Change-Id: Idba7fcfe707caeb0e51ce0c38caeac9da87e3baf Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1642887 Reviewed-by: Jett Rink <jettrink@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
* krane: remove mag driverTing Shen2019-06-062-3/+11
| | | | | | | | | | | | | | | | Compass removed on Krane, remove it from ec code too. BUG=b:134550825 TEST=ectool motionsense, ectool motionsense info 0/1/2, verify there's only 3 sensors (accel/gyro/vsync) BRANCH=master Change-Id: Id5c16a61462680ce9bec959a8923f7c5ca46ed29 Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1645193 Reviewed-by: Yilun Lin <yllin@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* cr50: prepare to release 0.4.19Vadim Bendebury2019-06-061-1/+1
| | | | | | | | | | | BRANCH=cr50 BUG=none TEST=none Change-Id: I1b36658342314e86e3310acd85d821388be3bd57 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1646539 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* g: add rx_handled into USB_STREAM_CONFIGNamyoon Woo2019-06-062-10/+15
| | | | | | | | | | | | | | | | | | | | | The variable rx_handled tracks how many of the bytes in the HW FIFO was moved into the incoming queue. It used to be defined as local static variable for multiple USB_STREAM_CONFIGs, and could cause a problem if multiple USB downstream traffic get heavier. It should be defined for each USB_STREAM_CONFIG. This patch add rx_handled into USB_STREAM_CONFIG, which tracks how many of the bytes in the HW FIFO was moved into the incoming queue. BUG=None BRANCH=None TEST=manually ran uart_stress_tester.sh and flash_ec on Bob. Change-Id: I561a54b0594a71b557693007a181bde48155d403 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1644958 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* ectool: add async flash eraseTom Hughes2019-06-063-1/+61
| | | | | | | | | | | | | | | BRANCH=none TEST=ectool --name=cros_fp reboot_ec; sleep 0.5 && \ ectool --name=cros_fp rwsigaction abort; \ ectool --name=cros_fp flasheraseasync 393216 131072 (using hatch EVT fingerprint board: STM32F412) TEST=make buildall -j BUG=b:132444384 Change-Id: I4a78c5bf7ef323a14083cc9d5fa3ec2c5218245d Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637496 Reviewed-by: Jett Rink <jettrink@chromium.org>
* ish: don't specify any on-board testsJack Rosenthal2019-06-051-0/+3
| | | | | | | | | | | | | | We have no framework to do on-board testing on ish. The make target should do nothing. BUG=b:134446400 BRANCH=none TEST="make BOARD=arcada_ish tests" does nothing Change-Id: Ic71b35a24d37f7b827f6639669c6d43659cda06e Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1643834 Reviewed-by: Yuval Peress <peress@chromium.org>
* tpm: reset command_ready bit when entering idle stateVadim Bendebury2019-06-051-4/+6
| | | | | | | | | | | | | | | | | | | | TPM could enter idle state even when current command has not yet been fully processed (for instance if the AP releases locality at an arbitrary moment). The status register command_ready bit needs to be unconditionally reset when TPM enters idle state. BRANCH=cr50, cr50-mp BUG=none TEST=verified reliable behavior during lengthy concurrent runs of processes accessing TPM. The same type of testing was causing occasional TPM lockups before this fix. Change-Id: I6e1dc334713c666e4ef566d41bd0cbff841f1179 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1643828 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* chocodile_vpdmcu: Firmware refactoringSam Hurst2019-06-0514-2794/+2322
| | | | | | | | | | | | | | | | | Move code in header files into c source files. BUG=b:133341676 BRANCH=none TEST=manual Charge-Through was tested on an Atlas running a DRP USB-C/PD state machine with CTUnattached.SNK and CTAttached.SNK states. Change-Id: Ib1b51a778b937e02908f0bc8866bc91a39831163 Signed-off-by: Sam Hurst <shurst@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1626036 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Sam Hurst <shurst@google.com> Tested-by: Sam Hurst <shurst@google.com>
* 8042: Only send back ACK in response to reset command(0xff)Furquan Shaikh2019-06-052-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 8042 keyboard command reset (0xff) was returning ACK(0xfa) as well as BAT(0xaa). From [1], 0xaa seems to be represent OK. However, the spec does not expect OK to be sent in response to reset command. Coreboot libpayload 8042 driver was recently updated to send a reset command on initialization to make it work with certain payloads. Sending back 0xaa along with ACK seems to make the initialization fail because it is not expecting anything other than ACK. This change gets rid of the return value 0xaa that was being sent for reset command. [1] http://zet.aluzina.org/images/d/d4/8042.pdf BUG=b:134366527 BRANCH=None TEST=Verified that keyboard initialization no longer fails in depthcharge. Change-Id: I0ac917dc94aa381ab705474cd7bcf494fb8b10d6 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1641756 Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Reviewed-by: Duncan Laurie <dlaurie@google.com> Tested-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Tested-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org>
* arcada: use lid switch instead of gpioJett Rink2019-06-051-1/+1
| | | | | | | | | | | | | | | Use the debounced lid switch state for lid close instead of the raw gpio. BRANCH=none BUG=b:126861777 TEST=tablet mode state is cleaner around 0 degrees Change-Id: I46d7e2ed7fa0af7f276662e5136613caaed539f7 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1641434 Reviewed-by: Duncan Laurie <dlaurie@google.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* ec-devutils: restore servo_updater functionalityKevin Shelton2019-06-052-0/+6
| | | | | | | | | | | | | | | | | | Adds back and uses the close method that was defined in change 1125354. BRANCH=None BUG=chromium:968700 TEST=ran servo updater on a servo that needed an update (so that the version check was exercised twice). Signed-off-by: Kevin Shelton <kmshelton@chromium.org> Change-Id: I0ddce9749a3548d5019c138a2a2266fd93a85ca9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1643658 Tested-by: Kevin Shelton <kmshelton@chromium.org> Reviewed-by: Nick Sanders <nsanders@chromium.org> Commit-Queue: Kevin Shelton <kmshelton@chromium.org>
* ish: reload watchdog after lower power exitJett Rink2019-06-053-8/+22
| | | | | | | | | | | | | | | | | | Reload the watchdog timer immediately after exiting from D0ix before re-enabling the reset of the IRQs. Also re-enable all ISRs in a batch while interrupts are disabled to limit the number of context switched if multiple interrupts are pending. BRANCH=none BUG=b:133190570 TEST=let arcada enter and exit D0i[0123] without issue for a couple of minutes. There are not adverse affects of this change. Change-Id: I3ef5878b0618a0c1858664cad061d415329d4302 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1640304 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* common: queue: Update chunk struct and get read/write logicYuval Peress2019-06-054-38/+100
| | | | | | | | | | | | | | | | | | | | | | | | This change updates the queue_get_write_chunk and queue_get_read_chunk logic to return an updated queue_chunk. The new chunk uses a void * for the buffer and replaces length with count. This more tightly aligns to how the rest of the queue functions operate. Further, it adds the ability to offset the write chunk. This is important as it allows wrapping. For example: With a queue of 8 units, 1 byte each. Assume H=2, T=5. Previously, we were only able to ever get the 3 bytes at 5-7. Using the offset of 3 though, we can now also get the 2 byte write chunk 0-1. BUG=chromium:966506 BRANCH=None TEST=Added unit tests Change-Id: I40216c36aa0dc95ec4d15fc587d4b1f08a17ef73 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637415 Reviewed-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* common: motion_sense: Require CONFIG_MOTION_SENSOR_MAX_COUNTYuval Peress2019-06-0531-318/+410
| | | | | | | | | | | | | | | This changes requires all boards to define the maximum number of sensors they support. This will allow us to later create static arrays with the appropriate length. BUG=chromium:966506 BRANCH=None TEST=make buildall Change-Id: I5a2fa8f0fdcaef69065dfd4c2bfea4e3f371e986 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637414 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Add OWNERS files for fingerprintTom Hughes2019-06-054-0/+10
| | | | | | | | | | | | BRANCH=none BUG=chromium:967924 TEST=none Change-Id: Ief50a64d45cc6862fab3417e3f8350d3c581209e Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1633909 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* Move fingerprint files to their own directoryTom Hughes2019-06-054-1/+17
| | | | | | | | | | | | | | We will be adding more files in the future, so this declutters the common directory. It also lets us add a separate OWNERS file. BRANCH=none BUG=chromium:968518 TEST=make buildall -j Change-Id: I22c08851fe2d5fbdb5beff8cc72a68618c85fb0e Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637440 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* krane/battery: rename battery name to SCUDTing Shen2019-06-051-3/+3
| | | | | | | | | | | | | | | | Use the company name of battery pack, not gauge. BUG=None TEST=make BRANCH=None Change-Id: Ie7b8b807f3952c1cd58b7f36dd717ed2edc43cb4 Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1635333 Reviewed-by: Ayo Wu <ayowu@chromium.org> Reviewed-by: Yilun Lin <yllin@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* charge_manager: customize dedicated port propertiesTing Shen2019-06-053-13/+99
| | | | | | | | | | | | | | | | | | | Kukui's pogo charger breaks the basic assumption of a dedicated charger. Add board specific functions to customize them. Also add a check to make sure the value of DEDICATED_CHARGE_PORT is good. BUG=b:128386458 TEST=combine with CL:1535087, verify that `ectool usbpdpower 1` correctly reports its status. BRANCH=None Change-Id: I6c698ea6a6fb4ab765f87c6fea0b35d5a757295a Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1569090 Reviewed-by: Yilun Lin <yllin@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* USB PD: Only maintain contracts over sysjump when sinkingDiana Z2019-06-041-9/+18
| | | | | | | | | | | | | | | | | | | | | | Currently, the pd_task will attempt to maintain both source and sink contracts after an unlocked sysjump or unlocked EC reset. However, the pd_task will disable Vbus to any partners it was sourcing, causing the soft reset process to lead to a hard reset and disconnection. Since the port partner will be without Vbus and unable to respond, treat the contract as terminated and the port as the default state. BUG=b:132110509 BRANCH=octopus TEST=unlocked sysjumps with a display port dongle and hoho to ensure they were treated as disconnected, unlocked sysjumps with charger to ensure it was soft reset Change-Id: Ie477f393ea828a4e880c8e8ccbe72539e8be721a Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1639212 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* USB PD: Disable Vconn as well as Vbus on initDiana Z2019-06-041-1/+7
| | | | | | | | | | | | | | | | | | | | | | Currently, the pd_task will call a power supply reset during init which cuts Vbus to the port partner. However, on a sysjump we may still be sourcing Vconn to a partner which will leave it in an inconsistent state of having Vconn but no Vbus. Depending on the port partner's power topology, they may even feedback some amount of voltage on Vbus, causing them to be detected as a charger. After disabling Vbus to the port partner, disable Vconn as well. BUG=b:132110509 BRANCH=octopus TEST=unlocked EC resets and sysjumps with a display port dongle and hoho, ensuring neither was detected as a low power charger after Change-Id: Ica9b72167bc981faeaebac18bac476ca9b7bfe7f Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1639211 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* kukui_scp: Run 'sync' after update firmware.stabilize-12249.BYilun Lin2019-06-041-0/+1
| | | | | | | | | | | | | | | | | | SCP firrmware is located at AP, and if AP is not properly shutdown (e.g. aps in EC console), then we will lost the newly pushed firmware on next boot. This CL ensure a 'sync' command after copying firmware to AP. BRANCH=None TEST=None BUG=None Change-Id: Ib74c82c10e19c3f3a23d5fef3e885bfd30dfcc9c Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1634631 Reviewed-by: Pi-Hsun Shih <pihsun@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Commit-Queue: Yilun Lin <yllin@chromium.org>
* g: keep track of frequent update attacks separately for RO and RWVadim Bendebury2019-06-041-9/+61
| | | | | | | | | | | | | | | | | | | | | | | Cr50 image update handler guarantees that malicious attempts to write into the same block will be prevented. In fact writes into the same address or below the most recently written block not accepted sooner than in 60s. This scheme causes rejection of the RO image if it is located below the RW, as the RW image needs to be updated first. To address the problem this patch adds code to keep track of the previously written block offsets in RO and RW images separately. BRANCH=cr50, cr50-mp BUG=b:74100307 TEST=tried updates from all four permutations of running images (ro[ab], rw[ab]), verified that all updates succeed. Change-Id: Iebc016d85fc0c9343feb18998d5c2e4e60d38b14 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1626317 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* gsctool: process intermittent flash log retrieval errorsVadim Bendebury2019-06-041-12/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Flash log access could be denied in case there is a previously started log operation in progress. Flash log by design is a 'the best effort' facility, let's re-try a few times if Cr50 returns an error when flash log read is attempted. Also, allow the -L optional parameter to be a decimal value, this is better aligned with the output format where timestamp is reported as a decimal value. BRANCH=none BUG=b:132287488 TEST=ran two concurrent processes, one constantly adding flash log entries using Cr50 console command, and another one constantly retrieving entries using 'gsctool -a -L' observed reliable operation over long periods of time, with occasional flash log lockup log entries reported by the Cr50 (as expected). - verified proper operation when a decimal value is passed in as a -L optional parameter. Change-Id: I4510490c73d616e0d84776f483b9ee7bf11bcbc3 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1639094 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* printf: Add HIDE_EC_STDLIB and __stdlib_compat defines.Allen Webb2019-06-031-4/+9
| | | | | | | | | | | | | | | | | | Fuzzing targets are linked against libec.a so that they can invoke ec functionality while depending on outside libraries that need cstdlib. An issue was being hit with a libprotobuf-mutator fuzzer target because protobuf needed the stdlib version of vfnprintf. This change resolves the issue by keeping the EC version of vfnprinf within libec.a. BRANCH=none BUG=chromium:962947 TEST=make -j buildall Change-Id: Ie0c79199dfba58d5fb04d9f340967a73921d09c8 Signed-off-by: Allen Webb <allenwebb@google.com> Reviewed-on: https://chromium-review.googlesource.com/1637580 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* krane: Enable display bias settings.Yilun Lin2019-06-031-0/+4
| | | | | | | | | | | | | | | | | | | | | | Krane's display bias is controlled by mt6370. Adjust the settings according to the panel which krane uses. Also, discharge VNEG/VPOS when the rails are disabled. TEST=i2cxfer r 0 0x68 0xb1; see output 0x36 i2xcfer r 0 0x68 0xb2; see output 0x68 i2xcfer r 0 0x68 0xb3; see output 0x64 i2xcfer r 0 0x68 0xb4; see output 0x64 BUG=b:125644770 BRANCH=None Change-Id: Ifdda9c9ccc2486009179cbc94cfbf79cb4d04926 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1632132 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ish: remove unused ish_dma_page codeJack Rosenthal2019-06-032-40/+3
| | | | | | | | | | | | | | ish_dma_page was intended to be used in the aontaskfw implementation, but we never used it. Remove the unused code. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I33983a4e6c6de082078b8b6b59519fbc095d8022 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1631588 Reviewed-by: Jett Rink <jettrink@chromium.org>
* common: board_[read/write]_serial weak reference cleanupDenis Brockus2019-06-033-26/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | board_read_serial and board_write_serial were prototyped as weak and this made all instances, that included that prototype, weak as well. In order to not lose information from the prototype, default and override functions, I changed to use the override weak marker symbols. These functions defaulted for specific configurations as different functionality and used an #ifdef tree to do this. I made these a single definition for each function and used IS_ENABLED instead of the #ifdef tree. I also added a definition for the case that the configuration would not have produced a function. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Ie41c53f3a17d665358e46eefd3ded3066ee80a7d Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1631583 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* cr50: Remove user presence check message.Keith Short2019-06-031-1/+4
| | | | | | | | | | | | | | | | | Coreboot on Wilco now uses phyiscal presense checks from the Cr50 to confirm user actions. When booting to the recovery screen, the Cr50 console is flooded with "Presence: 0" messages. Demote the message to DBG images only and only if the user presense was detected. BUG=b:133266946 BRANCH=cr50 TEST=Build DBG and non DBG CR50 images on Wilco. Confirm the message flood is gone at the recovery screen. Change-Id: Ie6b08a386e9e479e61a6764dad8d4a3c9aa57f05 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1638483 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* common: Define markers for weak symbolsDaisuke Nojiri2019-06-031-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | This patch introduces macros to mark weak symbols. These macros are used to annotate weak definitions, declarations, and overriding definitions. __override_proto: declarations __override: definitions which take precedence __overridable: default (weak) definitions Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium.org/964060 BRANCH=none TEST=buildall Change-Id: I44cec41e0523e285db19a890d084b52337f64a9c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1633911 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Tested-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* driver: driver/led/oz554 weak reference cleanupDenis Brockus2019-06-033-2/+12
| | | | | | | | | | | | | | | | | | oz554_board_init was prototyped as weak and this made all instances, that included that prototype, weak as well. In order to not lose information from the prototype, default and override functions, I changed to use the override weak marker symbols. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I06fc1324ee05806da8816ca382e77e18196fde68 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1631582 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cr50: limit ability to disable TPM to certain boardsVadim Bendebury2019-06-034-2/+19
| | | | | | | | | | | | | | | | | | | The TPM disable function requires support from the AP firmware side, only certain Chrome OS devices provide this support. This patch adds a board property for this capability and enables it for the Wilco family of boards. BRANCH=cr50, cr50-mp BUG=b:133189891 TEST=verified that Wilco still could be taken through diagnostics mode back to normal while maintaining the user account. Change-Id: I18174820937500c9b72335f2031c346815b95079 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1636675 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* cr50: do not save NVMEM when disabling TPMVadim Bendebury2019-06-031-10/+0
| | | | | | | | | | | | | | | When TPM is disabled we do not want to invalidate the NVMEM contents in the flash, only the SRAM cache needs to be wiped out. BRANCH=cr50, cr50-mp BUG=b:132973320 TEST=make buildall -j Change-Id: Id05c341ee012ee1daa843c97166bde7c6c327bb6 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1636676 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* charger/rt946x: Add display bias API mt6370_db_set_voltages.Yilun Lin2019-06-032-4/+84
| | | | | | | | | | | | | | | | | | | | Add mt6370_db_set_voltages to control VBST, VPOS, and VNEG. TEST=Test with CL:1632132 on krane: i2cxfer r 0 0x68 0xb1; see output 0x36 i2cxfer r 0 0x68 0xb2; see output 0x68 i2cxfer r 0 0x68 0xb3; see output 0x64 i2cxfer r 0 0x68 0xb4; see output 0x64 BUG=b:125644770 BRANCH=None Change-Id: Ia66ba91a2af3a651a71195dd8a2d531bf1ba06e9 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1613257 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Makefile: Replace flag -DX with -DX= to be supported by IS_ENABLED().Yilun Lin2019-06-039-49/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | IS_ENABLED works for an empty-string-defined macro. However, -D options default to define the macro to 1. This CL forces those macros, such as BOARD_* CHIP_*, CORE_*, CHIP_VARIANT_* and CHIP_FAMILIY_*, to be defined as an empty string, so that it can be supported by IS_ENABLED macro. TEST=use if(IS_ENABLED(BOARD_KRANE)) and see compilation success. TEST=compares build directory w/ and w/o this CL, and see the .smap are the same: ls build/*/*/ec.*.smap | sed -e 's|build/||' | \ xargs -I{} diff -u -a build/{} build.new/{} BUG=none BRANCH=None Change-Id: I96e2aa1cb5f3369e5e445a674595a9234f26707a Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1627840 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* flash_log_vc: return proper error valueVadim Bendebury2019-06-031-1/+1
| | | | | | | | | | | | | | | | | | | | | Vendor command handler should return a vendor command error code which is ORed with VENDOR_RC_ERR by the vendor command routing function. Before this patch flash log vendor command handler was returning VENDOR_RC_ERR, which is filtered out by gsctool resulting in a return value of zero when there in fact is an error. BRANCH=cr50, cr50-mp BUG=b:132287488 TEST=with appropriate fixes in gsctool (coming in the next patch) was able to run concurrently for a long time a process constantly adding log entries using Cr50 CLI command, and a process constantly retrieving log entries using 'gsctool -L' Change-Id: I2094c0b342d65e6c2a382079f81fb10fc8bacab9 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1639093 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* Revert "Makefiles.rules: Do not attempt to run fuzzing tests"Nicolas Boichat2019-06-011-2/+1
| | | | | | | | | | | | | | | | This reverts commit 5c986c3bbf1c414ada67f785f602418fd29e0132. Presumably the previous CL fixes the flakiness. BRANCH=none BUG=chromium:963768 TEST=make buildall -j Change-Id: I972ce5c20586410773a78afe21a1b0c02d9c5f0b Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1623051 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Manoj Gupta <manojgupta@chromium.org>
* Revert "servo_v4: Enable VBUS voltage and current measurement"Wai-Hong Tam2019-06-012-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 2fa7472da15a402ba8649344016ab5351cb768e7. Reason for revert: Use servo I2C driver to access the INA's instead. Don't need the INA driver and the console command in servo v4 firmware. Original change's description: > servo_v4: Enable VBUS voltage and current measurement > > Enable the INA functions on the VBUS of the DUT port (PP_DUT) and the > VBUS of the CHG port (PP_CHG). > > BUG=b:132807223 > BRANCH=servo > TEST=Typed the console command "ina 0" and returned: > > ina 0 > Configuration: 4127 > Shunt voltage: 10d9 => 10782 uV > Bus voltage : 3d3a => 19592 mV > Power : 069b => 42275 mW > Current : 086d => 2157 mA > Calibration : 0400 > Mask/Enable : 0008 > Alert limit : 0000 > > Used a multimeter to measure the VBUS on the DUT port. The measured > voltage and current are close to the above values. > > Did the same thing on the CHG port. > > Change-Id: I1d49540b4685f299437821251cd6422b1c0ac0b8 > Signed-off-by: Wai-Hong Tam <waihong@google.com> > Reviewed-on: https://chromium-review.googlesource.com/1613805 > Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> > Reviewed-by: Scott Collyer <scollyer@chromium.org> Bug: b:132807223 Change-Id: If8517ceb5255e38bb2824e6cb9fe1848142950c8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1638718 Reviewed-by: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* gsctool: make more debug output availableVadim Bendebury2019-06-011-4/+4
| | | | | | | | | | | | | | This would allow to see up to 20 bytes of each packet sent to the TPM when -v command line option is passed to gsctool. BRANCH=none BUG=none TEST=ran 'gsctool -a -L -v' and observed expected traces. Change-Id: If0988e71a3856b2e213b906315651a84051317ce Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1639095 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* util: update hardware write protect check for flash_fp_mcuTom Hughes2019-05-311-2/+4
| | | | | | | | | | | | | | | | | This method of checking seems more robust across devices. The old way did not work on hatch. BRANCH=none BUG=b:124405913 TEST=make buildall -j TEST=flash_fp_mcu /opt/google/biod/fw/nocturne_fp_v2.2.110-b936c0a3c.bin TEST=flash_fp_mcu /opt/google/biod/fw/hatch_fp_v2.0.1359-6f54be08d.bin Change-Id: I513f8bc5dafcdec7a95ac38657a342b3af509ccc Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1637584 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* sweetberry: update I2C clock speeds to match spec/measurements.Brian J. Nemec2019-05-301-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All 4 I2C ports on the Sweetberry were configured at 800 KHz. 3 of the I2C ports are limited to 400 KHz and the FMP I2C port can be up to 1 MHz. This means that 3 of the slower speed I2C ports are out of spec by a factor of two. Traces of the rails showed that the rails were still functioning at 800 KHz, although the FMP I2C rail is actually at 896 KHz. The STM32F4 Reference Manual Rev4 does not indicate which potential problems occur when operating in this condition. The I2C speeds were adjusted to match spec with the 3 slow speed ports set to 400 KHZ. The I2C prescalers for the FMP I2C port do not have a suitable 1 MHz configuration at our system clock speed so the FMP I2C rail was adjusted to 900 KHz to match the measured speed within 2% for all rails. The cost of this change is the scan time for a group of 28 INA's increased from 4.9 ms to 5.5 ms. BRANCH=servo BUG=b:133503970 TEST=Verified Sweetberry can measure rails when used with powerlog. Observed I2C rail activity using a Saleae analyzer. Signed-off-by: Brian Nemec <bnemec@chromium.org> Change-Id: Id345c1dd902212b92089e5ab3e04dd187efb4542 Reviewed-on: https://chromium-review.googlesource.com/1628641 Commit-Ready: Brian Nemec <bnemec@chromium.org> Tested-by: Brian Nemec <bnemec@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Brian Nemec <bnemec@chromium.org>
* garg: add simplo 916Q2286H batteryDevin Lu2019-05-302-2/+30
| | | | | | | | | | | | | | | | Garg is using the same battery as blacktip(CL:807967). BUG=b:133125112 BRANCH=octopus TEST=make buildall -j Change-Id: I1624517ee5e2f9eb9ffec204d2c39b85728fc8de Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/1634630 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
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