| Commit message (Collapse) | Author | Age | Files | Lines |
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Fix data table for:
- 3v3 51.1K pull-up resistor divider with the 47K thermistor
- 3v3 13.7K pull-up resistor divider with the 47K thermistor
- 3v0 22.6K pull-up resistor divider with the 47K thermistor
Now they are using table based on manufacturer resistance table instead
of constant B parameter Steinhart-Hart equation.
BRANCH=none
BUG=b:184857072
TEST=makeall
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Ib1998c5e528731e4c2f00e0eb76a568eb4acba6e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2886887
Reviewed-by: Jett Rink <jettrink@chromium.org>
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ADL-P-DDR4 RVP has on board Microchip EC-MEC1521. This code enables
RVP powering ON using this on board EC, instead of Mica EC.
As this onboard EC doesn't have internal flash memory, EC binary of
512KB size generated is flashed to external SPI Flash1(32MB size)
available on RVP over SPI using servo.This image from flash1 is
then bootloaded by MEC1521, when powered ON.
BUG=b:186669325
BRANCH=none
TEST=ADL-P-DDR4 board with Microchip 1521 EC booted to S0.
Signed-off-by: Poornima Tom <poornima.tom@intel.com>
Change-Id: I39f937f60e2f79b0d2de195621084e3276e36bf2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2755363
Tested-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
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BUG=b:186669325
BRANCH=none
TEST=make buildall -j
Signed-off-by: Poornima Tom <poornima.tom@intel.com>
Change-Id: I8f1cc9f3e053ad53061e0c19170a0f638d439c13
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2906443
Tested-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: Vijay Hiremath <vijay.p.hiremath@intel.com>
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In ESPI communication, when no specific configs are defined,
the default configuration must use Maximum frequency,
all channels and all modes.
BUG=b:186669325
BRANCH=none
TEST=make buildall -j
Signed-off-by: Poornima Tom <poornima.tom@intel.com>
Change-Id: I61caa65f22d394093bfd1ebd39c9d065d5c1b2d0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2784334
Tested-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
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BUG=b:188577674, b:180980668
BRANCH=none
TEST=boot to kernel on Asurada. (with connecting both AC and battery)
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: Icbcdfbad611eed4b7684c05133a4a20fed245353
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2905038
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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BRANCH=none
BUG=none
TEST=build asurada.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: I1fb117060ecab8091ee1f54b7be2d0e93fcfcf16
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2905037
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Add the resistance table we used in the lookup table calculation in the
thermistor.c file.
BRANCH=none
BUG=none
TEST=none
Change-Id: If9d2e11b5e1b40bf67698187d99849220ff97ea6
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2904831
Reviewed-by: Tomasz Michalec <tm@semihalf.com>
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Some platforms don't have an extpower interrupt and therefore use the
`board_check_extpower` function to determine if extpower is
actually present. Any time the EC changes its charge port selection, we
should re-evaluate the extpower as it likely has now changed.
This commit simply does the above. Note that the default implementation
of `board_check_extpower` doesn't actually do anything, so this
should be a no-op for most boards.
BUG=b:187965740
BRANCH=dedede
TEST=Build and flash drawcia, verify that "AC on" prints are only
printed when we decide to charge from a port and not just when VBUS is
present
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ib758b480a1e6f59f0f10caa1328b795726927f0b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2904546
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The dedede boards erroneously assumed that if VBUS was present, then
"extpower" was present. "extpower" is generally connected to the ACOK
signal for the battery charger IC. It indicates that the voltage
present at the switching node is valid for bucking or boosting. For our
Type-C systems, this needs to be at least 4V. However, just because
VBUS is present doesn't mean that the voltage is present at the
switching node. The FETs on the selected charge port needs to be
enabled first.
This commit simply changes the logic to check the battery charger ICs'
ACOK status to reflect whether extpower is present.
BUG=b:187965740
BRANCH=dedede
TEST=Build and flash drawcia and madoo, verify that "AC on" prints are
emitted when the charge port is selected and not just when VBUS appears
on the port.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: If5a4a10d502f2f08ccf1d3228e42f48fa6d45909
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2901254
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This commit adds a function to return whether the voltage before the
switching FETs is greater than ~4V. This would generally be the
criteria for other buck-boost chargers which have an "ACOK" signal.
BUG=b:187965740
BRANCH=dedede
TEST=With other changes, build and flash drawcia, verify that "AC on"
prints are only printed when we decide to charge from a port and not
just when VBUS is present
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: If3a5398197fb0a251b5290d107daf88e56ca12b4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2901253
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This commit adds a function to return the status of the ACOK pin in FW.
BUG=b:187965740
BRANCH=dedede
TEST=Build and flash madoo, verify that "AC on" is on printed when we
actually decide to charge from a port and not just when VBUS is present.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Iacff19542587d102798c645d66a0ea15aaa51439
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2901252
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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BUG=b:180980668
BRANCH=none
TEST=get powerbtn command in shell
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I1af4673b7eff84149e3aabad7ff09445a1f96e1b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2895306
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Add three battery type for cret.
And add device name to identify.
BUG=b:183875170
BRANCH=dedede
TEST=make BOARD=cret
Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com>
Change-Id: I923eed50eb08be38a60a01c28dc2eb9e35f9d255
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2905166
Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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NPCX series ROM code changes the chip basic setting by firmware binary
header for loading the firmware from flash to RAM. All the NPCX series
chips could use it, so those configuration options are moved to
upstream.
The ecst chip version automatic select by CONFIG_SOC_NPCX7MNX.
Currently, the project setting doesn't set to the expected chip part
number. Change the following project to select the target chip &
configure ecst header:
- volteer: npcx7m7fc
- trogdor: npcx7m6fc
- kohaku: npcx7m6fc
BUG=b:184448653
BRANCH=none
TEST=zmake testall
TEST=volteer boot to OS
Cq-Depend: chromium:2872415
Signed-off-by: Yuval Peress <peress@chromium.org>
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: Ieed6c21536401f70950ddd1f18d243b127d896ed
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2867128
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Tested-by: Keith Short <keithshort@chromium.org>
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The git repository information is not available to ebuilds after doing a
"cros-workon-<board> start" on the package. Fall back to the VCSID in
this case.
BUG=b:188530338
BRANCH=none
TEST=emerge zephyr-build-tools
TEST=zmake testall
TEST="cros-workon-volteer-zephyr start chromeos-zephyr" and
"emerge-volteer-zephyr chromeos-zephyr"
Cq-Depend: chromium:2902154
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I03227005097b114061514ef1f1dcd79f242a1bf7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2903906
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Some settings still look off but this syncs
up the zephyr adc multipliers/dividers to be as
the CrOS EC values that are used.
21-05-18 17:52:09.112 uart:~$ adc
21-05-18 17:52:10.663 ADC_VBUS = 20830 mV
21-05-18 17:52:10.673 ADC_BOARD_ID_0 = 588 mV
21-05-18 17:52:10.680 ADC_BOARD_ID_1 = 134 mV
21-05-18 17:52:10.690 ADC_AMON_BMON = 1777 mV
21-05-18 17:52:10.700 ADC_PMON = 43 mV
BUG=b:187210461
BRANCH=none
TEST=adc shell command
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Ifa15c5e646639e5355a9fe159727b3650d34744c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2903126
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Commit-Queue: Yuval Peress <peress@chromium.org>
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Commands that are send peridically or in high number are not
reported on the console through CONFIG_SUPPRESSED_HOST_COMMANDS
variable.
Use the same set of commands throughout to avoid misses like
newer command EC_CMD_GET_UPTIME_INFO.
BUG=none
BRANCH=none
TEST=buildall
Signed-off-by: Gwendal Grignou <gwendal@google.com>
Change-Id: I0041576538a8cc659c262118b1503777b9ea8578
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2851452
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Craig Hesling <hesling@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
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When keyboard backlight is 0%, the backlight led driver should be
disabled to save power. By aliasing this GPIO, the common
keyboard_backlight handler will toggle this GPIO on kblight_enable.
BUG=b:187757151
TEST=Set backlight to 0, 50, 0 and observe the enable gpio is 0, 1, 0
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I22b0bb31720e9e17e9d896759be6b2ccf8c69d42
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2887551
Commit-Queue: Diana Z <dzigterman@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BUG=b:187379242
TEST=make -j BOARD=homestar
Verify build on EVT board
BRANCH=Trogdor
Signed-off-by: tongjian <tongjian@huaqin.corp-partner.google.com>
Change-Id: I08f2ab2f32150cf07d10b9987b9f19f18d9b566d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2878756
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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Change CONFIG_SYS_CLOCK_TICKS_PER_SEC to match our timer3 frequency
for more precise timing (1 tick ~= 30.5us).
BUG=none
BRANCH=none
TEST=on hayato, console cmd "gettime" twice
and compare to my timer time
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Change-Id: I1fbd2b0674a591c57548250bc1b3ce60d8e0405c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2887025
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Important EC log messages are getting overlapped by TCPC/PD messages. The
default level is now set to 0.
BRANCH=none
BUG=b:186707521
TEST=running FAFT PD with `pd dump 0` works
Signed-off-by: Boris Mittelberg <bmbm@google.com>
Change-Id: Ia3415c878e49bae01460f5e2acb6b8ce736b9986
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2904553
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
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Increase the max power PD can sink to 100W. Components are rated to
support the load.
BUG=b:188538949
TEST=ectool usbpdpower 1
Port 1: SNK Charger PD 20420mV / 4700mA, max 20000mV / 4700mA / 94000mW
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I824f4b8ca03eeb6240a46c4edd8764a84aa74b3d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2903908
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Power voltage SNS_PPVAR_PWR_IN is a 5/39 voltage divider.
BUG=b:188538949
TEST=adc POWER_V
POWER_V = 20463 mV
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: Ic7c83241854a4a55c3db64d5e6220baea47d0b27
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2903907
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Add tests for functions from driver/battery/smart.c
To test them, Smart Battery emulator is used.
BUG=b:184855975
BRANCH=none
TEST=run zmake drivers test
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I51bdcc2a18c7f30f037b0273ca1ae584312a574b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2903207
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
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Add Smart Battery emulator which is emulated device on i2c bus. Emulated
battery properties are defined through device tree, but they can be
changed in runtime through Smart Battery emulator API. It allows to set
custom handlers for write and read messages to emulate more complex
scenarios or malfunctioning device.
BUG=b:184855975
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Ia94a0a122123e3259882dfdc80d067c61c98379b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2903206
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
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Create new configs (Chromium EC namespace and Zephyr namespace) for
SC7280. In this state, SC7280 power sequence has no difference
from SC7180.
BRANCH=None
BUG=b:187980397
TEST=Built all the Chromium EC images and Zephyr EC images.
TEST=Modify a board to use the new CONFIG.
Change-Id: I178b8ffa5d79d3828baf222ac77906ab2262cf76
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2893069
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1.add a new thermal sensor for detect typeC field temp
2.modify sensor name
BUG=b:188367187
BRANCH=dedede
TEST=make BOARD=blipper,'ectool temps all' test ok
Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Change-Id: Iae0624ca33a80125b58b92e5b564c6211c107931
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2902061
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Enable the Tablet Mode Switch config to fix activating Tablet Mode on
Lazor.
BUG=b:188147017
BRANCH=none
TEST=Build and flash Zephyr on Lazor, boot to OS and verify that
Chormebook switches to the Tablet Mode after 'tabletmode on' console
command.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I95c7fa645dd5e8325147d7548fa99f2a1ddcccaa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2900217
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Add the Tablet Mode Switch config for Zephyr. It is used by some boards
to indicate the Tablet Mode state via MKBP protocol.
BUG=b:188147017
BRANCH=none
TEST=zmake testall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I7cba3808783679921af9041497daea4df736e202
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2897238
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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The SC7180 power signals, like AP_RST_L, WARM_RESET, and POWER_GOOD
need special interrupt handlers. Missing them will cause:
* AP warm reset doesn't notify the reset hook;
* AP firmware flashing may fail.
BRANCH=None
BUG=b:183054226
TEST=Toggling the WARM_RESET, like `dut-control warm_reset:off`,
EC UART shows the message:
Long warm reset ended, cold resetting to restore confidence.
TEST=Execute AP warm reset, check it triggers CHIPSET reset hook.
Change-Id: Id6ea38abb1a10017bf603852908ac6d5dd6f78f4
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2901239
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Add support for it8xxx2 cros_kb_row driver.
BUG=b:187192587
BRANCH=none
TEST=on hayato, console cmd "ksstate" then press key:
[115.097839 KB state: -- -- -- 02 -- -- 02 -- -- -- -- -- --]
[116.462371 KB state: -- -- -- -- -- -- 02 -- -- -- -- -- --]
[116.499633 KB state: -- -- -- -- -- -- -- -- -- -- -- -- --]
Cq-Depend: chromium:2902165
Change-Id: I067b95bf2dfe4978e5370ce27382c67db100467b
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2784322
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Enable the I2C driver and connect with I2C peripheral to
test writing and reading data.
BUG=b:185202623
BRANCH=none
TEST=shell:
"i2c scan I2C_0(I2C_1, I2C_2, I2C_4)"
"i2c write_byte I2C_0 0x52(slv) 0x10 0x20"
"i2c read_byte I2C_0 0x52(slv) 0x10"
Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com>
Change-Id: I112aa379ba6162d774e6cd861fb6f579bb859823
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2878764
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Move shim/chip/npcx/keyboard_raw.c most functions to
shim/src/keyboard_raw.c.
BUG=none
BRANCH=none
TEST=zmake -lDEBUG configure -B zephyr/build
-b zephyr/projects/volteer/volteer
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Change-Id: Ic69752223517cabb9e1d1c7ff16c9eb4914186db
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2900122
Reviewed-by: Keith Short <keithshort@chromium.org>
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Call ap_deferred() function directly (not as deferred function) from
board_init_rw(). This change causes CS pin interrupt to be enabled
while running board_init() init hook, just after SPI initialization.
It removes 43ms window when SPI is initialized but we are not able
to communicate because interrupt on CS line is not enabled. This
change only affects RW firmware.
FPMCU log without this change:
[Reset cause: reset-pin soft sysjump]
[1.322620 Inits done]
[1.322665 hook_task: running HOOK_INIT]
[1.322713 hook notify 0]
[1.322754 spi_init: init]
[1.322794 spi_init: SPI initialized]
[1.322846 board_init: init]
[1.322901 FP_SPI_SEL: DEVELOPMENT]
[1.322954 TRANSPORT_SEL: SPI]
[1.323009 hook_task: enabling all other tasks]
Console is enabled; type HELP for help.
> [1.323106 event set 0x0000000000002000]
[1.323176 hostcmd init 0x0000000000002000]
[1.323238 FP_SENSOR_SEL: FPC]
FPC libfpsensor.a v0.2.0.064
[1.365068 hook call deferred 0x8100365]
[1.365132 ap_deferred: SLP_L is 1]
[1.365180 ap_deferred: SLP_ALT_L is 1]
[1.365232 hook notify 6]
[1.365271 spi_chipset_startup: enabling interrupt]
After main(), only hook task is marked as ready, so we are switching to
it and start executing HOOK_INIT hooks (spi_init() and board_init() are
called). SPI initialization is performed, but CS interrupt is still not
enabled (spi_init() checks if chipset is on). The interrupt is enabled
on HOOK_CHIPSET_RESUME. For RW side HOOK_CHIPSET_RESUME is emitted when
SLP_L and SLP_ALT_L are set to 1 (see ap_deferred()). ap_deferred() is
a deferred function so it is called from hook task context. It is
scheduled always in board_init_rw() or in slp_event() when SLP_L and
SLP_ALT_L changes.
When hook task finishes executing all HOOK_INIT hooks it enables other
tasks with task_enable_all_tasks(). Now task with higher priority is
scheduled (CONSOLE, HOSTCMD, FPSENSOR tasks have higher priority than
HOOK task). When all higher priority tasks are waiting for events hook
task is scheduled and we can finally run ap_deferred() function which
should enable interrupt on CS pin (if AP is running).
FPMCU log with this change, interrupt is enabled 300us after SPI is
initialized:
[Reset cause: reset-pin soft sysjump]
[1.322458 Inits done]
[1.322503 hook_task: running HOOK_INIT]
[1.322551 hook notify 0]
[1.322592 spi_init: init]
[1.322632 spi_init: SPI initialized]
[1.322684 board_init: init]
[1.322740 FP_SPI_SEL: DEVELOPMENT]
[1.322793 TRANSPORT_SEL: SPI]
[1.322837 ap_deferred: SLP_L is 1]
[1.322885 ap_deferred: SLP_ALT_L is 1]
[1.322936 hook notify 6]
[1.322975 spi_chipset_startup: enabling interrupt]
[1.323113 hook_task: enabling all other tasks]
BUG=b:185467818
BRANCH=none
TEST=make -j buildall
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I91f868c01458ac5b7d02c4e5d2a7ae51060ffc50
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2900222
Reviewed-by: Craig Hesling <hesling@chromium.org>
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1. Base on keyboard spec, modify the keyboard related setting.
BUG=b:187343638
BRANCH=none
TEST=make BOARD=pirika and pirette
1. Verify keyboard function behavior.
Signed-off-by: Kirk Wang <kirk_wang@pegatron.corp-partner.google.com>
Change-Id: I865b7e913c8901f5f02e974b3224d6d4c29891eb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2900118
Reviewed-by: Alex1 Kao <alex1_kao@pegatron.corp-partner.google.com>
Reviewed-by: Shou-Chieh Hsu <shouchieh@chromium.org>
Commit-Queue: Shou-Chieh Hsu <shouchieh@chromium.org>
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Add ICM-42607 accel/gyro driver code.
BUG=chromium:1198171
BRANCH=None
TEST=ectool motionsense && CROS-EC IIO drivers
Signed-off-by: JuHyun Kim <jkim@invensense.com>
Change-Id: If2cff2bd20ac69ca40bc56af50dcabbd4f5910d6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2822268
Reviewed-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
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After removing CONFIG_VBOOT_HASH_RELOAD_WATCHDOG it is no longer
needed to be listed in util/config_allowed.txt
BRANCH=none
BUG=b:182499153
TEST=Build cros EC and zephyr without errors
Change-Id: I65db5e960688075f24cfa52b970762edafa93223
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2897241
Reviewed-by: Rob Barnes <robbarnes@google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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On CrosEC the watchdog is initialized just after printing banner.
Without this change, hangup in eg. vboot hash calculation can
result in EC being unresponsive.
BUG=none
BRANCH=none
TEST=Add infinite loop in hash calculation function (efs2.c).
Without this change, EC will be unresponsive.
With it, watchdog will reboot the EC.
Change-Id: I68c33bf79ad9645da55c1782662c19d9cb7cc58d
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2897240
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This reverts commit 0e5fa530e2f1eba6e16188be65ac39974a151a17.
After commit 97e22d467 it is no longer needed to reload
watchdog during hash calculation.
BUG=b:182499153
BRANCH=none
TEST=Flash EC and verify that hash calculation is correctly
done without rebooting by watchdog. Reading watchdog value
shows that there is enough remaining time.
Change-Id: Ia7bb6452a6ac42cda88d8b5e1203876cd0465b31
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2897239
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Rename the power signals from SC7180 to SC7X80. Rename the functions.
BRANCH=None
BUG=b:187980397
TEST=Built all the Chromium EC images and Zephyr EC images.
Change-Id: Icf932b5cc892dcc9e57bff10bdd6db8d532f24a9
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2893485
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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Trogdor rev-0 and rev-1 are clamshell designs. Trogdor rev-2 is a
convertible design. We don't support rev-0 and rev-1. Make it straight
to a convertible:
* Add the lid acceleration sensor
* Just assign a random rotation metrix, as no chassis
* Add the GPIO TABLET_MODE_L interrupt
* Enable lid angle detection that disables keyboard
* Enable sensors in S3 for the above angle detection
BRANCH=None
BUG=b:187343625
TEST=Build the Trogdor image and enable "accelinfo on" which shows
the lid accel reading and the lid angle.
As the lid accel sensor is not mounted to the lid surface. The
lid accel reading and the lid angle are not accurate.
Change-Id: I16af2c63181eb6037fbf6742c07427e20064c335
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2895920
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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BUG=b:187210461
BRANCH=none
TEST=AP is not booting yet, so just make sure this builds
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I9054cdb830f961f86aa083e67c2b0b0b2d1f11f2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2895791
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Yuval Peress <peress@chromium.org>
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BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Idb71acc9b8d6d903766e51bd3848a3200e1e50e6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2895305
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Commit-Queue: Yuval Peress <peress@chromium.org>
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AP is not running, so not a lot of testing that
can happen other than see if it builds. This is
required to be enabled before AP can be enabled.
BUG=b:180980668
BRANCH=none
TEST=zmake configure -b zephyr/projects/asurada/hayato
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Ie106e3b3b086d5c68e83a19977209d12245349b3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2895304
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Commit-Queue: Yuval Peress <peress@chromium.org>
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BUG=b:187210461
BRANCH=none
TEST=ec shell "adc"
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Id1915e380389bea8b3eee8d7dc4780609533ab9d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2876868
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Yuval Peress <peress@chromium.org>
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tie CONFIG_PLATFORM_EC_ADC to CONFIG_ADC
Disable the zephyr adc_shell command as there is
already one present in Chromium EC
BUG=none
BRANCH=none
TEST=submit build should verify it is ok
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I3db30f674e917e8b55a90cec2b746939374d6767
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2895790
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Commit-Queue: Yuval Peress <peress@chromium.org>
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Add an explicit dependency between the generated ec_version.h file and
the app library. This ensures the version header file is created before
compiling the app library.
BUG=b:188439971
BRANCH=none
TEST=zmake testall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I5876939b76ffcf5691f40f59b39a1e02a8314ebb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2896933
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Call ap_deferred() function directly (not as deferred function) from
board_init_rw(). This change causes CS pin interrupt to be enabled
while running board_init() init hook, just after SPI initialization.
It removes 43ms window when SPI is initialized but we are not able
to communicate because interrupt on CS line is not enabled. This
change only affects RW firmware.
FPMCU log without this change:
[Reset cause: reset-pin soft sysjump]
[1.322620 Inits done]
[1.322665 hook_task: running HOOK_INIT]
[1.322713 hook notify 0]
[1.322754 spi_init: init]
[1.322794 spi_init: SPI initialized]
[1.322846 board_init: init]
[1.322901 FP_SPI_SEL: DEVELOPMENT]
[1.322954 TRANSPORT_SEL: SPI]
[1.323009 hook_task: enabling all other tasks]
Console is enabled; type HELP for help.
> [1.323106 event set 0x0000000000002000]
[1.323176 hostcmd init 0x0000000000002000]
[1.323238 FP_SENSOR_SEL: FPC]
FPC libfpsensor.a v0.2.0.064
[1.365068 hook call deferred 0x8100365]
[1.365132 ap_deferred: SLP_L is 1]
[1.365180 ap_deferred: SLP_ALT_L is 1]
[1.365232 hook notify 6]
[1.365271 spi_chipset_startup: enabling interrupt]
After main(), only hook task is marked as ready, so we are switching to
it and start executing HOOK_INIT hooks (spi_init() and board_init() are
called). SPI initialization is performed, but CS interrupt is still not
enabled (spi_init() checks if chipset is on). The interrupt is enabled
on HOOK_CHIPSET_RESUME. For RW side HOOK_CHIPSET_RESUME is emitted when
SLP_L and SLP_ALT_L are set to 1 (see ap_deferred()). ap_deferred() is
a deferred function so it is called from hook task context. It is
scheduled always in board_init_rw() or in slp_event() when SLP_L and
SLP_ALT_L changes.
When hook task finishes executing all HOOK_INIT hooks it enables other
tasks with task_enable_all_tasks(). Now task with higher priority is
scheduled (CONSOLE, HOSTCMD, FPSENSOR tasks have higher priority than
HOOK task). When all higher priority tasks are waiting for events hook
task is scheduled and we can finally run ap_deferred() function which
should enable interrupt on CS pin (if AP is running).
FPMCU log with this change, interrupt is enabled 300us after SPI is
initialized:
[Reset cause: reset-pin soft sysjump]
[1.322458 Inits done]
[1.322503 hook_task: running HOOK_INIT]
[1.322551 hook notify 0]
[1.322592 spi_init: init]
[1.322632 spi_init: SPI initialized]
[1.322684 board_init: init]
[1.322740 FP_SPI_SEL: DEVELOPMENT]
[1.322793 TRANSPORT_SEL: SPI]
[1.322837 ap_deferred: SLP_L is 1]
[1.322885 ap_deferred: SLP_ALT_L is 1]
[1.322936 hook notify 6]
[1.322975 spi_chipset_startup: enabling interrupt]
[1.323113 hook_task: enabling all other tasks]
BUG=b:185467818
BRANCH=none
TEST=make -j buildall
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I51a30b1cec35d19d6cdf3241a310e7427c750f88
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2891863
Reviewed-by: Craig Hesling <hesling@chromium.org>
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Increase the max power PD can sink to 100W. Components are rated to
support the load.
BUG=b:176988382
TEST=96W charger + charge phone + run aquarium test: no brownout
$ ectool usbpdpower 1
Port 1: SNK Charger PD 19968mV / 4700mA, max 20000mV / 4700mA / 94000mW
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I03e5a8b84debf26245377da8e009178e3d2fe6f7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2895803
Commit-Queue: Diana Z <dzigterman@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The existing SC7180 power sequence can be reused on its next generation.
Generalize the filenames, sc7180.c/sc7180.h to qcom.c/qcom.h.
BRANCH=None
BUG=b:187980397
TEST=Built all the Chromium EC images and Zephyr EC images.
Change-Id: Ie04218ef0a12a4e8aa2db353040c5c39c533ae6f
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2893484
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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