| Commit message (Collapse) | Author | Age | Files | Lines |
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USB Power Delivery Specification Revision 3.0, version 2.0 section 6.3.7
states that a dual-role port shall respond to Get_Source_Cap with its
source capabilities, but this was incorrectly handled by responding with
a request for source capabilities.
Per section 8.3.3.18.10, implement the PE_DR_SNK_Give_Source_Cap state to
handle this correctly.
To support the new test, some helper functions for the fake PE are added
and the test code's copy of the PE state enum is updated to be in sync
with the real one.
BUG=b:161400825,b:161331630
TEST=New host test for this state, and verified on Dalboz that requesting a
PRS via the EC console (`pd 1 swap power`) now sends source
capabilities when the partner requests them.
BRANCH=None
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I87c27d406e0a3f57cf2c25fa583bee51155b6b12
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336233
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The flash layout for kalista boards splits the flash area into 4
segments, used for RO, RW_A, and RW_B images. The
CONFIG_EC_PROTECTED_STORAGE_SIZE and CONFIG_EC_WRITABLE_STORAGE_SIZE
options need to be adjusted to match.
BUG=b:160330682
BRANCH=none
TEST=make buildall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ia087995840dd19250cdbd82de4456e90a9b28685
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2339837
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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We are retrying in both the TCPC hardware (4 total) and
in the Protocol layer (3 total) when we do not get a GoodCRC back from
the port partner. We are only suppose to retry up to nRetryCount times
which is 2. This means we should be sending 3 total replies.
Also correct a misinterpretation of the spec around SOP' and SOP"
retries. We were not retrying those packets, but we should be retry them
as the SOP. The SOP' device will not retry, but we (as the SOP) should
retry packet that we are sending to them.
The TCPM is not fast enough to meet the timing for tRetry (195 usec), so
we need to perform the retries in the TCPC hardware layer.
BRANCH=none
BUG=b:150617035
TEST=Verify passing compliance test with GRL-C2 on Trembyle
Change-Id: I55c4ab2f5ce8f64acf21af943862d96d9088622d
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2248960
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The ectool command rwsig dump key_id's output was missing zeros in the
hex string output. This is because we print each byte independently
using the naked %x formatter, which will print the minimum hex
characters necessary to represent the independent number provided.
We need to force exactly 2 hex characters for each independent byte
printed.
BRANCH=none
BUG=b:162588911
TEST=# Nocturne
make BOARD=nocturne_fp build/nocturne_fp/util/ectool
# Copy build/nocturne_fp/util/ectool to fat32 flash drive
mkdir /tmp/rem
mount /dev/sda1 /tmp/rem
ectool --name=cros_fp rwsig dump key_id | tr -d '\n' | wc -c
# Identify there are less than 40 chars (39 in my case)
/tmp/rem/ectool --name=cros_fp rwsig dump key_id | tr -d '\n' | wc -c
# Identify there are exactly 40 chars
# Rerun both commands without the byte counting to sanity
# check the output
Change-Id: I0a43833adb647aa034df87678c9657466cc8aef5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336865
Commit-Queue: Craig Hesling <hesling@chromium.org>
Commit-Queue: Tom Hughes <tomhughes@chromium.org>
Tested-by: Craig Hesling <hesling@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Auto-Submit: Craig Hesling <hesling@chromium.org>
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The latest Puff board variants remove temperature sensor 2
and change the location of temperature sensor 1 to the SoC core.
Since one sensor has been removed, this change is backwards compatible
with previous boards (with the only exception that the location of the
sensor has changed, so the description is different). For previous
boards, the second temp sensor will be ignored.
BUG=b:162909373
TEST=Confirm that puff and variants only monitor one temp sensor.
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I0b03cbb24460a6569d36fbc6a0dab1c3c58dffbd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336350
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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Move the LPC handling logic out of the sleep failure detection
functions. For example, move the lpc_s0ix_suspend_clear_masks()
to the first SUSPEND hook, move power_update_wake_mask() out of
sleep_complete_resume().
BRANCH=None
BUG=b:162083524
TEST=Build the hatch board.
Change-Id: I16c4ed88e7cf40aabb9ce2d9ec95f7994dfe7efc
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321873
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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This patch fixes flash_ec to take the last line of grep result from the
output of 'flashrom --flash-size'.
BUG=b:162771462
BRANCH=none
TEST=ran flash_ec on nocturne with suzy-Q connected.
$ ./util/flash_ec --image /Downloads/nocturne.bin --board nocturne \
--verbose
INFO: Using ccd_cr50.
INFO: Using ec image : /Downloads/nocturne.bin
INFO: Flashing chip npcx_int_spi.
dut-control --port=9999 cold_reset:on
dut-control --port=9999 fw_up:on
dut-control --port=9999 cold_reset:off
INFO: Running flashrom:
...
Erasing and writing flash chip... SUCCESS
INFO: Flashing done.
INFO: Restoring servo settings...
dut-control --port=9999 fw_up:off
dut-control --port=9999 ccd_ec_boot_mode_uut:off
dut-control --port=9999 ccd_ec_boot_mode_bitbang:off
dut-control --port=9999 cold_reset:on
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Change-Id: I1120c828ddb33f327cce46435ec9fa26b10d1908
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2340088
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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The `charger_dump` command is currently useful for these boards.
BUG=None
BRANCH=None
TEST=Build drawcia, verify charger_dump command is present.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I29cc70113be1c3c3096668c6d5969c4f755f915b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2339843
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Allow AC prochot threshold to be increased to match PD max current.
BUG=b:162376053 b:162565066
BRANCH=none
TEST=prochot not asserted while battery charges
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I11761e8d2d15b52f7552e8d951c6633583ab5ba8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334353
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Tested-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com>
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This commit adds a ocpc_init() function which will also chain off to a
board specific init function as well. Currently, the init function
sets up the initial resistances. The board specific init functions
may set up charger specific parameters.
BUG=b:147440290
BRANCH=None
TEST=Enable on waddledee, build and flash and verify charging still
works. Verify that initial resistances are seeded.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ia25aff9d2032746f42cbf0f7b6c5707d20362203
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336173
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This commit adds a charger flags member variable to the OCPC data
structure. This allows boards to define certain features that the
chargers that they are using have or don't have. To start, the
attribute of no Isys measurement is added.
BUG=b:155224387
BRANCH=None
TEST=With other CLs, build and flash waddledee, verify that DUT can
calculate combined resistance.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I6b8f0a9501e0d79747e42f3444397d7516f01b2f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335892
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Change the linker symbol used to track available flash from __image_size
to __flash_used. __image_size is now only used on the struct image_data
header.
BUG=b:160330682
BRANCH=none
TEST=make buildall
TEST=Run compare_build.sh against the following boards:
cortex-m: volteer (npcx chipset)
cortex-m0: honeybuns (stm32f0 chipset)
minute-ia: not changed
nds32: waddledee (it83xx)
riscv-rv32i: asurada (i8xxx2)
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I94f5b4827cc0da1055520685cfeb1fafc0119e1c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334389
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Add linker defined labels for the configured flash sizes. This is only
used for image analysis.
BUG=none
BRANCH=none
TEST=make buildall
TEST=To see the labels run
"nm -n build/<board>/RW/ec.RW.elf | grep __config"
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ib4db8478b19a8d93776c68fa24ee31fb21a50a24
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325765
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The previous refactoring CL:2290831 aligns the kblight host command to
act the same as the general PWM driver. But the kblight ACPI remains
unchanged, that results a bug that the kblight is initially off and no
way to enable it.
Should align the kblight ACPI too.
BRANCH=None
BUG=b:162892223
TEST=Build the berknip board.
Change-Id: I439dac642dc34335e2f5d277467789c94c1f8fef
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2338988
Reviewed-by: Aaron Durbin <adurbin@google.com>
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Google is working to change its source code to use more inclusive
language. To that end, replace the term "dummy" with inclusive
alternatives.
BUG=b:162781382
BRANCH=None
TEST=make -j buildall
`grep -ir dummy *`
The only results are in "private/nordic_keyboard/sdk8.0.0"
which is not our code.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I6a42183d998e4db4bb61625f962867fda10722e2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335737
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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Enable flash clock 48Mhz, so the test environment same as
project ampton and waddledee.
BUG=none
BRANCH=none
TEST=can boot and PD functions work.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Change-Id: I8ac3ebef79a4ced9d963e4841c3304f4bd2c96e6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334437
Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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On board reef_it8320, it doesn't support chromeos vivaldi
keyboard function, so undefine the configuration.
BUG=none
BRANCH=none
TEST=Top function keys are working now.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Change-Id: If3899b64a028272f997703a6fe5c2beb09813d42
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334436
Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Flash it8xxx2_pdevb code by SPI.
BUG=none
BRANCH=none
TEST=can flash code by SPI on board it81202_pdevb.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Change-Id: Ibc83bd5596f65fe8f9558f9575677feeb3da2f91
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334435
Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Larger stack size on board it8xxx2_pdevb and reef_it8320.
BUG=none
BRANCH=none
TEST=can boot on board it81202_pdevb and reef_it8320
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Change-Id: Iaee6ce48399dde5adddce5894474a1152b5f9453
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334434
Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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When FW image size is less than flash rom SPI size, the temp image
should be placed after FW image for ite_spi programming mode.
BUG=none
BRANCH=none
TEST=zephyr.bin(size=18.4k) is successfully burned to it8xxx2_evb
to print hello world.
Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com>
Change-Id: I163d954e91d31a598d0957f7a4de67cef13223f9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335525
Reviewed-by: Jett Rink <jettrink@chromium.org>
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PPC Vconn control should have been handled in the set_vconn.
BUG=b:162294637
TEST=Vconn is still sourcing on asurada
BRANCH=none
Change-Id: I205a09693cdb57b83830f986b77535d28ed3569c
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325491
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Disabling PPC's Vconn first in case the PPC's Vconn
feed back to TCPC.
On ITE EC, its CC pins have multi-function (analog module), and
it needs to disable PPC's Vconn then can safely disable the 5V
tolerance on the CC pin.
Switching the PPC disable order should have no effect to the other
TCPCs.
BUG=b:162294637
TEST=On asurada(ITE EC) and lazor(NPCX EC), Vconn is enabled and
disabled on hub plug/unplug
BRANCH=none
Change-Id: If2af04931d00c5c8a52908a3391a482a7571b5fc
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2331987
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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config LGC battery MPPACEEASW1C
BUG=b:162701180
BRANCH=none
TEST=Make sure battery can cutoff by console "cutoff" or "ectool cutoff"
and resume by plug in adapter.
Change-Id: I89fa4ae383c9f59434aa4111e531c775d83270b4
Signed-off-by: ben.chen2@quanta.corp-partner.google.com
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336374
Reviewed-by: Keith Short <keithshort@chromium.org>
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config gpio keyboard backlight en pin, and enable/disable
in power on/off sequence
BUG=b:162632407
BRANCH=none
TEST=make buildall
TEST=run 'kblight' EC console command to verify keyboard backight
TEST=run 'ectool verify pwmsetkblight' to verify keyboard backlight
Change-Id: I7907d5a49f9db6a722989a054f7ad6aec6b6d55f
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335517
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Use the same default value as powerd, i.e. 97% instead of 94%.
The value comes from:
src/platform2/power_manager/default_prefs/power_supply_full_factor
BRANCH=None
BUG=b:162604872
TEST=Checked EC showing the same Display percentage as the UI.
Change-Id: Ia8547915251ea80bc663b5f15435060acacf9021
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335887
Reviewed-by: Jett Rink <jettrink@chromium.org>
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It doesn't require the powerd's full factory to be 100%. Also refine the
comment on the powerd's equation to make it more understandable.
BRANCH=None
BUG=b:162604872
TEST=With the follower CL which updates the powerd's full factor value,
checked EC showing the same Display percentage as the UI.
Change-Id: I50ae7c38c423722188d892f91f4fc93d4d5f84e1
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335886
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=b:162369240
BRANCH=none
TEST=make -j run-usb_tcpmv2_tcpci
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I61a9f99a10c3432135a91699ac04ff65690388e7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335455
Commit-Queue: Jett Rink <jettrink@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The value of lfcc variable, which is copied from
host_get_memmap(EC_MEMMAP_BATT_LFCC), is actually the compensated full
capacity. Use the value of *full directly.
BRANCH=None
BUG=b:162604872
TEST=Checked the battery console command result.
Change-Id: Iae103dd325679333c524698ce7a86cdc96a3587e
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335885
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Simplify the logic by using pointers, instead of copying the values from
and to other variables. No behavior changes.
BRANCH=None
BUG=b:162604872
TEST=Checked the sysfs battery info.
Change-Id: I2dafd0c774354bbf563be121a8bf9d65f1d4dfd3
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335884
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Update the Vendor Information File generator so that it complies
with Revision 1.40, Version 1.0 of the spec.
The VIF files are generated when the board is built.
So, make -j BOARD=<board> will create build/<board>/<board>_vif.txt
A VIF can be generated manually after the board is built with
build/<board>/util/genvif -b <board name> -o <out directory>
BUG=b:131087690
BRANCH=none
TEST=manual
Generate VIF for Atlas and checked fields.
Signed-off-by: Sam Hurst <shurst@chromium.org>
Change-Id: Iaa1eaf1f01f9d36ad3afd2818ebe81359b8531f6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1577739
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Sam Hurst <shurst@google.com>
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zork's TCPC does not want to go into CC OPEN/OPEN when
it is powered solely by the power that it will be
cutting off. This should have caused the system to
brown out and reboot but the TCPC keeps enough of the
power connection to not allow a brown out but locks
up the rest of the system from continuing. By disabling
the SNKEN bit in CONTROL_OUT register, this condition
goes away and we will brown out on batteryless cold
reboot as expected.
BUG=b:162016100
BRANCH=none
TEST=ectool reboot_ec cold (without a battery attached)
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Idb9597c978a9ba18f79ff158db6463af156707b5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2333120
Tested-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
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BUG=b:162805450
BRANCH=none
TEST=not yet
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: Ie1525b8a0f67a4700649163b536d09bef9a9671a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335518
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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Enable control of MT6360_LDO3 and MT6360_LDO5 from AP through host
commands.
BUG=b:149274957
TEST=make buildall
TEST=boot asurada from SD card with chromium:2234683
BRANCH=none
Change-Id: I23bcefd64b41c36dd62f172a54f56d98243ebb04
Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2100327
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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BUG=b:149274957
TEST=build
BRANCH=none
Change-Id: I557d189ab8389f539aa967be3aaea32dd604a784
Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2247432
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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Base detach/attach and tablet mode on/off should wake Krane.
BUG=b:162593812,b:128800600
BRANCH=kukui
TEST=make buildall
TEST=make -k BOARD=kukui
TEST=test_that -b kukui $IP power_WakeSources
Change-Id: I71e3e109e2bee5792f52ce61e2d7e9398394d7ea
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336373
Commit-Queue: Fei Shao <fshao@chromium.org>
Tested-by: Fei Shao <fshao@chromium.org>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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This change prepares to separate the sleep failure detection out of
intel_x86, such that other chipset power sequence can reuse the code.
It only touches the naming. No logic changes.
* Rename to CONFIG_POWER_SLEEP_FAILURE_DETECTION
* Modify the function and variable names, to avoid S0ix
* Modify the comment to more neutral
BRANCH=None
BUG=b:162083524
TEST=make buildall -j
Change-Id: I6a61c3b0a63af60913ee89e0ca343085fbd22308
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321872
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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Store offsets using sensor axis, not the device axis.
Therefore apply rot_standard_ref to the offset vector before
get and rot_standard_ref^-1 before set.
BUG=b:160842447
TEST=check the offset follow device axis
BRANCH=none
Signed-off-by: Jian-Jia Su <jjsu@chromium.org>
Change-Id: I3a4f5caabd9fdfdc3825cccc622a854a3521bed4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325525
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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The board/AP can handle power sequencing without EC intervention. This
support was already disabled by default in configuration.
BUG=b:143375057
TEST=make buildall
BRANCH=none
Signed-off-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com>
Change-Id: Iad0e2041248960e98bf4b8de4e8324850b7bd7f1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334431
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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From the schematics, the GPIOE5 is connected to CCD_MODE_ODL.
Adds this setting for reading the CCD_MODE_ODL through the gpioget
BUG=b:155034814
BRANCH=None
TEST=gpioget CCD_MODE_ODL
Change-Id: I1fdc8a3a7508adc37fc544e1d2981f7ce7d827f7
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335097
Reviewed-by: Keith Short <keithshort@chromium.org>
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Sync the codes/configuration from terrador as todor replaces terrador
p1.
BUG=b:162196573
BRANCH=master
TEST=make BOARD=todor success.
Signed-off-by: YH Lin <yueherngl@chromium.org>
Change-Id: I9f96c56fcc6a66067ad7c66da6cd60d8ccdde40c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336180
Reviewed-by: caveh jalali <caveh@chromium.org>
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From the schematics, the GPIOE5 is connected to CCD_MODE_ODL.
Adds this setting for reading the CCD_MODE_ODL through the gpioget
BUG=b:161762948
BRANCH=None
TEST=gpioget CCD_MODE_ODL
Change-Id: I3abfb97d031b8423d09948e6a6a2c9f75c388be7
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335096
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Config lid and base rotation matrix.
BUG=b:162376060
BRANCH=master
TEST=manual
Using ectool command "ectool motionsense lid_angle"
and check angle from 0 to 360 degree.
Signed-off-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com>
Change-Id: I40c320a6cbbb1d7163734ab9ef64a3bda3b4178f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325498
Reviewed-by: Keith Short <keithshort@chromium.org>
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Change GPIOF1 and GPIOE4 to OUTPUT HIGH.
Follow Trogdor reference board.
BUG=b:162395077
BRANCH=none
TEST=execute gpioget command to get value.
Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com>
Change-Id: I254857214a6e2e958067d4460312a1ce99c8e23d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2328624
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
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This patch include:
1. Set different fan curve table by fan id and lid angle.
2. Add CPU temperature average and trigger debounce
to avoid fan spin peak.
BUG=b:162325433, b:147312313
BRANCH=none
TEST=verify fan follow fan curve
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I8c5ce458f3184aa45dbcecc5c05a419b0ce33f91
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2328564
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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This patch rename thermal sensor name by placement for morphius,
and move board_get_temp from baseboard to variant
BUG=b:162325433
BRANCH=none
TEST=verify that thermal sensor name change in EC console
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I46dfe5c8ebef29ed6ee7fdf342cfad9d39fe6ca3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325496
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Respect led_auto_control_is_enabled when setting the LED side select
PWM.
BUG=b:162397149
TEST=ectool led power blue; ectool pwmsetduty 3 65535
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Ib31111fdc4c5b56edabf01a80a6553e457741e79
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2333235
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Asurada supports only one display out at a time. It has to
switch the aux path by first-come-first-serve policy. If a display
is connected to the either port, we should not output to another display
which connects later.
BUG=b:154565980, b:157858237
TEST=see display out on C0 and C1.
BRANCH=none
Change-Id: I6b818572aef6c5fa41e8c9ba3c62cbf0319aee7c
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2289473
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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1. Update gpio setting base on lindar’s schematics,
2. Remove sensor's gpio and code (not support)
3. Remove volume button's gpio,because lindar doesn't support
4. Add lightbar port information into I2C port map configuration
BUG=b:161089195
BRANCH=none
TEST=make -j BOARD=lindar
Signed-off-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com>
Change-Id: Id82512e765d66905b1605bb059942eb31ccb4311
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325497
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Add new battery information in board/batter.c
BUG=b:161955775
BRANCH=none
TEST=none
Signed-off-by: Ko_Ko <Ko_Ko@compal.corp-partner.google.com>
Change-Id: I0be10a12316859402c58572da969b60f5f143174
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2315955
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Ko Ko <ko_ko@compal.corp-partner.google.com>
Tested-by: Ko Ko <ko_ko@compal.corp-partner.google.com>
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BUG=none
BRANCH=none
TEST=Set FW_CONFIG to 0x0100 and make sure "ectool inventory"
had keyboard backlight present.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I7e0fd3ee42d5829dd6c81427c6ecbb359a5c385c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2331977
Reviewed-by: Diana Z <dzigterman@chromium.org>
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