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* driver: Add support for Spoof mode to all remaining accelerometersstabilize-15393.48.B-mainrelease-R113-15393.B-mainGwendal Grignou2023-03-238-4/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Spoof mode was added for few accelerometers (BMI160/260). Use accelgyro_bmi_common as model and use it for all accelerometer. BUG=b:263221955 BRANCH=many TEST=In zephyr/program/nissa/program.conf, add CONFIG_PLATFORM_EC_ACCEL_SPOOF_MODE=y - Open the device at 90 degree check the sensors values: ectool motionsense: Motion sensing active Sensor 0: -592 15872 944 (raised, lid) Sensor 1: 803 -929 8134 (flat, base) Sensor 2: 0 0 0 - Spoof in place, in clamshell mode. ectool motionsense spoof -- 0 1 ectool motionsense spoof -- 1 1 - Spoof lid to be upside down: ectool motionsense spoof -- 0 1 -592 -15872 944 - Observe the screen goes in tablet mode. - Spoof lid accel back: ectool motionsense spoof -- 0 1 -592 15872 944 - Observe the screen goes in laptop mode. TEST=make buildall passes. Change-Id: Idd4632637226f9ae57416a8afe0c137780898d16 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4358607 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* docs/core_runtime.md: Fix typosTom Hughes2023-03-231-12/+12
| | | | | | | | | | | BRANCH=none BUG=none TEST=view in gitiles Change-Id: Id34677a59df66603f95fa4c6ba20c2ec8989d770 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4356022 Reviewed-by: Eric Yilun Lin <yllin@google.com>
* zephyr: ppc: Add support for multiple altnernatesKeith Short2023-03-228-3/+201
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for multiple PPC altnernate on each USB-C port. PPC chips that are candidates for runtime selection must add the "is-alt" property to the PPC definition. ppc_port0_alt: sn5s330@40 { compatible = "ti,sn5s330"; status = "okay"; reg = <0x40>; is-alt; }; The board specific code then calls PPC_ENABLE_ALTERNATE_BY_NODELABEL, specifying both the USB-C port to update, and the nodelabel of the new PPC device. PPC_ENABLE_ALTERNATE_BY_NODELABEL(0, ppc_nx20p348x_alt); BUG=b:274126703 BRANCH=none TEST=./twister -s drivers/drivers.usbc_ppc Change-Id: I8fff03beac8dbb98fea5b574e2ad456721cefe98 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4354880 Tested-by: Madhu 🌱 <mparuchuri@google.com> Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* util/flash_ec: Fix incorrect bitbang_rate definitionJakub Czapiga2023-03-221-1/+1
| | | | | | | | | | | | | | | | Excessive space in the definition of bitbang_rate caused this option's second line of its help string to be used as short opt. This made help output incorrect and potentially could introduce incorrect flags parsing behavior. BUG=None TEST=./util/flash_ec --help # displays correctly now BRANCH=None Change-Id: I4c9645339d84fdaec19c0cc33358883c8fddf4be Signed-off-by: Jakub Czapiga <czapiga@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4355420 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* common: notify host via mkbp switch when body on/offRuihai Zhou2023-03-224-0/+17
| | | | | | | | | | | | | | | | | | | | Add PLATFORM_EC_BODY_DETECTION_NOTIFY_MKBP to notify the host via EC_MKBP_FRONT_PROXIMITY when the body status on/off. BRANCH=corsola BUG=b:272655176 TEST=check ec log: 23-03-22 11:09:17.498 [333.643400 body detect mode enabled] 23-03-22 11:09:18.911 [333.644300 mkbp switches: 9] ... 23-03-22 11:09:21.690 [349.965200 body detect mode disabled] 23-03-22 11:09:35.269 [349.966100 mkbp switches: 1] Change-Id: If7161c8fd2365f2eb70ae158cea423382b782cad Signed-off-by: Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4344831 Reviewed-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com>
* Whiterun: modify motionsense rotate mappingjohnwc_yeh2023-03-222-1/+6
| | | | | | | | | | | | | | | | modify base rot ref rotate mapping for BMI323 LOW_COVERAGE_REASON=no unit tests for skyrim yet, b/247151116 BUG=b:274051075 BRANCH=none TEST=Rotate DUT, the XYZ data is correct. Run CTS: AccelerometerMeasurementTestActivity pass. Change-Id: Ib273388141e873691b37d0c03cf60296ad5920da Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4357160 Reviewed-by: Isaac Lee <isaaclee@google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
* constitution: modify GPIO configurationDavid Huang2023-03-223-22/+42
| | | | | | | | | | | | | | Modify GPIO configuration for constitution. BUG=b:267539938 BRANCH=None TEST=make BOARD=constitution Change-Id: Ie13a55d863f8279aac696f13b189e107c42410f4 Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4286391 Reviewed-by: Pablo Ceballos <pceballos@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org>
* constitution: modify usb functionDavid Huang2023-03-225-155/+37
| | | | | | | | | | | | | | | | Modify usb related function. BUG=b:267539938 BRANCH=None TEST=make BOARD=constitution Change-Id: I92d672a8b4a5cbf04ae193de6eb5f84f051fc303 Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4286390 Reviewed-by: Pablo Ceballos <pceballos@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Matthew Ziegelbaum <ziegs@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com>
* constitution: add pse functionDavid Huang2023-03-224-0/+35
| | | | | | | | | | | | | | Add pse function BUG=b:267539938 BRANCH=None TEST=make BOARD=constitution Change-Id: Iec7434ed25c860823461a19ce24f140f3757342d Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4286389 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com>
* geralt: update register function for new_variant.pyKnox Chiou2023-03-221-2/+2
| | | | | | | | | | | | | Update register function to aligned with new_vairant zephyr format. BUG=b:270638214 BRANCH=None TEST=new_variant_fulltest.py geralt && echo PASS Signed-off-by: Knox Chiou <knoxchiou@chromium.org> Change-Id: I2080f4cdbef3b30b1d11dc9eea402d7476980423 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4359351 Reviewed-by: Eric Yilun Lin <yllin@google.com>
* uldren: Remove keyboard backlight gpioLeila Lin2023-03-224-17/+5
| | | | | | | | | | | | | | | Not support keyboard backlight, remove the gpio. BUG=b:271513530 BRANCH=None TEST=zmake build uldren success Change-Id: Iaaac920bbbe436353aa9c15ce0dc269a8ef2813e Signed-off-by: Leila Lin <leilacy_lin@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4354974 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Tested-by: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com> Commit-Queue: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com>
* uldren: Move USB_A0_ILIMIT_SDP gpio to gpio33Leila Lin2023-03-222-2/+2
| | | | | | | | | | | | | | | | Base on design, move USB_A0_ILIMIT_SDP from gpio85 to gpio33. BUG=b:271513530 BRANCH=None TEST=zmake build uldren success Change-Id: I254826de0e0e28499a5a016985588d7f03f98224 Signed-off-by: Leila Lin <leilacy_lin@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4354976 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Tested-by: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com> Commit-Queue: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com>
* uldren: Move unused gpio to unused pinsLeila Lin2023-03-221-0/+1
| | | | | | | | | | | | | | | | Base on HW design, move gpio81 to unused pin. BUG=b:271513530 BRANCH=None TEST=zmake build uldren success Change-Id: If33899c16e37ce436b8aaa416c22c901fc9ec202 Signed-off-by: Leila Lin <leilacy_lin@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4354975 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Tested-by: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com>
* uldren: Remove hdmi gpioLeila Lin2023-03-222-6/+2
| | | | | | | | | | | | | | | | Not support hdmi, remove the gpio. BUG=b:271513530 BRANCH=None TEST=zmake build uldren success Change-Id: I1dd1b092dc4dbb37f3cea304cf887a5b2886060a Signed-off-by: Leila Lin <leilacy_lin@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4354973 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Tested-by: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com>
* uldren: Initial Zephyr EC imagemick_hsiao2023-03-2218-1/+1746
| | | | | | | | | | | | | | | | | Create the initial Zephyr EC image for the uldren variant based on the nereid reference board. (Auto-Generated by create_zephyr_ec_image.sh version 1.0.0) BUG=b:271513530 BRANCH=None TEST=PASS Change-Id: I46de308cbed951f6637079dff7696ffe9806b6d7 Signed-off-by: mick_hsiao <mick_hsiao@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4340169 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* cq: report coverage for both Nissa referencesPeter Marheine2023-03-221-1/+3
| | | | | | | | | | | | | | | Nereid and Nivviks as the two reference boards share some common Nissa code, but use largely disjoint sets of drivers so it's useful to report code coverage for both. BUG=None TEST=firmware_builder.py --code-coverage BRANCH=none Change-Id: Idd053bf916c7b94f9d37ce5385198497a668bcc9 Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4357701 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* common: Add a shared mem implementation using malloc/freeTom Hughes2023-03-222-1/+65
| | | | | | | | | | | BRANCH=none BUG=b:234181908 TEST=none Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: Ie27af4272982609521e77a004d7a0a30257212ad Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4081572 Reviewed-by: Andrea Grandi <agrandi@google.com>
* ec: Exclude a memmapped driver from board coverageJeremy Bettis2023-03-212-17/+2
| | | | | | | | | | | | | | | | | | | The file driver/tcpm/it8xxx2.c is not currently testable using our current mocking techniques, so exclude it from board specific coverage until we learn how to do so. BRANCH=None BUG=None TEST=None Change-Id: Ie09479a747a0dc4940a047638ed38e2da942437d Signed-off-by: Jeremy Bettis <jbettis@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4358753 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Auto-Submit: Jeremy Bettis <jbettis@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* Host sleep: Consider a reboot after suspend to be a resumeDiana Z2023-03-212-0/+98
| | | | | | | | | | | | | | | | | | | | When we try to wake the host during a failed resume, the host may reboot rather than actually following the resume path. In this case, we will receive events of "0" indicating we're on a fresh boot and the chipset RESUME hooks never run. Instead, we should treat this new boot as a resume in order to ensure the previous SUSPEND hooks get a RESUME call to go with them. BRANCH=None BUG=b:273327518 TEST=on whiterun, run suspend with bad AP FW version and ensure the backlight turns on after we wake the host Change-Id: I9c8e7ad70dbca5245844a31772e99097256e592f Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4344029 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* util/check_clang_format: Format C++ filesTom Hughes2023-03-211-4/+8
| | | | | | | | | | | BRANCH=none BUG=b:236386294 TEST=./util/check_clang_format.py Change-Id: Ie0cafe0db519bbaca700917435a8b0e93a6e2678 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4356906 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* zephyr: ppc: Cleanup PPC chip macroKeith Short2023-03-216-22/+25
| | | | | | | | | | | | | | | Move the separator from each individual PPC chip macro. This allows the same macro to be used outside an array definition. BUG=b:274126703 BRANCH=none TEST=zmake compare-builds Change-Id: I62307c5ba6c58f45566e2d65be491e56e9517fd9 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4354879 Tested-by: Madhu 🌱 <mparuchuri@google.com> Reviewed-by: Al Semjonovs <asemjonovs@google.com>
* emul_tcpci: Fix compile errorsKeith Short2023-03-211-2/+4
| | | | | | | | | | | | | | Fix compile errors when using the -save-temps option. BUG=none BRANCH=none TEST=./twister Change-Id: I0333a15d87463c46b1475a9b4312426ccc24c160 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4354878 Reviewed-by: Tristan Honscheid <honscheid@google.com> Tested-by: Madhu 🌱 <mparuchuri@google.com>
* zmake: add verification that there are no duplicate GPIOsKeith Short2023-03-212-0/+111
| | | | | | | | | | | | | | | | Add a check that the final "named-gpios" node does not contain any duplicate GPIO entries. BUG=b:271135255 BRANCH=none TEST=Build skyrim before and after CL:4297652. Verify error reported when the duplicate GPIO is present and passes after duplicate entry removed. Change-Id: Ib89611f1c693456b9313b5df612dd783158806ce Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4307436 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* crystaldrift: add new battery configurationTang Qijun2023-03-214-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add battery gfl NB0280-549358 parameters for crystaldrift board. BRANCH=none BUG=b:274211459 TEST=1).~$ battery Status: 0x00e3 FULL DCHG INIT Param flags: 00000002 Temp: 0x0bac = 298.8 K (25.7 C) V: 0x337f = 13183 mV V-desired: 0x0000 = 0 mV I: 0x0000 = 0 mA I-desired: 0x0000 = 0 mA Charging: Not Allowed Charge: 100 % Display: 100.0 % Manuf: GFL Device: NB0280-549358 Chem: LION Serial: 0x0374 V-design: 0x2d1e = 11550 mV Mode: 0x6001 Abs charge: 108 % Remaining: 4996 mAh Cap-full: 4996 mAh Design: 4656 mAh Charge Cycle: 1 Time-full: 0h:0 Empty: 0h:0 Full Factor: 0.97 Shutdown SoC: 4 % C-FET: -1 2)Battery cutoff is working as expected Change-Id: I44be3254b9bedeec9f42d15db45f5f9e9eb00a04 Signed-off-by: Tang Qijun <qijun.tang@ecs.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4354816 Commit-Queue: Chao Gui <chaogui@google.com> Reviewed-by: Chao Gui <chaogui@google.com> Reviewed-by: Robert Zieba <robertzieba@google.com>
* docs/core_runtime.md: Add links to deferred function examplesTom Hughes2023-03-211-0/+4
| | | | | | | | | | | BRANCH=none BUG=none TEST=view in gitiles Change-Id: I579b74b63531b33d96fab4607c4b56b646bdde5a Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4356020 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* geralt: implement base state detectionTing Shen2023-03-211-5/+96
| | | | | | | | | | | | | | BUG=b:272439221 TEST=`ectool mkbpget switches` verify the base switch reflects the actual hardware status BRANCH=none Change-Id: Ic2f968766b0119c2f89e0d191ec8d7d58d25ace8 Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4351433 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* geralt: disable tcpc_dump commandTing Shen2023-03-211-0/+1
| | | | | | | | | | | | | | | | No need for internal TCPC. BUG=none TEST=zmake, saved ~1k bytes (279024->278016) BRANCH=none Change-Id: Id10dee61f7511acd6276eb2643292332e6fba8d3 Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4345090 Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Ting Shen <phoenixshen@chromium.org> Auto-Submit: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com>
* twister: Move `suite` and `builder_name` to tagsAllen Xie2023-03-212-5/+3
| | | | | | | | | | | | Context: https://crrev.com/c/4349593 Bug: b:274025225 Test: Unit test Change-Id: Ie0eb5f504f063c7f8595e826a8e2f44b562f0ecb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4349672 Tested-by: Zhihui Xie <zhihuixie@google.com> Reviewed-by: Al Semjonovs <asemjonovs@google.com> Commit-Queue: Zhihui Xie <zhihuixie@google.com>
* zombie: Add battery 30w configurationYunlong Jia2023-03-214-1/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct battery parameters for zombie board. BRANCH=none BUG=b:271946491 TEST=1). ~$ battery Status: 0x0080 INIT Param flags: 00000003 Temp: 0x0b9d = 297.3 K (24.2 C) V: 0x203f = 8255 mV V-desired: 0x21fc = 8700 mV I: 0x0113 = 275 mA(CHG) I-desired: 0x0802 = 2050 mA Charging: Allowed Charge: 92 % Display: 94.3 % Manuf: POW-TECH Device: SG20QT1C Chem: LION Serial: 0x03a4 V-design: 0x1db0 = 7600 mV Mode: 0x6001 Abs charge: 93 % Remaining: 3798 mAh Cap-full: 4141 mAh Design: 4100 mAh Charge Cycle: 17 Time-full: 1h:24 Empty: 0h:0 Full Factor: 0.97 Shutdown SoC: 4 % C-FET: 1 2).Battery cutoff is working as expected Change-Id: I3c9ddc12734487209e1b5d49d03a7a39df80c8f0 Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4352187 Commit-Queue: Bob Moragues <moragues@chromium.org> Reviewed-by: Bob Moragues <moragues@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* third_party: Add option to build and link googletestTom Hughes2023-03-213-0/+46
| | | | | | | | | | | | | | | When CONFIG_GOOGLETEST is enabled, the googletest library will be built and linked into the test images. BRANCH=none BUG=b:254530679 TEST=make BOARD=bloonchipper test-fpsensor_hw -j Cq-Depend: chrome-internal:5548068 Change-Id: I969599ed441415fd809b08396aefcfa92275fbcd Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4348152 Reviewed-by: Andrea Grandi <agrandi@google.com>
* zephyr: ppc: cleanup yaml includesKeith Short2023-03-215-6/+4
| | | | | | | | | | | | | | Not all PPC chips are based on I2C, so move the i2c-device.yaml include into each PPC chip that requires it.` BUG=b:274126703 BRANCH=none TEST=zmake compare-builds -a Change-Id: Ic02446bec3dec3938348d589f7e8a249c75666c7 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4354877 Reviewed-by: Aaron Massey <aaronmassey@google.com>
* cq: Also build host utils in buildallJeremy Bettis2023-03-211-0/+1
| | | | | | | | | | | | | | | | | | There was a recent breakage that escaped the CQ. crrev/c/4338476. Build the host utils also when doing a buildall_only. (Also things that depend on it like make buildall). BRANCH=None BUG=None TEST=Ran make, and also dry in cq Change-Id: I31305111259f7cf5041af5318e3321282c0ab397 Signed-off-by: Jeremy Bettis <jbettis@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4350989 Tested-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
* Skyrim: enable cbi wpmick_hsiao2023-03-201-0/+1
| | | | | | | | | | | | | | | Change CONFIG_PLATFORM_EC_EEPROM_CBI_WP=y BUG=b:273863891 BRANCH=none TEST=ec firmware local build pass the firmware_ECCbiEeprom test Change-Id: I26577df99f16e499c12a2a00018473de665928e8 Signed-off-by: mick_hsiao <mick_hsiao@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4352188 Commit-Queue: Chao Gui <chaogui@google.com> Reviewed-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* gitlab: gather coverage data for nereidPeter Marheine2023-03-201-0/+5
| | | | | | | | | | | | | | Nereid uses a different set of drivers from Nivviks, so it's useful to get coverage for both of these Nissa reference boards. BUG=b:256047664 TEST=gitlab-runner exec docker nereid_coverage BRANCH=none Change-Id: I6d2e156956ba7daabec3e23169e038d3457c0235 Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4349463 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* ec: Add missing #includesJeremy Bettis2023-03-204-0/+7
| | | | | | | | | | | | | | | | | | | There were several headers broken by sorting includes, because they didn't include what they use. Add missing #includes to fix build. BRANCH=None BUG=None TEST=cq Change-Id: I1b7c6d8fc62ace8cb2cbb12df83c0edf81c7dfde Signed-off-by: Jeremy Bettis <jbettis@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4350990 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
* npcx9: Move RW region so we can write protect RO regionCaveh Jalali2023-03-201-4/+9
| | | | | | | | | | | | | | | | | | | | The npcx9 internal flash write protect scheme is very limited. The smallest protectable region is half of the entire flash device, so allocate RO and RW regions to match the hardware. Note: The EC image in the BIOS must match this new region allocation. The only way to do this is to manually update the BIOS and EC. When the BIOS triggers a software sync with mismatched region configurations, the system will endlessly try to software sync. BRANCH=none BUG=b:260815079 TEST=FAFT firmware_ECCbiEeprom passes Change-Id: Id5b9b2bc8d7858f3cb90ef39300ef1f654a080e6 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4334209 Reviewed-by: Keith Short <keithshort@chromium.org>
* frostflow: modify the fan tablematt_wang2023-03-201-4/+4
| | | | | | | | | | | | | | | | | follow the Thermal member's request to modify the fan table BUG=b:257149501 BRANCH=none TEST=Thermal team test PASS Change-Id: I813bcabfc66fee97e98581804cfd9cdf54ec74eb Signed-off-by: matt_wang <matt_wang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4349522 Tested-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Chao Gui <chaogui@google.com>
* rex: Fix EC_WP_L GPIO polarityCaveh Jalali2023-03-201-0/+3
| | | | | | | | | | | | | | | | The auto-generated generated.dtsi got the EC_WP_L pin polarity wrong. Add an override to fix the polarity. BRANCH=none BUG=b:260815079 TEST=FAFT firmware_ECCbiEeprom passes (with next patch) Change-Id: I866669d534495d815db70bea95728d8358f9f555 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4334208 Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com> Reviewed-by: Madhu 🌱 <mparuchuri@google.com> Commit-Queue: Fabio Baltieri <fabiobaltieri@google.com>
* mt8186: fix sysjump and hibernate actionsEric Yilun Lin2023-03-201-9/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. fix sysjump will boot the system with AP IDLE 1. fix boot with AP OFF 2. fix boot from hibernate The recent change which make the system staying at S5 for 10 seconds when AP power off. When sysjump requested, the RW part will automatically boot the system from S5 due to the initial in_exiting_off flag defaults to true. Since the exiting_off status is controlled by the power_chipset_init, we don't need the flag defaults to true on boot. Also, change the initial power state S5 to G3. They are the same in rail-wise on mt8186, but not in mt8188. Assign it as G3 to match mt8188 initial GPIO and rail states. When the AC on under hiberante, or the EC boots with AP OFF flag, this ensures the system stay at G3. BUG=b:274051287 b:274063396 b:274368558 TEST=pass firmware_ECPowerButton TEST=pass firmware_ECWakeFromULP TEST=dut-control cold_reset:on sleep:1 cold_reset:off, boot to S0 TEST=dut-control power_state:rec; dut-control power_key:tab. stay at S5->G3 TEST=hibernate, and AC on. The EC stays at G3. BRANCH=none Change-Id: I253f4956665a6a0edc2fe59c5a8a90a7c07a6180 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4349381 Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* Geralt: Enable CONFIG_IT83XX_TUNE_CC_PHYmike2023-03-204-1/+14
| | | | | | | | | | | | | | | Enable cc tune function to pass cc eye test BUG=b:270906647 BRANCH=none TEST=test geralt proto board C0 & C1 port cc eye test pass. Change-Id: Ie35517ba3e1fac95cd193eed64241972824c64da Signed-off-by: mike <mike5@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4339656 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Ganxiang Wang <wangganxiang@huaqin.corp-partner.google.com>
* corsola: set GPIO_LID_OPEN as GPIO_INPUT_PULL_UPSiyu Qin2023-03-203-2/+3
| | | | | | | | | | | | | | | | | | | | The lid sensor is on daughter board, if daughter board is disconnected, the EC will detect the floating pin as low, then the lid state is locked as lid close. The DUT cannot power on by power button. So set the pin as GPIO_INPUT_PULL_UP. BUG=b:273422759 BRANCH=corsola TEST=1. disconnect daughter board, 'lidstate' shows 'lid open', and the DUT can power on by power button. 2. connect daughter board, DUT can power on by lid open. 3. ./twister -T zephyr/test/krabby/ Change-Id: I2766d4a3a245efc28621d8a0292390c64721aae4 Signed-off-by: Siyu Qin <qinsiyu@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4344441 Reviewed-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* nissa: add wrapper function for new_variant.pyShou-Chieh Hsu2023-03-201-0/+20
| | | | | | | | | | | | | | BUG=b:271513530 BRANCH=None TEST=run new_variant.py Change-Id: I3103d5475968f576246c83e642ff649e1032f9c3 Signed-off-by: Shou-Chieh Hsu <shouchieh@googlecom> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4349680 Commit-Queue: Shou-Chieh Hsu <shouchieh@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Tested-by: Shou-Chieh Hsu <shouchieh@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* common: Move pse driver into driver placeDavid Huang2023-03-207-0/+289
| | | | | | | | | | | | | | Since there are more projects using this driver. Move it into driver place. BUG=b:273191751 BRANCH=None TEST=make buildall -j Change-Id: I50e2cb480a551ce19722edc2b6f70824f4b9147e Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4335461 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* lantis: Override PS8805 device id for A3 chipTommy Chung2023-03-201-0/+1
| | | | | | | | | | | | | BUG=b:273637804 BRANCH=none TEST=make sure "ectool pdchipinfo 1" can get device_id 0x2 for PS8805 A3 chip. Change-Id: I359da650b43d416449a2d4a528943c854edc5264 Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4340871 Reviewed-by: Devin Lu <devin.lu@quantatw.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* lantis: Enable 2nd TCPC source PS8805 for port 1Tommy Chung2023-03-202-1/+19
| | | | | | | | | | | | | | | Used the SSFC bits to judge which source driver needs to be loaded. BUG=b:273637804 BRANCH=none TEST=verifying DUT with PS8705 or PS8805 in th daughter-board can charging and displaying, and verifying multiple Docks also works. Change-Id: I3f924f17145cf68e2eef863c47b1a46228c1c2cd Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4340870 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Devin Lu <devin.lu@quantatw.com>
* lantis: Add SSFC bitmap for TCPC sourcesTommy Chung2023-03-202-1/+22
| | | | | | | | | | | | | | Adds SSFC bitmap to support additional TCPC sources. BUG=b:273637804 BRANCH=none TEST=make BOARD=lantis Change-Id: I61f70588e292558e7f41641574a1d2089dcd83bf Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4340869 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Devin Lu <devin.lu@quantatw.com>
* util: Use libec for EC_VER_FLASH_PROTECTFiras Sammoura2023-03-191-56/+37
| | | | | | | | | | | | | | | | | | This is a reland of https://crrev.com/c/4261963 now that the formatting was fixed in https://crrev.com/c/4335705. BRANCH=none BUG=b:116396469 TEST=rm -rf build && make BOARD=host utils TEST=tast run localhost:2200 firmware.Fp{AddEntropy,BioWash, CheckWriteProtect,RDP0,ROOnlyBootsValidRW,RWNoUpdateRO, ReadFlash,RebootToRO,SoftwareWriteProtect} TEST=TEST=test_that --board hatch <IP> suite:fingerprint Change-Id: I8bede5aa8431686e505153fd96a0b9065f37a213 Signed-off-by: Firas Sammoura <fsammoura@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4344032 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* TCPMv2: Check PRL flag names array sizeAbe Levkoy2023-03-171-0/+5
| | | | | | | | | | | | | | | Check at build time that the list of PRL flag names is as long as the list of flags. BUG=none TEST=make buildall BRANCH=none LOW_COVERAGE_REASON=native_posix doesn't model state transition timing Change-Id: I0f4a577bea3094329e31afec0a050c26f32c1f2c Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4211271 Reviewed-by: Keith Short <keithshort@chromium.org>
* chip/stm32: Interface extensions for serial flashJes B. Klinke2023-03-173-20/+122
| | | | | | | | | | | | | | | Enhance the interface to board-specific SPI driver such that it can take flags for advanced serial flash chip protocols (dual/quad lanes, dummy cycles, double transfer rate). BUG=b:273601311 TEST=c2d2 can still flash (using single-lane) Change-Id: Iee6a17077ea8c382c7d59bd404bf5d033bd9b517 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4336273 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Jes Klinke <jbk@chromium.org> Tested-by: Jes Klinke <jbk@chromium.org>
* TCPMv2: Ignore data role mismatch during DRSAbe Levkoy2023-03-174-2/+37
| | | | | | | | | | | | | | | | After a successful Data Role Swap message sequence, the PE and TC take one more task loop cycle to update the canonical data role. During this interval, do not check the data role of incoming messages. BUG=b:262345042 TEST=Maintain connection with monitor despite message ~2 ms after DRS BRANCH=none LOW_COVERAGE_REASON=native_posix doesn't model state transition timing Change-Id: I4e3e12d52e1817b583f2f774318231ee18e99b07 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4121103 Reviewed-by: Keith Short <keithshort@chromium.org>
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