| Commit message (Collapse) | Author | Age | Files | Lines |
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No point in saying "edit the file if it doesn't work", when we could just
provide a slow version instead.
BUG=none
TEST=none
Change-Id: I94731495635e4dc6d0aa6e3f577cb727af92894a
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
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See issue tracker for more information.
BUG=chrome-os-partner:8493
TEST=compile okay
Change-Id: I910aebec7d2a505a02b1bbd5d985a540b94be5c2
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Comapre the range to be write (erase) with the range of active image.
If overlap, return error to indicate the access denied.
Note that we actually protect only runtime code and ro data.
FMAP is intentional unprotected so that flashrom can update to new map
before jumping. Since the vector table and init code are in the same
erase page, they are unprotected as well.
BUG=chrome-os-partner:7478
TEST=
Change-Id: Icb5cc89836432a11cef80e18eb66bb39a6c9b1d9
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Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8613
TEST=sysjump A, then sysjump RO
Change-Id: Id9b3c867fa01893542812373f4469534b4be9918
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BUG=chrome-os-partner:7839
TEST=none
Signed-off-by: Bill Richardson <wfrichar@google.com>
Only tested on BDS at the moment, because that's all I have.
Change-Id: I30c7202856a272953bf7170c6786999378984329
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Now that we can jump directly to other images, we don't need this.
We jump to image A by default, unless the recovery button or signal is asserted.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8562
TEST=manual
Reboot -> runs image A
Reboot with reload (F3) held down -> runs RO
Reboot with 'dut-control goog_rec_mode:on' -> runs RO
Change-Id: I8259fe0d738ce0ca897d2f4427d8cf61858b8901
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The final piece links the keyboard press and x86_power module.
BUG=chrome-os-partner:8523
TEST=on the link board.
wait for 15 minutes to make host suspend. touch any key to wake up host.
Change-Id: Ie6ae840ae546731daea48ab457fdc056feb5a685
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This is necessary at init-time for verified boot to jump from RO to
one of the RW images.
It's also used by factory EC update to update one image and then jump
to the updated image to finish the update. In this case, the x86 does
NOT reboot.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8449
TEST=manual
1) power on x86 and log in
2) sysjump a --> system is in a; x86 has not rebooted
3) sysjump ro --> system is back in RO; x86 has not rebooted
4) reboot -> system is in RO; x86 HAS rebooted
Change-Id: I9dbadcf9775e146a0718abfd4ee0758b65350a87
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Power adapter LED:
GREEN = charge done
YELLOW = charging
RED = error
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:8536
TEST=manual
Change-Id: I5580763a4136e1de7f5eae4e3dda8e169309d902
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We moved a while ago to a table of ADC channels, so having a
meaningless constant defined in board.h is more harmful than helpful.
BUG=none
TEST=build link, bds
Change-Id: I651a609c9ed13f879bb943c90731275407d77e50
Signed-off-by: Randall Spangler <rspangler@chromium.org>
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The kernel no longer uses port 80 as a delay mechanism, so we don't
need to detect the no-longer-present spammy writes.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7972
TEST=port80 scroll, then boot the system. see a few repeated bytes,
but not piles of 00 and ff's.
Change-Id: Id14dc43ab4e1b15c6bab99a17c062f295a59e7e6
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More modules can be disabled individually through CONFIG_ defines.
Reordered early module pre-init and init, and added comments to
explain why things are ordered in main() the way they are.
Fixed a few assorted init-related bugs along the way, like st32m
keyboard scan double-initializing.
BUG=none
TEST=build link, bds, daisy
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I04a7fa51d743adfab4be4bdddaeef68943b96dec
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This CL adds battery SMI events. And refactors the charging state
machine by adding share state context for all handlers.
Power events are moved to common handler. Minor clean up on console
output messages.
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:7526,7937,8450
TEST=manual:
Watch console message when connecting/disconnecting AC adapter and
battery. Check the state transition.
Change-Id: I42eec4f87a9d49bd193cb9dde9080e3dfccbb77c
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Board-specific features like lightbar should be config'd at the board
level, not at the chip level.
BUG=none
TEST=build link, bds, daisy
Change-Id: If1df2ca0422f7b8bdc172d0df7bd9f6a1af6a9d2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
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BUG=chrome-os-partner:7498
TEST=powerled {off, red, yellow, green}
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I48beaad94d75c0ec30a969ea4b0e35f54e052085
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Update test python scripts for recent trace modifications :
- lack of firmware B
- updated motd
Update QEMU to deal gracefully with various new registers accesses.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make qemu-tests
Change-Id: I59a53822193b7377fe5f61f75c951b6cd24fc54b
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Allow to build without the power button task.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make qemu-tests
Change-Id: Ibc757a6641f195f0d10e6a673792b996694f8cec
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Group temperature sensors into different types so we only have to set
temperature threshold for each type instead of each sensor.
Signed-off-by: Vic Yang <victoryang@google.com>
BUG=chrome-os-partner:8466
TEST=Fan control still works.
Change-Id: I7acc714c32f282cec490b9e02d402ab91a53becf
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Modify thermal engine to treat temperature threshold as a 3-degree range
instead of a certain value. This way the fan do not keep turning on and
off, while the temperature floating around the threshold value.
Signed-off-by: Vic Yang <victoryang@google.com>
BUG=chrome-os-partner:8466
TEST=Set threshold to current temperature. The fan turns on and does not
immediately turns off.
Change-Id: Iad1de05a409dbbc573a8ffd0ece0dc7961b20806
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This works similar to SCI/SMI events, but triggers a separate
level-sensitive signal to the PCH instead.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8514
TEST=manual
From EC console:
gpioget PCH_WAKEn --> should be 1
hostevent wake 0x1
close lid switch (with magnet)
hostevent -> should show wake mask 0x1, raw events 0x1
gpioget PCH_WAKEn --> should be 0
hostevent clear 0x1
hostevent -> should show raw events 0
gpioget PCH_WAKEn --> should be 1
Change-Id: I29832c1dc30239a98987578f07dfeb25791dde11
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Keyboard reset now triggers a cold reset.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8397
TEST=power system on, then do 'x86reset cold' for a cold reset or
'x86reset warm' for a warm reset. Check x86 debug console to see that
coreboot detects the warm (soft) reset.
Change-Id: I00930d9f5df98365277cd5c7f2eb8f135c4e4398
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The re-scheduling is protected by increasing our priority to -1,
according to ARMv-M architecture manual, we need an ISB after setting
the faultmask register to ensure that the new priority is visible.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:8492
TEST=run on proto-0.5 and see that the temperature sensor and battery
tasks are longer hanging (see the bug for details how to check it)
Change-Id: Ia55859cf5c9101a09c61be7647a920126fc0a3b9
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When updating the lock field of the mutex to acquire it, if the store
exclusive fails, we want to retry immediatly else if the failure has
been triggered by the other user doing the mutex_unlock we might not be
woken up.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:8492
TEST=run on proto-0.5 and see that the temperature sensor and battery
tasks are longer hanging (see the bug for details how to check it)
Change-Id: I0c8a4e997666a7781b3837f0dbbc47ffbc06b6c3
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Remove dummy boot-time output to UART1; no longer needed now that
there's a debug command to do the same thing.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=manual
comxtest - prints default message to x86 UART
comxtext ccc123 - prints 'ccc123' to x86 UART
Change-Id: I37d37aeca06bf71b106f5ad3473a79780fd089a9
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Until we solve the I2C hanging issue, we need a reliable way to read
temperature. Add back LPC temperature read command that actually trigger
a I2C read.
Signed-off-by: Vic Yang <victoryang@google.com>
BUG=chrome-os-partner:8452,chrome-os-partner:8495
TEST=none
Change-Id: Icddd1fe3c1f09889bca633af19041a8aca582de9
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Add debug command 'kbpress' to simulate keystroke.
Signed-off-by: Vic Yang <victoryang@google.com>
BUG=chrome-os-partner:8025
TEST='kbpress 3 7 1' pressed 'r' key.
Change-Id: I80eef1e03f0f383e5472b4a7cc53c43ce6c15041
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Currently temperature polling task sometimes hangs. Until we solve this
problem, fan should not be turned off according to temperature readings.
Signed-off-by: Vic Yang <victoryang@google.com>
BUG=chrome-os-partner:8479
TEST=none
Change-Id: I3892c55dd18d3533515d5537b1a877e4fc36d631
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Make temp sensor report 0xfd when sensor is unpowered.
Also refactor power specification of temp sensors from thermal.c to
temp_sensor.c.
Signed-off-by: Vic Yang <victoryang@google.com>
BUG=chrome-os-partner:8279
TEST=none
Change-Id: Ib13813bdbac2f048fbc3b98fae5bbf104ebf37d7
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To handle outp(0x64, 0xfe) instruction from host.
BUG=chrome-os-partner:8464,chrome-os-partner:8397
TEST= build on bds and l*. tested on proto 0.5.
Change-Id: I8cb3a870b2a5c7a711dc911ba44e154813e9f123
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Make thermal engine trigger SMI on overheating and sensor failure.
Signed-off-by: Vic Yang <victoryang@google.com>
BUG=chrome-os-partner:8249
TEST=none
Change-Id: I1f8c1d05ae69fae4736c4cc92b060b1813007249
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Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=temps - see, prettier!
Change-Id: Ia11937e8b1be384f7b8386c97aea0eb3e2eef897
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Jumping (currently rebooting, see crosbug.com/p/8100) to the RW image should
be done by vboot_init(), not vboot_pre_init().
As currently written, vboot_init() has to come AFTER these function calls:
task_init(); // sets up interrupts so that uart will work
watchdog_init(1100); // in case we fall over somewhere
uart_init(); // we'd REALLY like to see some debugging output
system_init(); // may go away with crosbug.com/p/8100
keyboard_scan_init(); // check for F3 to go to recovery mode
flash_init(); // maybe set RO regions (this should come earlier!)
eeprom_init(); // this is where the try_b flags are kept
BUG=chrome-os-partner:7459
TEST=none
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: I0ec3f6bcc26a308bb1005a944990963853b88b60
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Not compiled into any target; new version of temp_sensor.c is in common/
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=build link and bds
Change-Id: I00232a7cd8a8a9ee6353c5f04c86fcacc83cbd3e
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For debugging PCH reset.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8397
TEST=power system on, then use x86reset to reset it. Should see line state changes printed.
Change-Id: Ief2f09bd0986339812183d0b32dc0208437d1103
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(new method, and x86reset command to call it)
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8460
TEST=manual: powerbtn, wait for system to boot, x86reset
Change-Id: Iad3f5c268b334e8d0ec1adfa2878f9e9d5927b9f
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This simplifies upcoming transitions to/from sleep (with PLL shutdown).
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=manual - make sure 'adc' command and uarts still work
Change-Id: I070ca2d96ba4fef6fef6519896e7e9a181866efc
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