summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
* Support battery cut-off mechanism for factory (R22).release-R22-2723.BLouis Yung-Chieh Lo2012-08-285-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | The cut-off command is manufacturer-specific. Thus the logic is implemented in gas gauge IC code. For those boards using this gas gauge, define the CONFIG_BATTERY_BQ20Z453 in board.h. Cherry-pick to R22 release image, mainly for ectool.c. BUG=chrome-os-partner:12962, BRANCH=snow Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> TEST=Tested on snow ectool batterycutoff ; expect system is off immediately ; if AC power is not connected. Original-Change-Id: Idd290c76439f3263c1c812b236b79623878f73b2 (cherry picked from commit 84babb0520e44ea01100b91abfe0b1bd503fe88e) Change-Id: I626bba25e889269d0216991468676331c3aa726d Reviewed-on: https://gerrit.chromium.org/gerrit/31607 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org> Tested-by: Yung-Chieh Lo <yjlou@chromium.org>
* Add GEC lock mechanism.Louis Yung-Chieh Lo2012-08-2111-4/+782
| | | | | | | | | | | | | | | | | | | | Basically re-use the gec lock code from flashrom package. BUG=chrome-os-partner:12319 TEST=Build and run on link. Only build on snow. while true; do ectool hello; done & ; run 10 instances. ; expect all instances runs okay. Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Original-Change-Id: I11d5824f46810c6f5a04a564a81387cdea081697 Reviewed-on: https://gerrit.chromium.org/gerrit/29763 Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 03d4ed278de2a27a9c2c580ad4d68e30dbcc7630) Change-Id: Id38ea63e9dc36f13455af5c55f5aeb40571ce00c Reviewed-on: https://gerrit.chromium.org/gerrit/31092 Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org> Tested-by: Yung-Chieh Lo <yjlou@chromium.org>
* Hibernate when in G3 for 24 hoursVic Yang2012-08-071-2/+62
| | | | | | | | | | | | | | | | | To save power, make the EC hibernate after we go into G3 for 24 hours. BUG=chrome-os-partner:9386 TEST=Use "hibdelay 5" to change the delay to 5 seconds. Remove AC power, power down and check device hibernates after 5 seconds in G3. Connect AC power, power down, wait for G3. Remove AC power and check device hibernates after 5 seconds. Change-Id: I6fb907c904798076a763f22bd35f53f7424d6200 Reviewed-on: https://gerrit.chromium.org/gerrit/29400 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Periodically set power LEDVic Yang2012-08-071-1/+16
| | | | | | | | | | | | | | | It is possible that power LED goes off while AC still connected. Let's set power LED periodically to aviod this problem. BUG=chrome-os-partner:10386 TEST=Disconnect power LED while leave AC connected. Check LED goes off. Connect LED again and check it comes back after few seconds. Change-Id: I2a199446be5da772af8027b735b9f431f697bacd Reviewed-on: https://gerrit.chromium.org/gerrit/29403 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* add a function to fast forward system timerVincent Palatin2012-08-065-3/+33
| | | | | | | | | | | | | | | | | | | When we wake up from a deep sleep mode, the system timer clock might have been stopped. We need to be able to set using another time source (e.g. the RTC). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8866 TEST=make BOARD=snow && make BOARD=link on Snow, on a software implementing STOP mode, check the system time is still accurate by comparing it to the wall clock. Change-Id: Ieddbb423d052c7aceb398470866b25b25a74c0a0 Reviewed-on: https://gerrit.chromium.org/gerrit/29314 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* snow daisy: compute RW firmware hashVincent Palatin2012-08-064-0/+10
| | | | | | | | | | | | | | | | | Activate the VBOOT code to compute the SHA256 hash of the RW partition of the EC firmware. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=On Snow, reset the EC and see the hash is computed at startup. Change-Id: Id1930f823ef516e459b4905c7d0f301568fddf0f Reviewed-on: https://gerrit.chromium.org/gerrit/29279 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* snow: remove debug features to save RAMVincent Palatin2012-08-061-2/+2
| | | | | | | | | | | | | | | | | | We need a bit more internal RAM for verified boot hash feature, let's de-activate RAM hungry debug features. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:12271 chrome-os-partner:10895 TEST=make BOARD=snow check RAM size with CONFIG_VBOOT and CONFIG_VBOOT_HASH activated. Change-Id: I4d1d6c0f99a8b03011af6eb2d73455beba93c535 Reviewed-on: https://gerrit.chromium.org/gerrit/29278 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* vboot: fix flash offset for hashVincent Palatin2012-08-061-2/+2
| | | | | | | | | | | | | | | | | | CONFIG_FW_RW_OFF is already relative to the base address of the flash, we don't need to substract it. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=on Snow, run with CONFIG_VBOOT and CONFIG_VBOOT_HASH activated and see the hash is correctly computed and display. Change-Id: I1643b07a59459baa973bfd7ee80cbf98963a85d4 Reviewed-on: https://gerrit.chromium.org/gerrit/29276 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Add TPSChrome comments on charging codeRong Chang2012-08-061-5/+38
| | | | | | | | | | | | | | | This change adds more comments on charging states and fixes battery temperature out of range log messages. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:10900,12222 TEST=none Change-Id: Ie3240dc246ad7590078929e41575c67798373aca Reviewed-on: https://gerrit.chromium.org/gerrit/29253 Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* Change link charging profileRong Chang2012-08-061-43/+64
| | | | | | | | | | | | | | | Change vendor specific charging current table to meet battery specification. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:12012 TEST=run firmware_ECCharging Change-Id: I41a8060834bd02153d8c722ae5ffed7749226b83 Reviewed-on: https://gerrit.chromium.org/gerrit/29258 Reviewed-by: Vic Yang <victoryang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org>
* Fix stm32 i2c timeout debug messageRong Chang2012-08-061-3/+0
| | | | | | | | | | | | | | | | | | The i2c timeout error message is false positive warning. It happened when wait_status() function got a good result, but took too long to complete (> 1ms). This warning message can be removed safely. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:9759,12222 TEST=none Change-Id: I2a670b76a5d741dc82ea59eacc233c4719eb3263 Reviewed-on: https://gerrit.chromium.org/gerrit/29254 Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org>
* Add x86indebug commandRandall Spangler2012-08-031-0/+27
| | | | | | | | | | | | | | | | | | | | Prints all x86 signal power state transitions at interrupt level, so we can see lines toggle more precisely. BUG=chrome-os-partner:12229 TEST=manual 1. power on system 2. no debug output that looks like [501.001742 x86 in 0x563f] 3. reboot 4. x86indebug 0xffff 5. power on system 6. should see lots of lines that look like [501.001742 x86 in 0x563f] Change-Id: Ie3b346ee4d4beee3f13ac1245f1eb022b48dabf4 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29192 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Fixing lid power behavior -- shutdowns vs rebootsCharlie Mooney2012-08-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | When the user is logged in a closes/opens the lid of the laptop the lid_changed flag gets set, but never cleared. Normally, it would get cleared when it powered back on from being opened, but without powerm running or is the machine is only suspended, then that never happens. This fixes the problem by additionally clearing the flag whenever the computer is powered down. This forces the computer to not turn on based on anything that happened to its lid before it was turned off, which is the behavior you'd expect. BUG=chrome-os-partner:12189 TEST=Log in to your Chomebook completely. Close, then open the lid. Shut the computer down. It should stay off now. Once it's back on close the lid and confirm that it still suspends correctly. Now open the lid and make sure it turns back on. Repeat these steps, but kill powerm first. Change-Id: I2275b3125115b4eacc6a5d074978d7a1d51b0695 Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29111 Reviewed-by: Benson Leung <bleung@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Revert "Set power LED to green when we are trickle charging nearly full"Vic Yang2012-08-033-30/+28
| | | | | | | | | | | | | | | | This reverts commit f322e1b96a5a7400d283b2a6397e020e6200522c. Now that we notify kernel when charge_full changes, this workaround should be abandoned. BUG=chrome-os-partner:11248 TEST=Check power LED still works. Change-Id: I87c269dcf4cb6b9f0da2472f139e39cced28232b Reviewed-on: https://gerrit.chromium.org/gerrit/29147 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Notify kernel when charge_full changesVic Yang2012-08-031-0/+9
| | | | | | | | | | | | | This way kernel always know the current value of charge_full. BUG=chrome-os-partner:11248 TEST=Check charge_full is updated when it changes Change-Id: I623d84a4d6e556097b9214672e016b0c2e6cfdb9 Reviewed-on: https://gerrit.chromium.org/gerrit/29133 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Fix 'reboot' console commandVic Yang2012-08-021-5/+5
| | | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:12155 TEST=Check 'reboot' command works with the following parameters: - No parameter - 'hard' - 'soft' - 'hard ap-off' - 'soft ap-off' - 'soft preserve' - 'hard ap-off preserve' Change-Id: Ib54d6a0fe419ff7b47265698fae2fcd554f707d4 Reviewed-on: https://gerrit.chromium.org/gerrit/29017 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* snow: add keypress noise suppressionDavid Hendricks2012-08-011-0/+7
| | | | | | | | | | | | | | | | | | | This was implemented for Daisy a long time ago, but left out on Snow due to some confusion. GPIO remapping is already handled because PD1 and PD0 (which is used for ENTERING_RW) are remapped together. So all we need here is the board_keyboard_suppress_noise() function definition which gets called from the keyboard scanning code whenever a change is detected. BUG=none TEST=Verified using a scope that CODEC_INT line is driven when a key is pressed (15us pulse) Signed-off-by: David Hendricks <dhendrix@chromium.org> Change-Id: Ifd358eb89a9547c4f4b9536b8922c93d2c3b77a0 Reviewed-on: https://gerrit.chromium.org/gerrit/28989 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Add additional host command debug outputRandall Spangler2012-08-011-5/+39
| | | | | | | | | | | | | | | | | | | Prints when a host command returns an error code. When 'hcdebug on', hex-dumps the host command params and response. BUG=none TEST=manual (> is ec console, $ is root shell) $ ectool gpioget foobar --> EC console shows error 2 returned > hcdebug on $ ectool hello --> EC console shows params and response as hex > hcdebug off $ ectool hello --> no extra output on EC debug console Change-Id: I2dbc77be5b59125f394d970cf1c83c2a976e926e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28948 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Snow has write protect pin (PB4) wired to EC.Louis Yung-Chieh Lo2012-08-015-13/+9
| | | | | | | | | | | | | | Intend to keep fake_wp functions for test. BUG=chrome-os-partner:9986 TEST=build only (success on link/snow/daisy/bds). Have no hardware to test. Change-Id: I1e2ae923790d65b6c95819f5274dbe8c7f254429 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28793 Commit-Ready: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com> Tested-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Wait STM I2C stop bit sentRong Chang2012-07-311-1/+26
| | | | | | | | | | | | | | | | | This CL prevents the risk of CR1 write access causes duplicate STOP. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:11974 TEST=manual console command "pmu 200" Change-Id: I717336d87230139a1a17e6f39e70502c0e0c7a18 (cherry picked from https://gerrit.chromium.org/gerrit/#/c/26832) Reviewed-on: https://gerrit.chromium.org/gerrit/28811 Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Fixing bug: Keyboard locks up after 8s pwr pressCharlie Mooney2012-07-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The EC was not re-enabling keyboard scanning on boot if the power button was released. This works fine if the power button is released before the shutdown is complete, but if the user holds it down until the device is completed powered down the lock will never be released, and the next time they turn on the computer, the keyboard won't work. To fix this, all that is needed is to make the power event task keep unlocking it whenever the power button isn't pressed down. There's no problem with unlocking multiple times, so it's not dangerous to do this. BUG=chrome-os-partner:12070 TEST=Boot the machine normally, then press and hold the power button until the machine is entirely powered down before releasing it. Press the power button a second time to turn on the machine. You should be able to type as normal. Change-Id: I88852ed228bd8f6a9446406bab642812ef1327db Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28871 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* Fix setting initial debounced power button stateRandall Spangler2012-07-311-3/+6
| | | | | | | | | | | | | | | If it's pressed, need to track that or we'll ignore the release. And then we'll leave the power button signal asserted to the PCH, and it'll shut down 4 seconds after the power button was pressed. BUG=chrome-os-partner:11971 TEST=hibernate 10, then press power button for ~0.5 sec, then release system should boot normally Change-Id: Ibb9b8a8827cca6c81bac06dc9543de1a76fa5aad Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28863 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* security: Check for integer overflow in VbExMalloc()Bill Richardson2012-07-311-1/+2
| | | | | | | | | | | | | | | Make sure we don't roll over when rounding up to align the requested size. BUG=chrome-os-partner:11642 TEST=none No test; if security guys approve code change, it's fixed. Change-Id: I2e915a6e6b37fc315ab7adb435e2fce4eed670ba Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28729 Reviewed-by: Sumit Gwalani <sumitg@google.com> Reviewed-by: Gaurav Shah <gauravsh@chromium.org>
* Rename TMP006 sensorsVic Yang2012-07-311-33/+33
| | | | | | | | | | | BUG=chrome-os-partner:12010 TEST=Build success Change-Id: I2557ec1568bc0b13a4dd25bbd85dffb9dccd6468 Reviewed-on: https://gerrit.chromium.org/gerrit/28764 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Fix a bug that a line longer than 80 char kills EC consoleVic Yang2012-07-301-1/+1
| | | | | | | | | | | | | | BUG=chrome-os-partner:11938 TEST=Type a command longer than 80 char and press enter. Check console is still alive. Change-Id: Ib86c5f97cc12220ac62ab8855ef8e5c65ecd2d82 Reviewed-on: https://gerrit.chromium.org/gerrit/28679 Reviewed-by: Charlie Mooney <charliemooney@chromium.org> Tested-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Add support for ACPI read/write commandsRandall Spangler2012-07-303-58/+180
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is needed to support the kernel keyboard backlight driver through ACPI. Also adds a few other memory addresses for testing this interface - version, test, and test-compliment. BUG=chrome-os-partner:12001 TEST=manual - query next ACPI event io_write8 0x66 0x84 io_read8 0x62 0x00 - read ACPI memmap version io_write8 0x66 0x80 io_write8 0x62 0 io_read8 0x62 0x01 - extra command writes shouldn't crash io_write8 0x66 0x80 io_write8 0x66 0x80 io_write8 0x62 1 - extra data writes shouldn't crash either io_write8 0x62 1 io_write8 0x62 1 - write test address io_write8 0x66 0x81 io_write8 0x62 1 io_write8 0x62 0x2a - read it back io_write8 0x66 0x80 io_write8 0x62 1 io_read8 0x62 0x2a - read back test compliment io_write8 0x66 0x80 io_write8 0x62 2 io_read8 0x62 0xd5 - set keyboard backlight to 50% io_write8 0x66 0x81 io_write8 0x62 3 io_write8 0x62 50 - read it back io_write8 0x66 0x80 io_write8 0x62 3 io_read8 0x62 0x32 Change-Id: I619fdbd322cdef8ffffbb882b3bbb587e364334d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28714 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* Remove "Sticky" recovery mode on DaisyCharlie Mooney2012-07-301-7/+4
| | | | | | | | | | | | | | | | | | | | | | | Previously, if you used Esc + Reload + Power to reboot into recovery mode, you would be stuck in it until you manually rebooted the EC with "Reload + Power." This was because the button combo set a switch that was never un-set. To fix it, the keyboard_scan function now sets a host event, that is serviced once, and then cleared. As a result, the next time you reboot after triggering recovery mode, it should boot as before you triggered recovery mode. BUG=chrome-os-partner:10889 TEST=Boot device in normal mode. Press Esc + Reload + Power, and boot from usb. Power off the device and remove the usb media. Power on the device again, and there should be no recovery screens during the boot process. Next, repeat these same steps, but from starting in developer mode. After recovery, when you reboot, the device should return to developer mode. Change-Id: Idcb8dde6f8ba5f680f4d34e61ae0d12992281cbb Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28710 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Improve hostcmd commandRandall Spangler2012-07-301-21/+23
| | | | | | | | | | | | | | | | | | | | | | Version and params fields are optional. Output uses "%h" format code. BUG=none TEST=manual > hostcmd 0 Response: 02000000 > hostcmd 0 0 Response: 02000000 > hostcmd 0 1 Command returned 6 > hostcmd 1 0 10203040 Response: 14233241 Change-Id: I8b3ff0f7d9a1131f942604724e04c59ff818396d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28705 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Add a userland thermal loopSameer Nanda2012-07-301-2/+194
| | | | | | | | | | | | | | | | | | | This is a temporary hack to implement a userland thermal loop. This code really belongs in the BIOS and will move there once we have gathered enough data to prove the efficacy (or otherwise) of doing such throttling. So, please pardon the ugliness of the code -- it's meant to be short-lived and therefore we wouldn't want to spend too much time on optimizing it or making it pretty. BUG=none TEST="initctl start temp_metrics" and then monitor various parameters such as CPU min/max frequency, GPU frequency, duty cycle and package power limits to ensure they are doing the right thing. Change-Id: I407e4826b4db801298f08fa72c4f2330e127322b Signed-off-by: Sameer Nanda <snanda@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28634 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Enhance printf()Randall Spangler2012-07-303-56/+138
| | | | | | | | | | | | | | | | | | | 1. Add precision to limit string length. ccprintf("%.4s", "foobar") prints "foob" 2. Handle '*' for length, precision fields. ccprintf("%.*s", 3, "foobar") prints "foo" 3. Add hex-dump code "%h" ccprintf("%.*s", 4, "foobar") prints 666f6f62 BUG=none TEST=at ec console, 'hash' prints the current hash Change-Id: I568310f2727495b021081bf58df2a0bbb3c74e73 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28704 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Revert "Enable snow I2C host auto detection"Rong Chang2012-07-302-40/+0
| | | | | | | | | | | | | | | | This reverts commit 024c44cd96bf97e81d4d3af45a0f0cb0ef1425a0. board/snow/board.c board/snow/board.h Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:10622 TEST=build snow ec image without warning Change-Id: I65660383873907722933b41249e17dd1f83d8fde Reviewed-on: https://gerrit.chromium.org/gerrit/28698 Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Set TPSCHROME temp range configurationRong Chang2012-07-293-22/+178
| | | | | | | | | | | | | | | | | | | Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:11627 TEST=manual Check pmu registers under uart console: "pmu" TPSCHROME version < 3: reg(7) == 0xbd reg(8) == 0xfd TPSCHROME version >= 3: reg(7) == 0xbf reg(8) == 0xff Change-Id: Ifeda54aa142b362aa224575c55220913b0ee7436 Reviewed-on: https://gerrit.chromium.org/gerrit/28587 Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* The jtag_buf_en was not set.Louis Yung-Chieh Lo2012-07-261-1/+2
| | | | | | | | | | | | | | | | | The dut_control function only accepts the first parameter. Thus, the jtag_buf_en:on is actually dropped in flash_link. This caused flash_ec script failed sometimes. BUG=None TEST=tested on link. util/flash_ec --board=link --image=... Change-Id: Ib7f8cdcd651a573ad4bdc6e446f3c715dce29b71 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28569 Commit-Ready: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com> Tested-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32: Add kbpress commandVic Yang2012-07-261-0/+37
| | | | | | | | | | | | | This command is needed by keyboard test. BUG=chrome-os-partner:11747 TEST=Keyboard test passed. Change-Id: I752f8a8f672f4ef2214ff60c8946a1a74745c586 Reviewed-on: https://gerrit.chromium.org/gerrit/28387 Commit-Ready: Vic Yang <victoryang@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Modify Gaia power message to match x86 power moduleVic Yang2012-07-261-4/+5
| | | | | | | | | | | | | Message from power modules should be similar for easier testing. BUG=chrome-os-partner:11815 TEST=none Change-Id: I07e061a34e7d8f8c1f1547d6e15f22f29ee22b84 Reviewed-on: https://gerrit.chromium.org/gerrit/28394 Commit-Ready: Vic Yang <victoryang@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* stm32f: Flash write protectVic Yang2012-07-264-33/+311
| | | | | | | | | | | | | | | | | | | | | | | | | | | Implement STM32F write protect to match refactored flash module. Also move fake write-protect pin to use backup register to preserve value across reboot. BUG=chrome-os-partner:11699 TEST=1. 'flashinfo' -> no flags 2. 'fakewp 1' -> 'wp_gpio_asserted' 3. 'flashwp enable' -> 'wp_gpio_asserted ro_at_boot' 4. 'reboot' -> 'wp_gpio_asserted ro_at_boot ro_now' 5. 'fakewp 0' -> 'ro_at_boot ro_now' 6. 'reboot' -> 'ro_at_boot' 7. 'fakewp 1' -> 'wp_gpio_asserted ro_at_boot' 8. 'flashwp rw' -> 'wp_gpio_asserted ro_at_boot rw_at_boot' 9. 'reboot' -> 'wp_gpio_asserted ro_at_boot ro_now rw_at_boot rw_now' 10.'flashwp disable'-> error 7 11.'flashwp norw' -> 'wp_gpio_asserted ro_at_boot ro_now rw_now' 12.'reboot' -> 'wp_gpio_asserted ro_at_boot ro_now' Change-Id: I40405c266e30b10793ccae2f1d26fb9710ce304b Reviewed-on: https://gerrit.chromium.org/gerrit/28372 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Stop keyboard scans from triggering ARM EC resetCharlie Mooney2012-07-262-1/+28
| | | | | | | | | | | | | | | | | | | | | | | | The ARM EC was being rebooted when both the power and one of several other keys were pressed. (LCtrl, Tab, Reload, t, [, ], y, Dim Screen and Mute) It should only do this when the key combo PWR + Reload is pressed. To fix it, keyboard scanning is disabled whenever the power button is pressed. It locks a mutex indicating that scanning should be disabled, and the main keyboard scanning task blocks on the step where it sets up the keyboard and waits for the mutex to unlock. BUG=chrome-os-partner:10889 TEST=Pick one of the troublesome keys. First press it, then quickly press the power button. Then press the power button followed by the troublesome key. Repeat this process several times for each key, it should not reset the system. Press power + reload, this should still reset the system. Pressing and holding power should initiate a shutdown. Change-Id: Ib60d2ebbb57eb8a3c135662514ec622c37a7eb07 Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28402 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* Change host command params/response pointers to void *Randall Spangler2012-07-2621-126/+69
| | | | | | | | | | | | | This removes a bunch of unnecessary typecasts, since you can assign to/from void * without them. This also uncovered a few cases where const was being cast away for the input params; now fixed. BUG=none TEST=mkbp hash from u-boot console, and/or system boots ok Change-Id: Ic314b9d2ca06226ea8a09703ef5c1a912eb7146d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28500
* Change some FMAP area_offset to be related to the start of flash.Louis Yung-Chieh Lo2012-07-251-3/+10
| | | | | | | | | | | | | | | | | | | | | | The area_offset of following area are wrong which is related to the CPU view in the STM32 chip: FMAP RO_FRID RW_FWID Add a macro RELATIVE() to calculate the real offset in flash. BUG=chrome-os-partner:11269 TEST=build in chroot for link and snow. Those fmap afddress are related to the start of flash. Change-Id: I691814e2f53b1de0ecf9fd385bed8d5c598373a7 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28388 Commit-Ready: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com> Reviewed-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com> Tested-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
* Don't protect firmware now if protect-ro-at-boot is not setRandall Spangler2012-07-251-2/+6
| | | | | | | | | | | | | | | Otherwise, EC software sync protects the entire firmware except in recovery mode, regardless of the WP pin. BUG=chrome-os-partner:11847 TEST=boot with WP enabled but RO-at-boot disabled; flashinfo should show entire flash still writable CQ-DEPEND=28444 Change-Id: I58d60adfaa952b127e8695213f95f6da0e34821d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28445 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* don't crash when receiving ACPI query on legacy channelVincent Palatin2012-07-251-0/+24
| | | | | | | | | | | | | | | | | | | | | | When updating the EC and BIOS, we have to run for some times the new EC with the old BIOS (after we have upgraded the first half of the EC and before rebooting the machine), let's handle the ACPI request so the kernel is not sending them into a loop triggering a reboot of the machine. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:11821 TEST=update a Link EVT using "chromeos-firmware --mode=factory" from current BCS binaries (EC v1.1.104-b8d7d8f / Firmware 2476) to next candidates ( EC v1.1.301 / Firmware 2657). Change-Id: I115a42e6c33c143cbdc38341dcf7e0f61a8bd771 Reviewed-on: https://gerrit.chromium.org/gerrit/28409 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
* Add upstart script to collect temperature statistics.Luigi Semenzato2012-07-251-0/+33
| | | | | | | | | | | | | | | | This is used only in selected platforms, and installed by the temp-metrics package in the private overlay for those platforms. BUG=chrome-os-partner:11631 TEST=manually using about:histograms Signed-off-by: Luigi Semenzato <semenzato@chromium.org> Change-Id: I89dffed6aa34d683ff78a360988fdfb84c2dc641 Reviewed-on: https://gerrit.chromium.org/gerrit/28311 Tested-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Richard Barnette <jrbarnette@chromium.org> Commit-Ready: Luigi Semenzato <semenzato@chromium.org>
* Change the path check of --image in util/flash_ec.Louis Yung-Chieh Lo2012-07-241-1/+1
| | | | | | | | | | | | | | BUG=None TEST=test on link. % util/flash_ec --board=link --image=a/random/file/path flash successfully. Change-Id: I82980783585ac7d2979cf195b7eb820dbf072156 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28252 Commit-Ready: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com> Tested-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Fix order of init hooks so chipset is called before power buttonRandall Spangler2012-07-244-3/+13
| | | | | | | | | | | | | | BUG=chrome-os-partner:11779 TEST=manual 1. power on system 2. sysjump RW 3. system should stay powered on Change-Id: Idf238c0567daa6137324e91e58279329865a2d42 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28346 Reviewed-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
* Add RW offset query interface (EC_CMD_FLASH_RW_OFFSET).Louis Yung-Chieh Lo2012-07-242-0/+57
| | | | | | | | | | BUG=chrome-os-partner:11149 TEST=build only. Originally-Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Change-Id: I35ad1e0a49c95a2d6cffbe49b2013a1b8050aabc Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28166
* Set correct name for new TMP006 sensorsVic Yang2012-07-241-24/+24
| | | | | | | | | | | BUG=chrome-os-partner:11491 TEST=none Change-Id: I00a59554fb5819c0942d917f8d558c1a00570a73 Reviewed-on: https://gerrit.chromium.org/gerrit/28251 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Add "all" command for sensor temperatures and sensor info.Luigi Semenzato2012-07-241-12/+57
| | | | | | | | | | | | | | | | This change makes it easier and less costly for the metrics daemon to collect sensor temperatures. BUG=chrome-os-partner:11631 TEST=manually verified that it works as expected Signed-off-by: Luigi Semenzato <semenzato@google.com> Change-Id: Iee7ca971f53d65f07589173322b55b0d87ab5363 Reviewed-on: https://gerrit.chromium.org/gerrit/28026 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Luigi Semenzato <semenzato@chromium.org> Tested-by: Luigi Semenzato <semenzato@chromium.org>
* Calculate the hash only of the actual RW codeRandall Spangler2012-07-243-7/+44
| | | | | | | | | | | | | | | | | No need to hash a bunch of 0xff's at the end. We explicitly set a 0xea byte after the end of the code in firmware_image.lds.S. BUG=chrome-os-partner:11087 TEST=look for the hash start line in the EC debug output: [0.011543 hash start 0x00014000 0x00011590] The second number is the code size. It should be the same size as ec.RW.bin, instead of 0x14000. Change-Id: Ibc94851dc1a09eb46cad46bb97dc5762f9c521f0 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28300
* hash command without args prints current hashRandall Spangler2012-07-241-0/+15
| | | | | | | | | BUG=none TEST=hash -> prints offset, size, (digest or in-progress) Change-Id: Ic21319c522811b3b73ace3538adb5dda0e6324c2 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28301
* Revert "Revert "i2c: Support command version numbers""Simon Glass2012-07-243-15/+57
| | | | | | | | | | This reverts commit 3bb4c6acf4ff327f956ee5e1b6deefcd84dc8fbb Change-Id: I690baa9bcc0229502c103fc31314170bbc825f65 Reviewed-on: https://gerrit.chromium.org/gerrit/28189 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
View Lorry Controller Status