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* temp_metrics: add "--" when invoking ectool tmp006calrelease-R38-6158.BSameer Nanda2014-10-151-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | ectool has switched over to using getopt for command line options parsing. This breaks temp_metrics' invocation of "ectool tmp006cal" command since some of the coefficients are negative and therefore start with "-". getopt treats that as another command line option causing ectool to barf. BUG=chromium:422160 TEST=On a Pixel issue "sudo start temp_metrics" and check /var/log/messages to ensure that no new messages such as "init: temp_metrics main process ended, respawning" show up. BRANCH=none Original-Change-Id: I42232b3027ec6339814d226f1d8ab493e3420eea Signed-off-by: Sameer Nanda <snanda@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222845 Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 63c41f239223cb343978635c7409ee341eeb08d8) Change-Id: I42af09c1a8d6a6cc4718cebe446786603b1748f1 Reviewed-on: https://chromium-review.googlesource.com/223298 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Sameer Nanda <snanda@chromium.org> Tested-by: Sameer Nanda <snanda@chromium.org>
* hoho: Initial board configuration.Todd Broch2014-08-167-1/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create necessary boiler plate files for USB type-C to HDMI dongle. BRANCH=none BUG=chrome-os-partner:31192 TEST=manual 1. Compiles & can program via fruitpie. 2. Can access uart (w/ rework for tx/rx). 3. Can drive HDMI capable monitor. test details ... Programming: ------------ # connect fruitpie + fruitpie std-adapter(red) with u-USB (CN3) & type-A # (CN1) both to host that will run servod. FPIE_PORT=9993 sudo servod -p 0x5009 --port $FPIE_PORT dut-control --port $FPIE_PORT "ec_uart_cmd:gpioset USB_C_5V_EN 1" dut-control --port $FPIE_PORT "ec_uart_cmd:usbmux usb" util/flash_ec --board=hoho Configuring samus for DPout on both ports: ------------------------------------------ sudo servod -b samus for port 0 1; do dut-control "usbpd_uart_cmd:pd ${PORT} dualrole off" dut-control "usbpd_uart_cmd:gpioset USB_C${PORT}_CHARGE_EN_L 1" dut-control "usbpd_uart_cmd:typec ${PORT} dp" dut-control "usbpd_uart_cmd:gpioset USB_C${PORT}_5V_EN 1" dut-control "usbpd_uart_cmd:typec ${PORT}" done Change-Id: I39bbe1e347d1cfd777b68f3fdac6c5c6dd22800d Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212523 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* usb: add CONFIG_USB_INHIBIT to prevent automatically starting USBDominic Chen2014-08-163-1/+34
| | | | | | | | | | | BUG=none BRANCH=none TEST=usb does not autostart, and can be enabled/disabled Change-Id: I22a7bf3ca9cb7013cc4964dbdabff7524985d9ba Signed-off-by: Dominic Chen <ddchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212509 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* tegra: Cancel timer if long power press is canceledVic Yang2014-08-151-0/+3
| | | | | | | | | | | | | | | | | | When long power press is canceled, we need to cancel the current running timer. Otherwise, if the power button is pressed again before the current running timer expires, the next deadline won't be set. This causes the chipset task to wake up too early and miss the subsequent long power press shutdown. BUG=chrome-os-partner:31372 TEST=On Ryu, long press following a short press shuts down the system. BRANCH=None Change-Id: I9855b146d430e5babda727fcb429c516ca91e48e Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212560 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Revert "Add back unit test for usb_pd"Vic Yang2014-08-1511-755/+3
| | | | | | | | | | | | | | | | | This reverts commit cb7468744d8292590ddc4fb0a0b6ed7752b1490a. Apparently this test fails when running on a heavily loaded system. Revert this for now. BUG=chromium:402335,chrome-os-partner:31200 TEST=make buildall BRANCH=None Change-Id: I8b616d3915ee5c2f524530897758871cc0375d35 Reviewed-on: https://chromium-review.googlesource.com/212582 Tested-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Christopher Wiley <wiley@chromium.org> Commit-Queue: Vic Yang <victoryang@chromium.org>
* flash_ec: add support for closed-case debuggingDominic Chen2014-08-151-1/+17
| | | | | | | | | | | | | | | | | Passing the "--usb" argument will now utilized case-closed debugging for flashing the EC. Currently this is only supported for the samus LM4-based board. BRANCH=none BUG=none TEST=verify that when the case-closed debugging flag is set, the alternate openocd config file is used for samus, and an error is thrown for all other boards Change-Id: I0642bc2e9c2657cd8dbd83ee6e282365275d665a Signed-off-by: Dominic Chen <ddchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211744 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* openocd: update configuration filesDominic Chen2014-08-157-77/+33
| | | | | | | | | | | | | | | | | 1. use ftdi interface driver instead of deprecated ft2232 2. remove custom target config and use upstream stellaris target 3. replaced deprecated servo_v2.cfg with servo_v2_slower.cfg 4. deprecated openocd.cfg BUG=none BRANCH=none TEST=flash samus works CQ-DEPEND=CL:210778 Change-Id: I572a717613eedc3afc44009a0f1aba1f1d36d7f7 Signed-off-by: Dominic Chen <ddchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210920 Reviewed-by: Todd Broch <tbroch@chromium.org>
* fruitpie: enable usb mass storageDominic Chen2014-08-153-0/+57
| | | | | | | | | | | BRANCH=none BUG=none TEST=verify that usb mass storage functions Change-Id: I141afb2f5797db769319a499ad8884be123d6116 Signed-off-by: Dominic Chen <ddchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206304 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* usb: add support for mass storage (bulk-only)Dominic Chen2014-08-159-0/+1301
| | | | | | | | | | | | | | implement USB mass storage class using the bulk-only transport protocol with the transparent SCSI command set. BRANCH=none BUG=none TEST=verify that usb mass storage functions on windows xp, 7, 8, mac os x, goobuntu precise Change-Id: Ideecad55bd275df7b30aa4a3ed263304a3a109cd Signed-off-by: Dominic Chen <ddchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206303 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: Print warning before flash erase if on PD powerVic Yang2014-08-147-4/+59
| | | | | | | | | | | | | | | | | During flash erase operation, read is stalled and thus interrupt might be serviced later. This can cause PD communication to fail and thus the board reboots if there is no battery. Print a warning message in this case. BUG=chrome-os-partner:31127,chrome-os-partner:31207,chrome-os-partner:31362 TEST=Boot Ryu, on software sync, see warning message before board reboots. BRANCH=None Change-Id: If327a4f533fd2dfa83f92531148bd52ace927e03 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212264 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* module: add constant MODULE_USB_DEBUG for closed-case debuggingDominic Chen2014-08-141-0/+1
| | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: I0fdc166f1b2664da84c7e375b0670db32887807e Signed-off-by: Dominic Chen <ddchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212371 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: Fix bug in PD console commandVic Yang2014-08-141-3/+3
| | | | | | | | | | | | | The check on number of arguments is offset by 1. Fix it. BUG=None TEST=Run the commands with one parameter short. See error. BRANCH=None Change-Id: I2ac1fe022d22bbef2ee90fe54a7856766fc31dcc Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212352 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: Guard console messages with log levelVic Yang2014-08-141-15/+42
| | | | | | | | | | | | | | | | | | | | We're printing more and more log and this sometimes causes timing issue. Let's guard the PD log with a log level. Currently there are three different levels: - 0: Log state transition - 1: Level 0, plus packet info - 2: Level 1, plus packet dump on error The default value is 0. BUG=None TEST=On Ryu, enable USB PD console channel and set different log levels. Observe different amount of log message. BRANCH=None Change-Id: I49613d406bcb1ec20d3f242f724dc1c054478c7d Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212351 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* stfm32f0: always send bytes over i2c for EC command responsesAaron Durbin2014-08-141-0/+8
| | | | | | | | | | | | | | | | | | | | Certain i2c host drivers don't allow one to snoop the byte stream to abort a transaction. Allow those devices to make forward progress by sending out the '0xec' byte for any requests coming through after an EC host command error. BUG=chrome-os-partner:30784 BRANCH=None TEST=Ran on ryu. Allowed passthru probing which normally hung the system because of there not being a passthrue device on ryu -- error returned. Instead the command returns successfully by returning 0xec for the unfilled bytes. Change-Id: Ibcab5ade1f727f3852995437105eb9fa693caadf Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212165 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32f0: always initialize i2c_packetAaron Durbin2014-08-141-14/+14
| | | | | | | | | | | | | | | | The i2c_packet structure wasn't always being initialized in the error path. It's possible to crash the EC if the first command processed hit this error path. Instead, unconditionally set all the i2c_packet fields. BUG=chrome-os-partner:30784 BRANCH=None TEST=Built and ran on ryu. Change-Id: Ic6d7c63f61d59c4449fbb20f656c1bfb835db8be Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212164 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* stm32f0: use proper bit checking I2C ISR transmitter empty statusAaron Durbin2014-08-141-1/+1
| | | | | | | | | | | | | | The wrong define was being used when checking the I2C ISR status. The wrong define just so happened to be the correct bit. BUG=chrome-os-partner:30784 BRANCH=None TEST=Built and ran on ryu. Change-Id: I6c7aad34f5e7c7ace4db4442147023346b6285bc Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212163 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: issue PD soft reset on sysjumpVic Yang2014-08-143-0/+26
| | | | | | | | | | | | | | | On sysjump, we are losing all of our PD states. Instead of trying to remember all the states and deal with on-going transmission, let's just issue a soft reset so that the communication starts over. BUG=chrome-os-partner:31207 TEST=With Ryu/Zinger, do 'sysjump rw' and check EC doesn't reboot. BRANCH=None Change-Id: I8779b74491a402434931b3455fa93ff2e178cb1f Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212123 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* STM32F0 SPI Fixes: 4x Dummy BytesAlexandru M Stan2014-08-141-2/+6
| | | | | | | | | | | | | | | | | | | | Seems like STM32_SPI_CR2_FRXTH from 5d208b99(STM32F0 SPI Fixes) was not enough to "disable" RX FIFO from the F0 series. There were still a few bytes stuck in the FIFO just after a command with a long sequence of 00 bytes. This increases the dummy bytes read just before a DMA transfer to 4(size of the FIFO). BUG=none BRANCH=none TEST=Veyron with the new EC should survive the AP booting. ectool version will work right away after boot. This change should not affect other STM32 chips because reading dummy bytes from an empty register is essentially a NOP. Change-Id: I812208622a75ecce82433eb6c12595fee3c1428b Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212297 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Add back unit test for usb_pdVic Yang2014-08-1311-3/+755
| | | | | | | | | | | | | | Add back the test but only enable USB PD tasks for usb_pd test. This should ensure that we do not break existing tests. BUG=chrome-os-partner:31200,chromium:402335 TEST=make buildall BRANCH=None Change-Id: I4daa41a96a1067362b2c40a2a09fce733843bdff Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211923 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: Implement PD soft resetVic Yang2014-08-131-20/+51
| | | | | | | | | | | | | | | | | Currently, when we receive soft reset request, we only reset message ID. According to the spec, we should also reset the state machine without cutting power. This CL implements this, along with a console command to issue soft reset request. BUG=chrome-os-partner:31296 TEST=Issue soft reset from Ryu to Zinger. Check that we go back to discovery state and re-negociate a contract. BRANCH=None Change-Id: Ib00b0d9dddaf6ac2a1ec5c46dbc2824d6d7814ed Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212122 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pi3usb9281: Implement driver for Pericom USB switchDominic Chen2014-08-134-0/+271
| | | | | | | | | | | BRANCH=none BUG=none TEST=verify that usb switch funcitons Change-Id: Ie897a2ae94042abefbb349d30dfa183caaec9ed0 Signed-off-by: Dominic Chen <ddchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/209846 Reviewed-by: Vic Yang <victoryang@chromium.org>
* samus: ryu: fix charge state machine init of input currentstabilize-6146.BAlec Berg2014-08-125-16/+37
| | | | | | | | | | | | | | | | | | | | | | Currently charge state machine resets input current limit to default every time AC is connected. Problem is by the time charge state machine gets around to setting input current, it could have already been set by successful PD negotiation, and this ends up overriding that value. This fix has the state machine store desired input current limit, as determined from PD negotation or any other place, and send last desired input current limit on AC connect. BUG=chrome-os-partner:24461 BRANCH=none TEST=load on samus, test toggling between "pd 0 dev 5" and "pd 0 dev 20", and test plugging and unplugging zinger numerous times, and verify charger command always gives the expected input current limit based on PD negotiation. Change-Id: I18d8acc9e2085739e783c9c70c682d46bcce7fdb Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211639 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* firefly: default to requesting 20VAlec Berg2014-08-121-1/+1
| | | | | | | | | | | | | | | | Change default to request 20V. BUG=none BRANCH=none TEST=Load onto a firefly. Plug in a zinger, make sure 20V LED lights up. Press other buttons to make sure we can change the requested voltage to 5V and 12V. Change-Id: I3a3e63a6d0e4f01b9fe7c730468da75ad6783f41 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211872 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: modify PD to allow sending VDMs anytimeAlec Berg2014-08-113-68/+126
| | | | | | | | | | | | | | | | | | | | Change the VDM implementation in the PD task to allow for VDMs at any time when connected without disrupting any regular PD communications. BUG=none BRANCH=none TEST=load on a samus and on a zinger and test sending VDMs: pd 0 flash version pd 0 flash reboot Also, test using the flash_pd.py script to write zinger RW using VDMs. Change-Id: I48352978d8c45f78e8a5a7735d65b013a853f3e2 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210746 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: stop sending source cap after fixed number of attemptsAlec Berg2014-08-111-7/+15
| | | | | | | | | | | | | | | | | As per the PD spec, give up on sending source cap packets after nCapsCount number of attempts. BUG=chrome-os-partner:28341 BRANCH=none TEST=Connect samus to an unplugged zinger. Samus recognizes a device has been plugged in and sends source cap for 5 seconds (50 attempts at 100ms retry period), then stops sending source cap but remains in discovery state providing VBUS. Change-Id: I0aa25263f200299a0eb8d219883f825ae655129c Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211335
* veyron: Porting to the new EC(STM32F071)Alexandru M Stan2014-08-114-18/+37
| | | | | | | | | | | | | | | | | | * Changed chip in build.mk * Renamed the Port H pins * Switched to 32bit timer * Remapped UART DMA Channel BUG=None TEST=Flash the new chip; UART Debug, SPI HC, I2C Battery should work. Everything else should work (besides power usage) BRANCH=None Change-Id: Ia73f3f6b4e8b7b42af4dfa592b7ff435ee379206 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210522 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Revert "Add unit test for usb_pd"Alec Berg2014-08-1112-754/+4
| | | | | | | | | This reverts commit 0739074fbf735cffefdac7ff6d086084449f6493. Change-Id: I1889138e5a8d5bc22d3bac2e48afe6378a59542a Reviewed-on: https://chromium-review.googlesource.com/211773 Reviewed-by: Prathmesh Prabhu <pprabhu@chromium.org> Tested-by: Prathmesh Prabhu <pprabhu@chromium.org>
* pd: use interrupt on Rx retryVic Yang2014-08-113-4/+19
| | | | | | | | | | | | | | | | | After sending a message, we wait for up to 2.7 ms for reply. If we don't get one, we retry for up to twice. Therefore, a undelivered message could take up to >8ms. To prevent starving other tasks, let's yield to other tasks on retries and rely on interrupt to wake us. BUG=chrome-os-partner:28341 TEST=Plug in zinger on port 0 and C-to-A dongle on port 1. Check that port 0 drops connection less frequently. BRANCH=None Change-Id: If85a70fd1140fef69d79243b198703ce601f8030 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211281 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: log state transition and stop logging pingsVic Yang2014-08-111-7/+23
| | | | | | | | | | | | | | | | | When PD state changes, log the state transition. Also, now that we have the state logged, logging pings doesn't help us anymore, so stop logging them to make console clean. BUG=None TEST=Run on samus_pd. Plug/unplug zinger. Check state is logged and pings are not. BRANCH=None Change-Id: Ib482b3351d9681fbb4bcc2585da58c732428b7af Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211262 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Add more build conditions on x86-only code.Vincent Palatin2014-08-102-5/+5
| | | | | | | | | | | | | | | | | | | | ACPI and thermal throttling are used only by x86 platforms. Modify the conditional build to avoid building them where they are not used. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make buildall check the flash size on Ryu and see we are saving about 200 bytes with this changes. Change-Id: Ie5e1603fb3bea95eaa5cb1e6cb19f4ddb0e235e8 Reviewed-on: https://chromium-review.googlesource.com/210056 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Add unit test for usb_pdVic Yang2014-08-1012-4/+754
| | | | | | | | | | | | | | Initial commit of usb_pd unit test. The test cases are very simple. We'll add more test cases in similar format. BUG=chrome-os-partner:31200 TEST=Pass usb_pd test BRANCH=None Change-Id: I9e3de5b2c032ee1d3670cde6d8227ce0378ae8a0 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211643 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: Move more protocol layer constants to header fileVic Yang2014-08-102-55/+57
| | | | | | | | | | | | | | | This is a preparatory work for USB PD unit test. With this, we won't need to duplicate these constants in both the implementation and the test. BUG=chrome-os-partner:31200 TEST=make buildall BRANCH=None Change-Id: Ia814a95450859caaa6d90e4cd866cb671d010b31 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211653 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Hold I2C lock through entire PD read transactionShawn Nematbakhsh2014-08-091-2/+5
| | | | | | | | | | | | | | | | | | | I2C reads from the PD happen in two separate transactions, but no stop condition is set after the first transcation. Therefore, it is necessary to lock the I2C bus across both transactions to prevent other tasks from using the bus in between. BUG=chrome-os-partner:29839 TEST=Manual on Samus. Boot to recovery screen, plug + unplug power supply, verify that no I2C error messages are printed to console. Then repeat 100x. BRANCH=None. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ie441637f499980a349022e281379ad2cc825b1aa Reviewed-on: https://chromium-review.googlesource.com/211649 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* samus: ryu: set input current limit based on PD negotiationAlec Berg2014-08-0912-58/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set input current limit based on the max current from the PD negotiation. For samus, this information is passed to the EC as a host command. For ryu, the max current is set directly following a negotiation. CONFIG_CHARGER_INPUT_CURRENT is now just the default limit, but after a successful PD negotiation, the limit can be raised. Note, for now the input current limit for samus is set to 2/3 of the value negotiated for. This is due to hardware problems measuring input current on p2b boards. BUG=chrome-os-partner:28532, chrome-os-partner:24461 BRANCH=none TEST=tested on a samus. Verified input current limit using "charger" console command from EC. Input current limit after a reboot is 512. When zinger is plugged in, it jumps to the appropriate value (currently 1280mA), and when the negotiation is changed using the "pd 0 dev 5" command on the PD console, the input current limit is adjusted to match (2000mA). Change-Id: Iab9186a0f9814655e3240217a9baf4a38f15f84d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211023 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus_pd: change port C1 PD comparator to use window modeAlec Berg2014-08-091-3/+4
| | | | | | | | | | | | | | | | | | | | | Change USBC port 1 PD comparator to use window mode, which uses COMP1's non-inverting input for COMP2's non-inverting input (pin PA1). This allows us to free up pin PA3 and PA7 for the next build. BUG=chrome-os-partner:31215 BRANCH=none TEST=make sure PD communication works on both ports by plugging in a zinger. Then set gpioset USB_C0_REF_PD_ODL 1, to change comparator voltage to 1.5 V and verify that neither port works. Then gpioset USB_C0_REF_PD_ODL 0 and gpioset USB_C1_REF_PD_ODL 1 and make sure that both ports work. This proves that both ports are using USB_C0_REF_PD_ODL as the comparator value (PA1). Change-Id: I6e1e5606af43196b04c84417552002b063aa4134 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211416 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32f0: stm32l: Fix backup register indexingVic Yang2014-08-081-0/+19
| | | | | | | | | | | | | | | On stm32f0 and stm32l, the backup registers are 32-bit. Fix the index calculation. BUG=chrome-os-partner:31214 TEST=On Ryu, save and load VbNvContext BRANCH=None Change-Id: I86e5dc31c80bed46a6fe13929c7e6a1d4ca9f97b Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211462 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* i2c-stm32f0: Adjust scope of the I2C host codeAlexandru M Stan2014-08-081-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | HAS_TASK_HOSTCMD is not a good indicator that we intend to use I2C Host Commands On platforms such a veyron we use an STM32F0 with SPI HC for example however i2c-stm32f0.c was very eager to still provide host commands via I2C. If one wants to use I2C host commands they need to define CONFIG_HOSTCMD_I2C_SLAVE_ADDR anyway, so the presence of that is a better indicator. The boards that want I2C host commands are ryu and samus_pd. veyron/pinky needs SPI host commands, so this patch makes this case possible. The rest of the boards that use STM32F0 do not have HAS_TASK_HOSTCMD set. BUG=None TEST=make buildall -j BRANCH=None Change-Id: Ia5561afdc6e72019c24c5c4b775944b2b88cb950 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211434 Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Move software CRC implementation to commonVic Yang2014-08-085-17/+32
| | | | | | | | | | | | | | | There is nothing chip-specific in the software CRC implementation. Let's move it to common so that we can reuse it for other chips and unit tests. BUG=chrome-os-partner:31200 TEST=Define CONFIG_SW_CRC for host. Check crc.c compiles fine. BRANCH=None Change-Id: Icdc1d105c55c38ff07410cb5d733a31dbac53aea Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211494 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* STM32F0 SPI FixesAlexandru M Stan2014-08-082-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | The STM32F0 has a fancier SPI than the L1 series we've been using so far. Notably it supports 16 bit data packing. This mode is activated automatically by reading/writing to the SPI_DR register as 16 bits. We do not want this feature since we only do 8 bit operations. This change prevents a misalignment of the data where the MCU thinks it's doing 16 bit transfers and we want 8 bit transfers. Another unwanted feature is the FIFO. We rely on DMA and some buffers instead. Keeping the FIFO enabled causes extra characters. The way this patch disables the fifo is by changing the FIFO reception threshold to only 1 byte (which is the same behavior that L1 has with no FIFO). Setting the FRXTH bit on the L1 chips should not affect anything as that area of the register is reserved. BUG=none BRANCH=none TEST=Try SPI on both STM32L1xx(preexisting support, should not be broken) and STM32F0(new support/veyron) Change-Id: I90dc6bb8a82881e70058443591acaebc44ba982b Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211476 Reviewed-by: Doug Anderson <dianders@chromium.org>
* samus_pd: add option to disallow PD communication in ROAlec Berg2014-08-072-0/+25
| | | | | | | | | | | | | | | | | | | | | Added a check for if we are in RO and write protect screw is present which will stop the PD task to prevent PD communication. By default this check is disabled since the p2 samus units do not have access to WP screw. This check will need to be enabled for EVT. BUG=chrome-os-partner:31125 BRANCH=none TEST=enabled the check, loaded on a p2 samus, and verified that in RO, the console prints out "PD not allowed" and there is no communication with an attached zinger. Then ran "sysjump RW" and verified that power negotiation with zinger succeeded. Signed-off-by: Alec Berg <alecaberg@chromium.org> Change-Id: I5007db659d8b057431426157a2150127b97a7b3f Reviewed-on: https://chromium-review.googlesource.com/211020 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: add PD communication enable flagAlec Berg2014-08-073-5/+57
| | | | | | | | | | | | | | | | | | | | | | | Add PD communication enable flag. When disabled, the ports will still detect source/sink connect and disconnect, and will provide VBUS to a device, but will not send or respond to any PD communication. Use the CONFIG_USB_PD_COMM_ENABLED macro to define the default state of PD communication enabled flag which may vary board to board. BUG=chrome-os-partner:31125 BRANCH=none TEST=load onto samus. use "pd 0 enable" console command to toggle between enabled and disabled. when disabled, test that plugging in a zinger only gets you the default VBUS 5V and that no negotiation takes place. when enabled, test that plugging in zinger negotiates successfully. Change-Id: I78ac3091f12d9699b19647be48ab7b6f434f5d7d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211045
* pd: hard reset if we get unexpected PS_RDYVic Yang2014-08-071-1/+4
| | | | | | | | | | | | | | | If we are in SNK_DISCOVERY state and get PD_RDY, we are not sure what the power source is. In this case, instead of happily go to SNK_READY state, we should do a hard reset to be safe. BUG=None TEST=Check PD on samus/zinger still works. BRANCH=None Change-Id: I2baca06d45ba41e30d2ccf7a02fb65eb3966e5c1 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210925 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: hard reset if we get a request in disconnected statesVic Yang2014-08-071-15/+22
| | | | | | | | | | | | | | | If we are in disconnected states and get a request, it's likely either ourself or whatever on the other side is confused. Do a hard reset in this case. BUG=None TEST=None BRANCH=None Change-Id: Ic6504fccc55b79bd3ec4cc47007252e7dc69c778 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210924 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: clean up timeout handling in state machineVic Yang2014-08-071-54/+92
| | | | | | | | | | | | | | | | | In PD state machine, we often need to do "go to X state, and if after Y ms we are still in X state, go to Z state." However, we do this in a way that are suspectible to premature timeout if PD task is waken at an unfortunate time. Let's add methods to set the state w/ or w/o timeout to prevent this. BUG=None TEST=Boot on samus. Plug in zinger, and check we have 20V power. BRANCH=None Change-Id: I91db44ef71e31007eef4edd0f826bf81505e51e5 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210874 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* charger v2: Apply charge current to full battery in disconnect stateShawn Nematbakhsh2014-08-061-1/+12
| | | | | | | | | | | | | | | | | | | If a battery is found in disconnect state, we need to apply a charge current to get it out of that state, even if the battery is full. BUG=chrome-os-partner:29465 TEST=Manual on Samus. Put full battery into disconnect state then power-on the EC. Pull AC and verify that the battery is no longer disconnected. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I43e872e225dc5a651f566d7b190cff85a487805e Reviewed-on: https://chromium-review.googlesource.com/210343 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Shawn Nematbakhsh <shawnn@chromium.org> Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
* pd: add missing CONFIG_USB_PD_ optionsAlec Berg2014-08-061-2/+14
| | | | | | | | | | | | | Add and undefine CONFIG_USB_PD_ options that were missing from config.h BUG=none BRANCH=none TEST=make -j buildall Signed-off-by: Alec Berg <alecaberg@chromium.org> Change-Id: I0e5d64736f2f04794f226872eaafc0984b48f05e Reviewed-on: https://chromium-review.googlesource.com/211044 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* veyron: Change EC_INT pin to high-Z in S5Chris Zhong2014-08-061-1/+4
| | | | | | | | | | | | | | | | Change EC_INT pin to high-Z to reduce power draw in S5, and reset it to output High in S5S3. BUG=None TEST=Leakage did not happen, other functions also work correctly. BRANCH=None Change-Id: Id77bb9f34f25336cd097344be349f5aa43a75b52 Signed-off-by: Chris Zhong <zyw@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/210545 Reviewed-by: Alexandru Stan <amstan@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* zinger: change source capabilities to support 20V at 3AAlec Berg2014-08-061-1/+1
| | | | | | | | | | | | | Changed source capabilities table to support 20V at 3A. BUG=none BRANCH=none TEST=make -j buildall Change-Id: I9dac730fff7e148a2667da12fd23c35036191dfd Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211022 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus_pd: remove dead code around allowing PD negotiationAlec Berg2014-08-0610-72/+4
| | | | | | | | | | | | | | | | | | | | Remove code for preventing PD negotiation until the battery is at some minimum SOC. This was originally necessary because transitioning voltages would cause the source voltage to go briefly to 0V, which would kill power to the system unless the battery was at some minimum level of charge. But, that isn't true anymore. It is safe to transition up or down in voltage and the source voltage should never drop to 0V. BUG=chrome-os-partner:29499 BRANCH=none TEST=make -j buildall. No need to do any more testing because this code has been disabled for a while. Change-Id: I8a3dca117f01f0f9c7d04b5d489e4a8588a89be6 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211021 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ryu: set PD_DISABLE_DEBUG to 1 by defaultAaron Durbin2014-08-061-1/+1
| | | | | | | | | | | | | | | | In order for the AP to access the SPI part one needs to drive PD_DISABLE_DEBUG to 1. While all the closed-case debugging is being worked out set this signal 1 by default so that the AP can boot. BUG=chrome-os-partner:31149 BRANCH=None TEST=Built and flashed on ryu. SPI works from initial poweron. Change-Id: I1fdb0457da9db07063f86959d9eb969e3bcd83ec Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211141 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
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