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* cr50: Add console and TPM vendor commands to get/set board IDstabilize-9592.82.Bstabilize-9592.67.Bstabilize-9592.55.Brelease-R60-9592.BPhilip Chen2017-06-306-10/+335
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds vendor and console commands to read and write the board ID space in the INFO1 block. Current image's board ID settings are saved in the image header by the latest codesigner. Board ID write attempts are rejected if the board ID space is already initialized, or if the currently running image will not be allowed to run with the new board ID space settings. Error codes are returned to the caller as a single byte value. Successful read command returns 12 bytes of the board ID space contents. The console command always allows to read the board ID value, and allows to write it if the image was built with debug enabled. BUG=b:35586335 BRANCH=cr50 TEST=as follows: - verified that board ID can be read by any image and set by debug images. - with the upcoming patches verified the ability to set and read board ID values using vendor commands. Change-Id: I35a3e2db92175a29de8011172b80091065b27414 Signed-off-by: Philip Chen <philipchen@google.com> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/522234 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org> (cherry picked from commit ee545922389739b39cc0ac7e0f0d1dd8c2c67607) Reviewed-on: https://chromium-review.googlesource.com/557504
* usb_updater: allow symbolic Board IDsVadim Bendebury2017-06-231-10/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When specifying board ID to program, it is convenient to be able to specify the ID as a string, as reported by the RLZ stored in the VPD. With this patch the first component of the board_id command line option is considered a string if it is no longer than 4 bytes. BRANCH=cr50 BUG=b:35587387,b:35587053 TEST=ran the following commands (interleaved with erasing INFO1 on the target): localhost ~ # usb_updater -s -i Board ID space: ffffffff:ffffffff:ffffffff localhost ~ # usb_updater -s -i ABCD localhost ~ # usb_updater -s -i Board ID space: 41424344:bebdbcbb:0000ff00 localhost ~ # usb_updater -s -i Board ID space: ffffffff:ffffffff:ffffffff localhost ~ # usb_updater -s -i 0x41424344:0x1234 localhost ~ # usb_updater -s -i Board ID space: 41424344:bebdbcbb:00001234 localhost ~ # usb_updater -s -i Board ID space: ffffffff:ffffffff:ffffffff localhost ~ # usb_updater -s -i ABCD:0x1234 localhost ~ # usb_updater -s -i Board ID space: 41424344:bebdbcbb:00001234 Change-Id: Ied8b240d60ea50f6fc8633f919ce4bc81ac17727 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/528440 Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit bdbb45b14acf4af6acef045272c845204adc77e3) Reviewed-on: https://chromium-review.googlesource.com/547043
* Cr50: usb_updater: add commands to get/set board idVadim Bendebury2017-06-231-3/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enhances the Cr50 usb_updater to allow to get and set Board ID value saved in the Cr50's INFO1 space using the earlier introduced dedicated vendor commands. Getting or Setting the board ID does not require establishing a connection with the Cr50, the new option is --board_id/-i. When specified without a parameter, the new option will cause the Board ID to be read. When specified with a parameter, the board ID value will be set. The parameter includes one or two values in a single string, the values separated by a colon. The first value is a 4 byte board ID, and the second value is the flags field. The default flags field is set to 0xff00. BRANCH=cr50 BUG=b:35587387,b:35587053 TEST=verified that it is possible to get and set the board ID value using usb_updater, both over USB and TPM. verified that it is not possible to set a new board ID value is the INFO1 space has been already programmed. verified that it is not possible to set a board ID value which would not allow the currently running image to start (even though there is no run time check yet). Change-Id: Ief175d8b2ef3177db13fa86f831914088d9447b0 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/525096 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 25fb7bb3e54b8e68d3e03119a521cfac0a6bb5cb) Reviewed-on: https://chromium-review.googlesource.com/547042
* cr50: usb_updater: add proper vendor command processingVadim Bendebury2017-06-231-39/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | So far vendor command processing has been a second class citizen in the Cr50 usb_updater: return codes were mostly ignored even when using TPM, when using USB there was no way to communicate return codes at all. This patch refactors the source code to use a single function to process vendor commands over both USB and TPM, adding proper passing of the result codes back to the caller in both cases, retrieving the return code from the response header when using TPM and from the first byte of the response payload when using USB. BRANCH=cr50 BUG=b:35587387,b:35587053 TEST=verified that it is possible to update rw13, rw18 and rw20 both over TPM and USB, which indicates that vendor commands are properly handled. Change-Id: I837e17b29d3b025fbca5b1ef49463cfb1729fe6c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/525094 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit b06942187e7025d1334bcd8d0ffa95b225c19179) Reviewed-on: https://chromium-review.googlesource.com/547040
* cr50: usb_updater: do not send setup request unless necessaryVadim Bendebury2017-06-231-21/+26
| | | | | | | | | | | | | | | | | | | | | | There are only two usb_updater actions which require establishing a connection with the Cr50: transferring the firmware image during update and reporting the version of the running image (because the version is reported when the connection is established). This patch refactors usb_updater code to establish the connection only when necessary. BRANCH=cr50 BUG=b:35587387,b:35587053 TEST=verified that 'usb_updater -c' succeeds both issued over USB and TPM Change-Id: I6a0c82eb440c092263d4802f124f458f148a8ab5 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/525095 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 885c02a92d35607bf410e27f27c0b35e67827cf5) Reviewed-on: https://chromium-review.googlesource.com/547041
* usb_updater: when communicating over tpm treat upgrades differentlyVadim Bendebury2017-06-231-13/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | All extension and vendor commands' payloads need to be passed to the processing functions the same way, whether they arrive over /dev/tpm0 or over USB. The upgrade PDUs sent over USB need to include two additional fields which are stripped off by the reassembly layer on the Cr50. This patch makes sure that none of other than EXTENSION_FW_UPGRADE commands sent over /dev/tpm0 by usb_updater have the extra encapsulation. BRANCH=cr50 BUG=b:62106898 TEST=verified that updates work the same way over TPM and USB (which includes sending the 'turn_update_on' commands. Before this patch the turn_update_on command sent by usb_updater over TPM was not processed properly (the timeout value was wrong). Change-Id: I3f4ab7330037f6eb1ce8bac7c63faa5d7c309c94 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/517416 Reviewed-by: Andrey Pronin <apronin@chromium.org> (cherry picked from commit bd0f74a6f49cd3dcbed81738e376a8b05868b4f5) Reviewed-on: https://chromium-review.googlesource.com/547038
* hammer: Prefix configuration descriptor with RO/RW sectionstabilize-9592.15.BNicolas Boichat2017-05-251-1/+8
| | | | | | | | | | | | | | | | | | It is useful for the updater to be able to determine which region is active without having to use the update interface. BRANCH=none BUG=b:35587171 TEST=lsusb -d 18d1:5022 -v -v | grep hammer shows either: RO:hammer_v1.1.6441-e58472daf+ or RW:hammer_v1.1.6441-e58472daf+ depending on the image used Change-Id: I8e1acfbc546330e10ba650b743e3a4c9986b0c30 Reviewed-on: https://chromium-review.googlesource.com/515242 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Nick Sanders <nsanders@chromium.org>
* hammer: Increase hook stack sizeNicolas Boichat2017-05-251-1/+1
| | | | | | | | | | | | | | | | | | Adding entropy takes up to 1028 bytes of stack, let's increase the stack size to 1280 bytes. BRANCH=none BUG=b:38487027 TEST=Flash hammer. On host, reboot hammer to RO: usb_updater2 -r; sleep 0.5; usb_updater2 -s usb_updater2 -e (adds entropy) EC console: check that rollbackinfo shows secret is updated Change-Id: I7e2d506e0fcc3152d27ac1796db95df6b1a931d1 Reviewed-on: https://chromium-review.googlesource.com/513808 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* usb_update: Add support for INJECT_ENTROPY commandNicolas Boichat2017-05-252-0/+26
| | | | | | | | | | | | | | | | | | | | | As part of the pairing process, AP needs to be able to inject some entropy into the base. Let's also define PAIR_CHALLENGE, which will be implemented in a later CL. BRANCH=none BUG=b:38487027 TEST=Flash hammer. On host, reboot hammer to RO: usb_updater2 -r; sleep 0.5; usb_updater2 -s usb_updater2 -e (adds entropy) EC console: check that rollbackinfo shows secret is updated Change-Id: I964bb578c6bfbb1ab5105a70b43682d51df4ed47 Reviewed-on: https://chromium-review.googlesource.com/513807 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* eve: Implement workaround for broken reset flagsDuncan Laurie2017-05-251-0/+12
| | | | | | | | | | | | | | | | | | | | | | Newer Eve boards will lose VBAT on power cycle and therefore cannot successfully save the reset flag state. Implement the workaround that will allow these boards to continue to work for FAFT testing by indicating to the skylake chipset power code that it should skip the PMIC reset when doing 'reboot ap-off'. BUG=b:35585876 BRANCH=none TEST=manual testing on Eve: execute 'reboot ap-off' and ensure that the AP does not power on. Also ensure that 'dut-control power_state:rec' works as expected and does not power off at the recovery screen due to a power button press. Change-Id: Ida1563593d802c00280a55a0d24a504c25fab532 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/514504 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* skylake: Add workaround for boards that cannot save reset flagsDuncan Laurie2017-05-252-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some hardware has an issue where the reset flags are lost on power cycle because the EC backup ram loses power. This causes the flag to not power on the AP (ap-off) to be lost. In order to pass FAFT it is required that boards support this flag, so this commit adds a workaround where the skylake chipset code will call into the board to ask if it has working reset flags and if not it will skip the PMIC reset if the "ap-off" flag has been set. The "ap-off" flag is purely for testing, it is not possible for users to do this without having access to the EC console. (which is currently not possible at all with CCD unless you can also build a debug cr50 image) BUG=b:38187362,b:35585876 BRANCH=none TEST=manual testing on Eve: execute 'reboot ap-off' and ensure that the AP does not power on. Also ensure that 'dut-control power_state:rec' works as expected and does not power off at the recovery screen due to a power button press. Change-Id: If11e17179e9173509b9a6ae1ef0d94a50ba181d0 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/514503 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* eve: Update actual_key_mask for new scancodesDuncan Laurie2017-05-251-1/+1
| | | | | | | | | | | | | | | | | | With the updated scancode matrix the keymask needs to be adjusted to not mask off these particular keys. BUG=b:36735408 BRANCH=none TEST=build and boot on Eve TEST=kbpress 0 3 1; kbpress 0 3 0 reports KEY_LEFTMETA as expected TEST=kbpress 0 5 1; kbpress 0 5 0 reports MSC_SCAN but no key yet (as expected because the kernel does not handle it yet) Change-Id: Iba78741b8a0cd1248a799cf5219cee59ea6630ec Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/514502 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* tcpm: it83xx: reload cc parameter setting during initializationDino Li2017-05-252-0/+3
| | | | | | | | | | | | | | | | The trimmed value of CC parameter setting registers (port0: ff3760h ~ ff3763h, port1: ff3860h ~ ff3863h) will be reset to default after a soft reset (system_reset()). BRANCH=none BUG=none TEST=Console command 'reboot' and checking if the value of cc parameter setting registers are correct (trimmed). Change-Id: Ibf9c72e8aeef36701d72bcb64529735295295cdf Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/513744 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Enable two-byte responses from host command handlers.Jeff Andersen2017-05-253-9/+24
| | | | | | | | | | | | | | | | | | | | Previously, result codes were being stored as `enum ec_status` values. The compiler was forcing this value to only be one byte large, since that's all that was necessary to represent all the values of that enum. This change fixes this bug by switching result code variable types from `enum ec_status` to `uint16_t`. BRANCH=none BUG=none TEST=make buildall -j Change-Id: Iacdca51dc6c1de677d2fbb59ad6dd2572d21ea7f Reviewed-on: https://chromium-review.googlesource.com/513609 Commit-Ready: Jeff Andersen <jeffandersen@google.com> Tested-by: Jeff Andersen <jeffandersen@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* hammer: Store secret in rollback blockNicolas Boichat2017-05-252-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Also, increase console task stack size, as adding entropy requires 780 bytes of stack. BRANCH=none BUG=b:38486828 TEST=Flash hammer rollbackinfo => 1 version 0 block, 1 empty block, RW verifies correctly. rollbackupdate 0; rollbackinfo => No change rollbackupdate 1; reboot => RO refuses to jump to RW rollbackinfo => Secret is [00..00] on both block (so the data was copied correctly) rollbackupdate 2, 3, 4; rollbackinfo => Writes alternate between the 2 blocks. rollbackupdate 2 => Refuses to downgrade version TEST=From blank secret [00..00], 'rollbackaddent Hello' updates it to [ba..fa], which matches the output of: (dd if=/dev/zero bs=1 count=32; echo -n Hello) | sha256sum Change-Id: If63346dfab0a28aa82a7b4c2e46ca89fde3eb990 Reviewed-on: https://chromium-review.googlesource.com/511986 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* rollback: Add option to store secret in rollback infoNicolas Boichat2017-05-255-33/+153
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For pairing purpose, we want to store some secret random number in the base. The most convenient location for this is the rollback region. Since the rollback region can now be updated without incrementing rollback_min_version (when we add entropy to the secret), we need to add an increasing id to tell the code which rollback region is the latest. We also add console commands to manually add entropy. BRANCH=none BUG=b:38486828 TEST=Flash hammer (with or without CONFIG_ROLLBACK_ENTROPY_SIZE set) rollbackinfo => 1 version 0 block, 1 empty block, RW verifies correctly. rollbackupdate 0; rollbackinfo => No change rollbackupdate 1; reboot => RO refuses to jump to RW only when CONFIG_ROLLBACK_ENTROPY_SIZE is set: rollbackinfo => Secret is [00..00] on both blocks (so the data was copied correctly) rollbackupdate 2, 3, 4; rollbackinfo => Writes alternate between the 2 blocks. rollbackupdate 2 => Refuses to downgrade version TEST=From blank secret [00..00], 'rollbackaddent Hello' updates it to [ba..fa], which matches the output of: (dd if=/dev/zero bs=1 count=32; echo -n Hello) | sha256sum Change-Id: I79c3e790e56e21958cc1b4ba05bd4e5f359d3090 Reviewed-on: https://chromium-review.googlesource.com/511985 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* tests: Split utils in 2 subtestsNicolas Boichat2017-05-254-142/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | utils test is a little too large for hammer's small RO, so we split it in 2 test: utils and utils_str. Instead of one test that requires about 8kb extra flash, we have 2 tests that take respectively 3.4kb (utils_str) and 4.6kb (utils) of extra flash. BRANCH=none BUG=chromium:726113 TEST=make BOARD=hammer tests -j util/flash_ec --board=hammer --image=build/hammer/test-utils.bin runtest => pass Repeat with test-utils_str.bin TEST=Before this change: make runtests -j ./util/run_host_test utils | grep Running | sort > old Apply this change: make runtests -j (./util/run_host_test utils; ./util/run_host_test utils_str) \ | grep Running | sort > new diff old new => No difference (except timing) Change-Id: I917d572e671d6ce0a8799508761f55de7bd83133 Reviewed-on: https://chromium-review.googlesource.com/514604 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* tigertool: update pyusb callsNick Sanders2017-05-251-2/+2
| | | | | | | | | | | | | | | Update pyusb calling format to match chroot version. BRANCH=None BUG=b:35849284 TEST=flash, control tigertail successfully Change-Id: I27f34d63c8ddc09c903dcc1da39d18e7dbf15710 Reviewed-on: https://chromium-review.googlesource.com/511668 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* mn50: socket controlsNick Sanders2017-05-255-20/+144
| | | | | | | | | | | | | | | | Add console and usb_spi commands to enable or disable IOs to the socket, so that it will not be powered if a chip is inserted, and control reset and boot_cfg. BUG=b:36910757 BRANCH=None TEST=Check no voltage when socket is disabled. Full spiflash compatibility. Change-Id: Ie4ce0613a868030833abfdccd827acce2753dc6f Reviewed-on: https://chromium-review.googlesource.com/509072 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Fizz: Power on ethernet portDaisuke Nojiri2017-05-241-1/+1
| | | | | | | | | | | | | | This patch sets GPIO_LAN_PWR_EN to output/high to power on the ethernet port at start. BUG=b:37646105 BRANCH=none TEST=Measured V3P3A_LAN is 3.3V. Change-Id: I9629a72d1ffefd1ca2aeb8d2d1f5d74a953d7e58 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/514622 Reviewed-by: Duncan Laurie <dlaurie@google.com>
* host_command: Add host_is_event_setDaisuke Nojiri2017-05-241-0/+11
| | | | | | | | | | | | | host_is_event_set checks whether a given event is set or not. BUG=none BRANCH=none TEST=make buildall Change-Id: I7207fa75d155d5b9adc50430bc1ed703bea7c1b9 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/514208 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Fizz: Prevent active charge port from being resetDaisuke Nojiri2017-05-242-46/+52
| | | | | | | | | | | | | | | Fizz needs to set available power on type-c/pd before PD task starts. PD task tries to reset available power at start-up. This patch prevents those reset attempts from disabling already initialized power sources. BUG=b:37316498 BRANCH=none TEST=Boot Fizz on barrel jack and type-c adapters Change-Id: I807f9d5ae4b4530fa80479b4e1a669569be841c1 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/513582 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* poppy: Fix tcpc power mode handling for ANXFurquan Shaikh2017-05-241-4/+11
| | | | | | | | | | | | | | | | ANX has specific sequencing requirements for PWR_EN and RESETN when entering active and standby modes. The order in which the two GPIOs were set did not match the spec. Update board_set_tcpc_power_mode to ensure correct ordering for both the modes. BUG=b:62043928 BRANCH=None TEST=make -j buildall Change-Id: Ifc2991da87c7b7facd3384f752792371efb9fe1e Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/513477 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* hammer: Better RO/RB/RW split: 44/4/80 kBNicolas Boichat2017-05-231-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's future proof hammer a bit: current flash usage, after applying uncommmited patches, is about 36/50 kB for RO/RW respectively. Let's change the RO/RB/RW layout from 64/4/60 kB to 44/4/80 kB. BRANCH=none BUG=b:38489464 TEST=Enable CONFIG_CMD_FLASH and force WP_L low. TEST=flashwrite 0xa000 0x100 => ok flashwp true; reboot flashinfo => ro_at_boot ro_now YYYYYYYY YYY..... ........ ........ flashread 0xa000 0x100 => Incrementing numbers 0->255 flasherase 0xa000 0x800 => error flashread 0xa000 0x800 => Incrementing numbers 0->255 TEST=(rollback) rollbackupdate 2 => works, rollbackinfo is correct flashwp rb; reboot flashread 0xb000 0x100 => Rollback info followed by 0xff flasherase 0xb000 0x800 => error flashread 0xb000 0x800 => Unchanged rollbackupdate 3 => fails TEST=(rw) flashwp rw; reboot flashinfo => all_at_boot all_now flashread 0x0c000 0x100 flasherase 0x0c000 0x800 => Access denied flashread 0x0c000 0x100 flashread 0x1f800 0x100 => 0xff flashwrite 0x1f800 0x100 => Access denied flashread 0x1f800 0x100 TEST=(norw) flashwp norw; reboot flasherase 0x0c000 0x800 => ok flashread 0x0c000 0x100 => 0xff flashwrite 0x0c000 0x100 flashread 0x0c000 0x100 => Incrementing numbers 0->255 reboot => RW does not verify anymore TEST=(norb) flashwp norb flasherase 0xb000 0x800 flashwrite 0xb000 0x100 rollbackinfo => block 0 shows incorrect values. Change-Id: I915ffe3032e6a70f761c5f7ea2940feaae58366b Reviewed-on: https://chromium-review.googlesource.com/510413 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* power_button_x86: Initialize to on if button is pressedDaisuke Nojiri2017-05-231-0/+3
| | | | | | | | | | | | | | This change sets the initial power button state to init-on if the power button is pressed. BUG=b:37274183 BRANCH=none TEST=Enter recovery mode by power+recovery button press. Change-Id: I6ed849bc303e7cdbcb975ae2a6ff278093c86088 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/486946 Reviewed-by: Duncan Laurie <dlaurie@google.com>
* stm32f4: i2c: process stop condition after slave receiver executedWei-Ning Huang2017-05-231-22/+22
| | | | | | | | | | | | | | | | We need to process the stop condition after slaver receiver is executed, or else we will lost the last byte of the transmission. BRANCH=none BUG=b:38510075 TEST=`make BOARD=rose -j`, AP suspend/resume should complete within 3 secs Change-Id: I6390a908b6c05b875b8bb2c0a124292785110b20 Signed-off-by: Wei-Ning Huang <wnhuang@google.com> Reviewed-on: https://chromium-review.googlesource.com/512463 Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org> Tested-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
* fpc1140: add the finger capture init sequenceVincent Palatin2017-05-231-3/+55
| | | | | | | | | | | | | | | | | | Allow to configure the sensor to detect autonomously finger touch event similar to what is done in the suspend() routine of the kernel fpc1020 driver. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=b:35648259 TEST=make BOARD=eve_fp Change-Id: I8b78bd6bdeecd8658850383417c950d9025fdf40 Reviewed-on: https://chromium-review.googlesource.com/491072 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* eve_fp: add more fingerprint host commandsVincent Palatin2017-05-234-34/+324
| | | | | | | | | | | | | | | | | | | | Move the existing fingerprint host command in the driver and add more of them to prepare the new fingerprint architecture. The commands are mostly stubbed for now. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> CQ-DEPEND=*364728 BRANCH=none BUG=b:35648259 TEST=make BOARD=eve_fp (with and without a private repository) do a fingerprint image capture with 'fptest'. Change-Id: Ie17a5fde2d6470c6272e8059bddc845cea07aff2 Reviewed-on: https://chromium-review.googlesource.com/491071 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* hammer: Do not define CONFIG_ROLLBACK_UPDATE for RW sectionNicolas Boichat2017-05-231-0/+3
| | | | | | | | | | | | BRANCH=none BUG=b:35586219 TEST=make newsizes saves ~420 bytes on hammer and staff. Change-Id: I69a757cc8eb0545cfbb73df04ac36ea6e68ae933 Reviewed-on: https://chromium-review.googlesource.com/511984 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* rollback: Add CONFIG_ROLLBACK_UPDATE config optionNicolas Boichat2017-05-232-19/+24
| | | | | | | | | | | | | | | | Typically, we do not need RW section to be able to update rollback information (rollback block should be protected when RW is running), so we can save some flash space by undefining this option. BRANCH=none BUG=b:35586219 TEST=make newsizes saves ~420 bytes on hammer and staff. Change-Id: Ic457673e56ace083f2ebb1ca0f37f54bf125bfa4 Reviewed-on: https://chromium-review.googlesource.com/511983 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cr50: prepare to release version 0.0.20Vadim Bendebury2017-05-232-2/+2
| | | | | | | | | | | BRANCH=cr50 BUG=None TEST=built an image, observed version number. Change-Id: Iceec4cc72f0148966df0712d0b83a8680dbba686 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/511186 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* cr50: allow vendor command to turn update on even in prod imagesVadim Bendebury2017-05-231-1/+1
| | | | | | | | | | | | | | We want to always be able to update cr50 image to a newer version, even if the AP is not cooperating. BRANCH=cr50 BUG=b:35580805 TEST=verified that update of a prod image is possible Change-Id: I3bbe2c4aca8bf0c3129f4495db0e76405a2ed189 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/511285 Reviewed-by: Nick Sanders <nsanders@chromium.org>
* rose: spi: add SPI master halfduplex modeRong Chang2017-05-222-27/+63
| | | | | | | | | | | | | | | | This change adds 3-wire mode support in STM32 SPI master driver. BUG=chromium:688979 TEST=manual enable CONFIG_SPI_HALFDUPLEX read id from SPI heatmap sensor BRANCH=none Change-Id: I09139dcbfe39a427721451db6842ea712abf2e33 Signed-off-by: Rong Chang <rongchang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/444630 Reviewed-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* usb_updater2: USB updater for common code ECNicolas Boichat2017-05-212-9/+980
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is copied chip/g version as of commit 0e5497db6, plus the following uncommited usb_update patch (CL:458469): a0176a1cc usb_updater: Flush all data from endpoint before trying to update On top of that, a good number of common-code specific modifications are added: new extra commands, new first_response_pdu format, use of FMAP. BRANCH=none BUG=b:35587170 TEST=usb_updater binary identical before and after this change. TEST=make BOARD=hammer -j && \ ( cd extra/usb_updater && make && \ time sudo ./usb_updater2 ../../build/hammer/ec.bin ) TEST=cd extra/usb_updater; make # Jump to RW sudo ./usb_updater2 -j sleep 0.5 # Update RO, then reboot sudo ./usb_updater2 ../../build/hammer/ec.bin sleep 0.5 # Update RW (first tell RO to not jump to RW) sudo ./usb_updater2 -s sudo ./usb_updater2 ../../build/hammer/ec.bin TEST=cd extra/usb_updater; make # Tell RW to jump back to RO sudo ./usb_updater2 -w sleep 0.5 # Update RW, then reboot sudo ./usb_updater2 -s sudo ./usb_updater2 ../../build/hammer/ec.bin TEST=usb_updater2 can update hammer, and read its version, rollback version and key version. Change-Id: I09da894d83e2b4d6c2e46cab301522c27fa0160c Reviewed-on: https://chromium-review.googlesource.com/458468 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Nick Sanders <nsanders@chromium.org>
* stoney: Remove throttle cpu from S3S0 power stateAkshu Agrawal2017-05-201-6/+0
| | | | | | | | | | | | | | This was causing cpu to give lower performance. Hard throttling is being handled in chipset_throttle_cpu. BUG=None TEST=Improved CPU benchmark Change-Id: I0bff47ec0ce60f31fa1f30fdea94d45dfe05aa38 Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com> Reviewed-on: https://chromium-review.googlesource.com/508569 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: YH Lin <yueherngl@chromium.org>
* npcx: system: Fixed bug that ec received unexpected rtc interruptMulin Chao2017-05-191-3/+6
| | | | | | | | | | | | | | | | | | | | | In old system driver, ec clears "Predefined Time Occurred" (PTO) flag before setting a new alarm (PT field in WTC). If PT field is the same as the first 25 TTC bits at this moment, we might receive unexpected rtc interrupt again. This CL sets new alarm first then clears PTO flag to make sure rtc interrupt is issued from new alarm. BRANCH=none BUG=b:38310685 TEST=Duplicated the same symptom by the script in issue 38310685 on gru. No symptoms occurred with the same script for 3 hours by applying this CL. Change-Id: Ia6410d6aa4ef8e2acb7bfadf9192d619045bfa58 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/508572 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* cr50: avoid infinite looping w/ out of range inputsMarius Schilder2017-05-181-970/+981
| | | | | | | | | | | | | | | | | Make the dcrypto ecdsa verify code check that r,s are in range, and not depend on the caller C code to have done so. For instance, s equal to 0 would result in infinite loop during computation of its modular inverse. BRANCH=none BUG=b:35587381 TEST=TCG tests pass Change-Id: I13f7811be030aed9feaa11c45dc68d4bfd08fb76 Reviewed-on: https://chromium-review.googlesource.com/508819 Commit-Ready: Marius Schilder <mschilder@chromium.org> Tested-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* common: sensors: add extra sensor attributesNick Vaccaro2017-05-1830-11/+222
| | | | | | | | | | | | | | | | | | | | | | Adds min_frequency and max_frequency to struct motion_sensor_t. New attributes min_frequency and max_frequency are now returned in ectool's MOTIONSENSE_CMD_INFO response. Incremented ectool's MOTIONSENSE_CMD_INFO version to version 3. Add constants for MIN_FREQUENCY and MAX_FREQUENCY to each sensor's header file. BRANCH=none BUG=chromium:615059 TEST=build/boot and verify MOTIONSENSE_CMD_INFO response on kevin, make buildall -j passes. Change-Id: I66db9715c122ef6bb4665ad5d086a9ecc9c7c93a Signed-off-by: Nick Vaccaro <nvaccaro@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/482703 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* gru: disable CONFIG_CMD_ALS to reduce bin sizeNick Vaccaro2017-05-181-4/+0
| | | | | | | | | | | | | | | Gru ran out of room with upcoming change, disabled CONFIG_CMD_ALS to free up the needed space and keep build from breaking. BRANCH=none BUG=chromium:615059 TEST=verified gru target build doesn't run out of flash space using "make buildall -j" Change-Id: Ifb76ad0fe4693dfa4415370354c6d5af2bd4cc11 Signed-off-by: Nick Vaccaro <nvaccaro@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/490846 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* servo_v4: Added support for HW board ID and limit on VBUS voltageScott Collyer2017-05-182-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The first two versions of servo_v4 (red and blue) have the TPD2E001 ESD between VBUS and CC1/CC2. This part has a breakdown min voltage of 11V. Therefore for these versions of servo_v4, need to limit VBUS to less than the default 20V value. This CL adds support to read two board ID gpios attached to the gpio expansion part. The max VBUS voltage is limited to 9V for red/blue and allowed to be 20V for black. BUG=b:38351574 BRANCH=servo_v4 TEST=Manual Modified a servo_v4 to add the 2 new pullup resistors. Tested with this unit and with a unit that does not have the pullups. Verified that without the pullups the version ID reads a 0 and the max VBUS voltage that will be requested by the CHG port is 9V. Wih the modified servo_v4, verified that the version reads 3 and the CHG port will request up to 20V. Change-Id: Ic41fcbe3a5c000282552c7322b5ab18ebb203cd2 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/507027 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Nick Sanders <nsanders@chromium.org>
* power_button: Allow PB to be idle at power-onDaisuke Nojiri2017-05-183-1/+5
| | | | | | | | | | | | | | | | This change adds CONFIG_POWER_BUTTON_INIT_IDLE. When it's set, the system starts with the power button state idle. It means when the board boots from power-off, it stays at G3. BUG=b:37536389 BRANCH=none TEST=Power on Fizz. Verify it stays at G3. Verify it boots by pressing power button. Change-Id: I09a62a69d9f201b2dc261838cc9b4425fe3a8dc1 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/486945 Reviewed-by: Duncan Laurie <dlaurie@google.com>
* it83xx: ec2i: move 'ec2i_setting' to header file of chipDino Li2017-05-183-88/+44
| | | | | | | | | | | | | | | This enum can be included in common. BUG=none BRANCH=none TEST=build boards: it83xx_evb and reef_it8320 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: Id7014b7de170cb3324c45d43fbf04ebe48a69f5e Reviewed-on: https://chromium-review.googlesource.com/505864 Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* eve: Shut down PMIC in hibernateDuncan Laurie2017-05-181-32/+16
| | | | | | | | | | | | | | | | | Instead of using EC hibernate shut down the PMIC over I2C. This will turn off the DSW rail and the EC completely. The existing wake sources are still able to wake the system. BUG=b:35647896 BRANCH=none TEST=manual testing on Eve board to ensure that wake sources that are expected to wake from G3 are still functional. (AC, power, lid) Change-Id: I91b14ec360190176dba0a8e7c458b2b0ab5b6dcd Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/506719 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* eve: Enable mutable scancode for EVT boardsDuncan Laurie2017-05-182-0/+11
| | | | | | | | | | | | | | | | | | Enable the mutable scancode sets for EVT boards and reassign the existing F13 scancode to instead send the new 0[e0 58] 1[e0 07] scancode instead. BUG=b:36735408 BRANCH=none TEST=manual testing on Eve EVT to ensure that the key that used to send F13 now sends the new scancode. Also test on P1 to ensure that the key still sends F13. Change-Id: Ia134db7b069d5bf10c931ee7ce66dd1ea85d3544 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/506718 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* keyboard_8042: Allow scancode sets to be mutableDuncan Laurie2017-05-183-1/+27
| | | | | | | | | | | | | | | | | | | Add an option to allow the scancode sets to be mutable. The only reason to use this is to allow a scancode to be changed at runtime, for instance to support different keyboards in one image. The side effect of this is the scancode sets are moved out of the shared RO section. BUG=b:36735408 BRANCH=none TEST=make -j buildall Change-Id: Iefb97691d1f295411d7b5db603d9214d41af49fd Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/506717 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hammer: Make keyboard work at firmware screenNicolas Boichat2017-05-186-28/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | First, libpayload expects the keyboard interface index to be 0. Then, hid_iface_request needs to reply to USB_HID_DT_HID request with the content of struct usb_hid_descriptor. With current code, the variable name is generated (and therefore hard to guess), so we create a new set of macros so that we can use a specific variable name. Also, add support for HID Get_Protocol and Set_Protocol, as they are compulsory for devices supporting boot protocol, even though those are mostly no-op for now. Finally, add a note regarding USB HID keyboard boot protocol, to make sure that we do not accidentally change the report format. BRANCH=none BUG=b:36538963 TEST=Keyboard works in FW screen, both trackpad and keyboard still work when AP has booted. TEST=hammer/staff can still be updated (both RO from RW, and RW from RO) Change-Id: Ibea4888385909c9ce3b430464e5805c039d4b9ed Reviewed-on: https://chromium-review.googlesource.com/505796 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* poppy/soraka: Basic LED supportNicolas Boichat2017-05-185-3/+161
| | | | | | | | | | | | | | | | | | | | | | | | This applies the simple rule: Charging port led is on, other is off. When charging, LED is amber, otherwise it's white. Open questions: - Do we want blinking on low battery? On which side(s)? In which AP states? - No blinking in S3? That's ok? - Need to add led blinking support for special debug mode - Recovery mode blinking does not work as LED is powered from a rail that is not on when AP is in S5. BRANCH=none BUG=b:37970194 TEST=Charge from one side, led is first amber, then white when battery is full. Switch side, led behaves the same way. Change-Id: I0531d72cd621148c0d0cce57a32b7310792d9936 Reviewed-on: https://chromium-review.googlesource.com/497372 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* npcx7_evb: Add initial board driver of npcx7 ec evb.Mulin Chao2017-05-1812-7/+402
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the evaluation board driver of npcx7 series ec for testing. If you received the evb which ec is 128-pins package, please notice it has the following limitations. a. No GPIOD7/E0 pins. b. No I2C4_0, I2C4_1, I2C5_1 and I2C6_1 ports. c. No ADC7, ADC8 and ADC9 channels. d. No JTAG port 1. e. Do not enable CONFIG_HIBERNATE_PSL since no PSL circuit on evb. This CL also includes: 1. Modified reset config from srst to sysresetreq in openocd/npcx.cfg. Make sure openocd driver can reset ec by using NVIC_SYSRESETREQ. 2. Add flash utilities for npcx7 ec in openocd/npcx_cmds.tcl. 3. Add npcx7_evb support in flash_ec. BRANCH=none BUG=none TEST=Passed all npcx7 drivers verification on the evb no matter which ec's package is 128 or 144 pins package. Change-Id: I8224d97cd66ce483d70816f47b2e124308f1b69c Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/505832 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* config: allow increasing i2c host packet buffer size with configWei-Ning Huang2017-05-183-2/+12
| | | | | | | | | | | | | | | | | | Some chip supports two owned slave address. The second slave address is used for other purpose such as board specific i2c commands. This option can be set if user of the second slave address requires larger host packet er size. BRANCH=none BUG=b:37187312 TEST=`make BOARD=rose -j` Change-Id: I8d0b04bf4dded55e3957c7b25d849663299593e5 Signed-off-by: Wei-Ning Huang <wnhuang@google.com> Reviewed-on: https://chromium-review.googlesource.com/472288 Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org> Tested-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
* stm32f4: Add stm32f4 I2C slave driverRong Chang2017-05-183-1/+264
| | | | | | | | | | | | | | | | | | This patch clones I2C slave and hostcmd driver from stm32f0. This patch contains contribution from Wei-Ning Huang <wnhuang@chromium.org> for fixing i2c slave transmitter (CL:471726). BUG=chromium:688979 TEST=build and load on dev board, run i2cget/set on host and check return value. BRANCH=none Change-Id: I3d159d5bdd4bda6c229cf6d275ab4982836628dc Signed-off-by: Rong Chang <rongchang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/461037 Tested-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Wei-Ning Huang <wnhuang@chromium.org>
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