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* driver: lsm6dsm: Fix missing eventsYuval Peress2019-05-231-8/+51
| | | | | | | | | | | | | | | | | | | | BUG=b:129159505 BRANCH=None TEST=Ran Android CTS Fixes missing event errors in CTS. This is done by updating the last_fifo_read_ts and checking the interrupt GPIO. If we find that the GPIO is still low at the end of the read, that means that we've gotten new data while reading and never fully empties the FIFO. We know this must have happened some time between the time we read the count and when we were reading the FIFO, for now we'll use the upper bound of this to be safe. Change-Id: I0461f9d2703a3801e57e7769fbfe0e8de750706a Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1620791 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* garg: initial EC imageDevin Lu2019-05-237-0/+782
| | | | | | | | | | | | | | This image is based on bobba PVT from ToT and SKUID is TBD. BUG=b:132668378 BRANCH=octopus TEST=make buildall -j Change-Id: I6471b4ec2cf49d682483782384114594f62f916d Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/1616892 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* kohaku:set EC_INT_L type to open drainYongBeum.Ha2019-05-231-1/+1
| | | | | | | | | | | | | | There is leakage on PP3300 and PP1800 because EC_INT_L is set to push-pull. BUG=b:132211623 BRANCH=none TEST=make -j BOARD=kohaku Change-Id: I6bafc9189023a8ffc6d3a6fa53df3fce2da19d35 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1600937 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* casta:Do not override charge on dead batteryYongBeum Ha2019-05-231-0/+7
| | | | | | | | | | | | | | | | | | | | charger_profile_override() change charging voltage & current as battery temperature. The flag for bad temperature is set when battery is not responsive then the current is set to 0. Charge doesnot charge dead battery and the battery can't wake. Then the system can't power on with dead battery. BUG=b:131126731 BRANCH=octopus TEST=flash EC and check if dead battery is charged. Change-Id: I3a46442344f89d129c4b90b0b7ceb9ffc863fbf3 Signed-off-by: YongBeum Ha <ybha@samsung.com> Reviewed-on: https://chromium-review.googlesource.com/1605298 Tested-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
* console: improve command name length error messageHarry Cutts2019-05-231-4/+5
| | | | | | | | | | | | | | | | I ran into this today and found the "size of array 'field' is negative" somewhat difficult to understand. Using `_Static_assert` allows us to specify a nice error message. BRANCH=none BUG=none TEST=add a command called `antidisestablishmentarianism` and run `make` Change-Id: I965f57854a87ea4923b5d0b3b02b1f89c080b7e8 Signed-off-by: Harry Cutts <hcutts@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1623372 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* rammus: turn USB type-A charging mode on by CONFIG of default mode not CDP.Marco Chen2019-05-231-1/+1
| | | | | | | | | | | | | | | | | | In usb_port_power_smart.c, we restore charging mode to CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE instead of USB_CHARGE_MODE_CDP directly. The benefit is that when we change the default mode, we don't need to amend usb_port_power_smart.c. This should be applied to this board.c as well. BUG=b:130767435 BRANCH=rammus TEST=`make BOARD=rammus -j4` Change-Id: I0aef5bf3856eca82cb210c2a48ba31065e58e710 Signed-off-by: Marco Chen <marcochen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1621450 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* driver: lsm6dsm: Move the interrupt GPIO into sensor structYuval Peress2019-05-237-0/+27
| | | | | | | | | | | | | | | | | This changes allows each board to add a custom configuration for the sensors. In this case particularly setting the GPIO enum that is used for the interrupt signal in the lsm6dsm. BUG=b:129159505 BRANCH=arcada TEST=I ran `make buildall` since this change isn't used yet it doesn't affect run-time behavior. Change-Id: I4a2d5e097d5fd8a45af591a24c4e6e917865a093 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1621747 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* motionsense: Convert in_spoof_mode to a more generic flagsYuval Peress2019-05-234-18/+26
| | | | | | | | | | | | BUG=b:129159505 BRANCH=arcada TEST=I ran `make buildall` since this change isn't used yet it doesn't affect run-time behavior. Change-Id: I01857d679b800f9b53762c659ebd9a018cbf16db Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1612251 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
* flash_log: add vendor command, timestamp base accessorVadim Bendebury2019-05-232-1/+37
| | | | | | | | | | | | | | | | The new vendor command allows to get and increase the flash log timestamp base. BRANCH=cr50, cr50-mp BUG=b:132287488 TEST=verified in the next patch in the series. Change-Id: Idc76012b7e7894b95cd70eeffeb50562a91b9656 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1610720 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* flash_log: add api for setting base timestampVadim Bendebury2019-05-233-7/+117
| | | | | | | | | | | | | | | | | | | | | | | | The Cr50 environment does not have a wall clock, which makes it impossible to associate flash log entries with real time. This patch provides an API which allows to set a base time value and then use it plus current Cr50 uptime to generate more sensible flash log timestamps. Care is taken to ensure that attempts to set timestamp base such that it would cause a log timestamps rollback do not succeed. A unit test is being added to verify this behavior. BRANCH=none BUG=b:132287488 TEST='make buildall -j' (which runs the new tests) succeeds. Change-Id: I7521df1bac5aef67e0cf634c183bf1618655f48d Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1610719 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* common: dptf: Guard against wild sensor IDsEvan Green2019-05-231-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | If developers have not set up TEMP_SENSOR_COUNT correctly, or the caller starts sending wild sensor_id or idx values down, then the EC will do arbitrary reads and writes over its own memory. In one case, the PD log buffer indices are next in memory, so we would see the following spew in the kernel (every 60 seconds, since the kernel only checks that often): [ 138.151937] PDLOG 2019/05/17 22:46:26.913 P0 Disconnected [ 138.158512] PDLOG 2019/05/17 22:46:04.936 P0 Disconnected [ 138.165066] PDLOG 2019/05/17 22:46:04.935 P0 Disconnected [ 138.171643] PDLOG 2019/05/17 22:46:04.935 P0 Disconnected [ 138.178162] PDLOG 2019/05/17 22:46:04.935 P0 Disconnected ... BUG=b:132999028 BRANCH=none TEST=Build and boot hatch, observe no more log spam Change-Id: If2e20972c3268e84bb4cdfa315c6b7f7cb76868f Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1623176 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* common: dptf: Fix function name typoEvan Green2019-05-231-2/+2
| | | | | | | | | | | | | | s/dpft_check_temp_threshold/dptf_check_temp_threshold/ BUG=b:132999028 BRANCH=none TEST=make -j BOARD=hatch Change-Id: I453a154ee9e4a58ce88e7d6ffe34f14ae8b08d65 Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1623175 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* pi3usb9281: Mask OVP, OCP, and recovery interruptsDaisuke Nojiri2019-05-231-3/+3
| | | | | | | | | | | | | | | | | | | | Currently, we're handling only attach and detach interrupt and OVP recovery interrupt causes us to miss detach & attach events. This patch masks all unused interrupts. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/125176293 BRANCH=none TEST=See b/125176293 Change-Id: I8387b96abdc073e608b6373b670cbb684b342736 Reviewed-on: https://chromium-review.googlesource.com/1621881 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* PI3USB9281: Serialize mux setting and BC12 detectionDaisuke Nojiri2019-05-232-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | Currently a PD task and a USB charger task can talk to PI3USB9281 to update mux setting and to get BC12 information interleavingly. We suspect this causes unreliable BC12 detection including detach detection. This patch makes the usb_charger_set_switches API schedule a mux update instead of changing the mux setting by itself wakes up a USB charger task. A USB charger task solely handles BC12 detection and mux setting. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/125176293 BRANCH=nami TEST=Verify BC1.2 and PD charger can be detected correctly and power_supply_info prints 'Discharging' when they're disconnected on Syndra. Change-Id: Iadaf9087be74a4ba0412dd08b95a40eac4e69ce1 Reviewed-on: https://chromium-review.googlesource.com/1622293 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ish: refactor statistic collection and commandJack Rosenthal2019-05-221-59/+45
| | | | | | | | | | | | | | | | | This commit re-writes the power manangment statistic collection and idlestats command to no longer use conditional compilation, and to reduce repetitive code. BUG=b:132178013,b:132929262 BRANCH=none TEST=observed output of idlestats command on arcada_ish, everything appears to be normal Change-Id: I3075eba2ae3f681a2d7d1891f5014de4b6db24a2 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1617079 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Casta: Increase board_hibernate() wait to avoid hard resetsDiana Z2019-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | When hibernating with AC plugged in, casta will try negotiating down to 5V. This negotiation may sometimes take longer than the currently allocated sleep, causing the port partner to go into error recovery (re-sending PS_RDY, followed by soft resets, followed by a hard reset). This hard reset will wake the system back up from hibernation. Increasing this sleep to 300 ms appears to give enough time for a GoodCRC to be send to the PS_RDY message from the charger, avoiding the hard reset. Note that hibernating on AC is not a customer or factory requirement, as the typical EC hibernate scenario is when there is no external power and the battery needs to be conserved. BRANCH=octopus BUG=b:130687403 TEST=flashed to casta EVT, ran hibernate key sequence several times with AC plugged in and verified system hibernated Change-Id: Ia40ee63f3cf9a244ba35b4cc700e2b41eea1dde5 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1584768 Tested-by: YongBeum Ha <ybha@samsung.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: YongBeum Ha <ybha@samsung.com>
* charger/rt946x: Keep backlight in linear modeNicolas Boichat2019-05-222-1/+10
| | | | | | | | | | | | | | | | | | | | | Backlight BLEN register default (and desired) setting is to keep backlight in linear mode ('1'), do not clear that bit when enabling the backlight. There is one more bit in the register (bled_config), but for that one, the default active low setting is correct. BRANCH=none BUG=b:132225489 TEST=Boot krane with software sync disabled, see that default backlight is reasonable. Change-Id: I2e8867ee6d39e2c5eabe64719105e8f463dec2a7 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1621645 Tested-by: Fei Shao <fshao@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Yilun Lin <yllin@chromium.org>
* Flapjack: Enable TCS3400_INT_ODL interrupt if board_version >= 5Daisuke Nojiri2019-05-221-1/+2
| | | | | | | | | | | | | | | | | | Older boards (< 5) use A14 for WPC_EN_L. EC does not use this pin but it has to leave it high-z. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=Verify wireless charging works. Change-Id: I3d07fb10af0c7d07c434ea0e989b0921e8fb6cd5 Reviewed-on: https://chromium-review.googlesource.com/1621075 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: YH Lin <yueherngl@chromium.org>
* Flapjack: Change pull-up to 3300 mV for BATT_ID and LCM_IDDaisuke Nojiri2019-05-223-19/+57
| | | | | | | | | | | | | | | | | | | | | Currently, BATT_ID and LCM_ID are pulled up to 1800 mV. This causes inaccurate reading by ADC. We change the pull-up to 3300 mV. This patch adjusts the thresholds accordingly. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/131857403 BRANCH=none TEST=Verify LCM_ID and BATT_ID are read as expected on board_version=3. Change-Id: I8693211fc6b1a40fb1b788d9c19db3d594f4bdf2 Reviewed-on: https://chromium-review.googlesource.com/1610427 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: YH Lin <yueherngl@chromium.org>
* Flapjack: Export board_version, oem, skuDaisuke Nojiri2019-05-222-3/+7
| | | | | | | | | | | | | | | | | | | | This patch export board_version, oem, sku so that they can be used in other files. It also changes the board_version size to uint8_t. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=Verify CBI info is printed expectedly. Change-Id: Iadc82ce86d19fc4c0bc6eaceb64433b4e25d5dcf Reviewed-on: https://chromium-review.googlesource.com/1621074 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: YH Lin <yueherngl@chromium.org>
* Casta: Adjust charger configs for low battery bootingDiana Z2019-05-221-0/+9
| | | | | | | | | | | | | | | | | | | | | When a locked system boots up with a very low or non-communicating battery, the DUT should refrain from booting S0 in order to avoid hard reset brown outs after the system jumps to RW and begins attempting PD negotiation. BUG=b:131126731 BRANCH=octopus TEST=loaded onto locked casta with low battery, verified that the system didn't boot to S0 until the battery had passed the min battery percent configuration Change-Id: I64736eb1d39883cd95a5e317b1f964354e6f8e41 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1595272 Tested-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
* bq25710: Allow IDCHG to be used as a prochot triggerScott Collyer2019-05-213-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kohaku units are currently using a 2S+1P battery back which is not able to provide sufficient power for peak CPU load when running on battery only. The bq25710 has various triggers for prochot and one of those is IDCHG (battery discharge current). This CL adds a new config option CONFIG_CHARGER_BQ25710_IDCHG_LIMIT_MA to enable this feature in the bq25710. For prochot to be active, the bq25710 must remain in performance mode. Chispet hooks are used to request the bq25710 in/out of performace mode when the IDCHG prochot feature is active. BUG=b:132285560 BRANCH=none TEST=Manual Connected wires to VBAT, PPVAR_SYS, PROCHOT_ODL signals and had a current probe connected to measure IBAT. Verfied that without this CL, VBAT shuts off when IBAT spikes. With this CL, then verified that prochot gets asserted whenever the current spikes to values specified by CONFIG_CHARGER_BQ25710_IDCHG_LIMIT_MA. In addition verified that with this CL, the system can successfully boot and remain powered on even as CPU load gets increased. Change-Id: If13d16f561b76289936d0d75a2b984d2b71b3c37 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1613797 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* Flapjack: Limit VBUS when charge current is < 1ADaisuke Nojiri2019-05-211-17/+35
| | | | | | | | | | | | | | | | | | | | | | | | Currently, when soc is above 85%, the input voltage is limited to 5V. With this patch, the VBUS limitation is applied when soc > 85% and the battery input current is below 1A. When discharging, VBUS can be kept high. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BRANCH=None BUG=b/124370341 TEST=Verify Flapjack can charge with a PD charger above 85%. TEST=Verify VBUS is reduced to 5V when charged through USB-C. TEST=Verify VBUS is reduced to 5V when charged through WPC. Change-Id: Ib47d4881e04c68e5e93a2a2292b37c1471b5e79b Reviewed-on: https://chromium-review.googlesource.com/1573208 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* octopus: Support keypad function on BobbaSue Chen2019-05-213-0/+32
| | | | | | | | | | | | | | | | | | | | | | | 1. Using CONFIG_KEYBOARD_KEYPAD to choose actual_key_mask w or w/o keypad. 2. Enable keypad function on Bobba. 3. Disable scan KSO13 & 14 and modify actual_key_mask for SKU w/o keypad on Bobba. 4. taking care define of TEST_BUILD to prevent broke build since keyboard_cols from keyboard_scan.c is not in test-list-y yet. BUG=b:131095327 BRANCH=octopus TEST=`make buildall` and `make BOARD=bobba tests` both PASS Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I0e98a8f60bf5022503b4a86ee8a5b2bbba3b3825 Reviewed-on: https://chromium-review.googlesource.com/1610390 Commit-Ready: Marco Chen <marcochen@chromium.org> Commit-Ready: David Huang <David.Huang@quantatw.com> Tested-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
* stm32mon: : fix coverity scan issue on a write_wrapper() callNamyoon Woo2019-05-211-1/+7
| | | | | | | | | | | | | | | | | | | This CL fixes coverity scan check issue, which points that there is a call to write_wrapper() missing return value checking. This was added by crrev.com/c/1540496, which is about a sending garbage byte to DUT to avoid reTIMEOUT response repeating. BUG=b:131231369 BRANCH=none TEST=ran flash_ec on scarlet at 9600 bps. flash_ec --board scarlet --image ${IMG} --bitbang_rate 9600 Change-Id: I25ea43ae13d9fbf16b90fba4030c9bb640498453 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1588497 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* FIXUP: driver: Add L3GD20H gyrometer basic driver supportGwendal Grignou2019-05-211-5/+0
| | | | | | | | | | | | | | | | set_data_rate() was called with wrong argument and is not necessary. set_range is called by motion_sensor_init. BUG=none TEST=compile BRANCH=none Change-Id: Ia21911a0d6361e819a8bf381918740f189496c59 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1620692 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org>
* Intelrvp: Add baseboard for Intel RVPsDaniel Gonzalez2019-05-2116-0/+1738
| | | | | | | | | | | | | | | | | | | | | | | | | | Intel-RVP supports Chrome EC via an Add In Card called as MECC (Modular Embedded Controller Card). MECC has a standard spec which defines pin routing and purpose of these pins. These MECC pins are same across all the platforms hence we can have a baseboard for Intel-RVPs and reuse the code for RVP board specific codes. Chrome MECC spec is standardized for Icelake and successor RVPs hence this baseboard code is applicable to Icelake and its successors only. BUG=b:132061907 TEST=Using this baseboard implemented board code for ICLRVP, and it can boot all the way to Chrome OS. BRANCH=none Change-Id: I4de891d4720e8cad83888caf9635f61f2ca11b8b Signed-off-by: Daniel Gonzalez <daniel.d.gonzalez@intel.com> Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1594171 Commit-Ready: Jett Rink <jettrink@chromium.org> Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cr50: prepare to release 0.4.18Vadim Bendebury2019-05-211-1/+1
| | | | | | | | | | | BRANCH=cr50, cr50-mp BUG=b:133187513 TEST=none Change-Id: Ifcddb73577e6510ddc33c97cdf83af1ddcf2a616 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1621073 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Zork/Trembyle: initial setupMartin Roth2019-05-2113-0/+1941
| | | | | | | | | | | | | | | | | | Create Zork baseboard and Trembyle mainboard based on Grunt. Currently, these are a copy of Grunt with the names and copyright dates updated, and will be modified with Trembyle specific settings later. BUG=b:129697474 TEST=make BOARD=trembyle BRANCH=None Change-Id: Ice2e7943d0c013e81ccc4f84ca98c3c6fe1bf4b1 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1554840 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* I2C: Make pass-through debug messages more informativeDaisuke Nojiri2019-05-211-22/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes debug printf messages more informative as follows: - All messages are prefixed with I2C_PTHRU - Don't print pointers for read or write buffers - Print out buffer data With the patch, messages will look as follows: [7.335059 I2C_PTHRU xfer port=1 addr=0x16 rlen=0 flags=0x3] out: 0x03 0x01 0xe0 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=Verify the messages are printed as expected Change-Id: I144b2d1d517070b6cdb492f71baa7f20c27e29b9 Reviewed-on: https://chromium-review.googlesource.com/1604162 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* USB-PD: Consolidate tcpc_config declarations in usb_pd_tcpm.hDaisuke Nojiri2019-05-213-6/+6
| | | | | | | | | | | | | | | | | | Currently, tcpc_config is declared in two places. This patch consolidates declarations in usb_pd_tcpm.h. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: I4f30d06b1eaeb6a83b664de76116d85d65a9fc97 Reviewed-on: https://chromium-review.googlesource.com/1616007 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cr50: Generate new G2F seed.Louis Collard2019-05-212-1/+8
| | | | | | | | | | | | | | | BUG=b:132310780 TEST=flash to soraka, check new seed is generated, repeated when: - no flash space left to write an additional var - previous seed does not exist revert to old build and check old seed is gone BRANCH=none Change-Id: I7ada1a00becae41bda8ef56b0d4dcc5f9b59fd71 Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1610389 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* cr50: Change G2F cert CN to "CrOS"Louis Collard2019-05-213-9/+23
| | | | | | | | | | | | | | BUG=b:132310780 TEST=flash to soraka, retrieve G2F cert, check CN retrieve anonymous U2F cert, check CN unchanged BRANCH=none Change-Id: Id409ac5d534f2ee9e16376d690f58b184f5ac1a6 Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1614581 Reviewed-by: Andrey Pronin <apronin@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Commit-Queue: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* Makefiles.rules: Do not attempt to run fuzzing testsNicolas Boichat2019-05-211-1/+2
| | | | | | | | | | | | | | | | There is a currently a frequent race when running fuzzing tests, let's not run them to avoid continuously breaking the CQ. BRANCH=none BUG=chromium:963768 TEST=make buildall -j => no fuzzing tests are run Change-Id: Ic789dc207ecb064d0918ab04fd8644d0b77f7c0f Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1621447 Reviewed-by: John L Chen <zuan@chromium.org> Commit-Queue: John L Chen <zuan@chromium.org> Tested-by: John L Chen <zuan@chromium.org>
* servo_v4: Enable VBUS voltage and current measurementWai-Hong Tam2019-05-202-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the INA functions on the VBUS of the DUT port (PP_DUT) and the VBUS of the CHG port (PP_CHG). BUG=b:132807223 BRANCH=servo TEST=Typed the console command "ina 0" and returned: > ina 0 Configuration: 4127 Shunt voltage: 10d9 => 10782 uV Bus voltage : 3d3a => 19592 mV Power : 069b => 42275 mW Current : 086d => 2157 mA Calibration : 0400 Mask/Enable : 0008 Alert limit : 0000 Used a multimeter to measure the VBUS on the DUT port. The measured voltage and current are close to the above values. Did the same thing on the CHG port. Change-Id: I1d49540b4685f299437821251cd6422b1c0ac0b8 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1613805 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* servo_v4: Disable syslock and flash commandsWai-Hong Tam2019-05-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | Servo_v4 is used as a testing equipment, not like a normal Chromebook. So we don't syslock the system and WP the flash. Disable these commands to save space. Before: 1136 bytes in flash and 2336 bytes in RAM available on RO After: 1712 bytes in flash and 2344 bytes in RAM available on RO BUG=b:131840808 BRANCH=servo TEST=Built and flashed the servo v4 firmware. Started servod and verified some functions. Change-Id: Ic84d48d984ae9abb1cbbb7b90aaece1f99d9d729 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1613804 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Nick Sanders <nsanders@chromium.org>
* servo_v4: Disable unused features to reduce spaceWai-Hong Tam2019-05-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | The servo_v4 is almost out-of-space. Disable some unused features and console commands to reclaim some space. Before: 176 bytes in flash and 4392 bytes in RAM available on RO After: 1264 bytes in flash and 4400 bytes in RAM available on RO BUG=b:131840808 BRANCH=servo TEST=Built and flashed the servo v4 firmware. Started servod and verified some functions. Change-Id: Ic0e76794d0603fccc2f733cad388f54650d2cd45 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1597959 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
* common: add __maybe_unused attributeJack Rosenthal2019-05-201-0/+11
| | | | | | | | | | | | | | | | | | | | | Functions which might go unused under a particular set of CONFIG_ options have historically been wrapped in an ifdef to clear up compiler warnings about unused functions. Since we are trying to reduce conditional compilation in favor of macros like IS_ENABLED, the Linux kernel style guide suggests using __maybe_unused for these functions. This adds the __maybe_unused macro. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Ia8239ad566b5aa518c258eaab0e4dceada790da4 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1602489 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* tabletmode: ignore lid angle if hall sensor activeJett Rink2019-05-183-15/+42
| | | | | | | | | | | | | | | | | | | | If the 360 degree hall sensor is active, then we should remain in tablet mode even if the lid angle says we are 1 degree since an angle of 360 could wrap around to 1 degree. Also ensure that tablet mode always gets initialized to the correct state at startup (by setting initial value to -1) BRANCH=R75 BUG=b:131785573,b:132178305 TEST=NB_MODE# on arcada does not flutter when the device is at 360 degrees with CL stack. Change-Id: I962a9c23205766080a65d741c6c425452d9de608 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1597189 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* ish: fix printf format for idlestats commandJack Rosenthal2019-05-181-11/+11
| | | | | | | | | | | | | | %ld is for signed numbers, but these are unsigned. BUG=b:132929262 BRANCH=none TEST=used idlestats command on arcada, verified correct output Change-Id: Iffe405ae0d62159d8036248593ed0993e7a5742a Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1617068 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* USB PD: Don't attempt to exit mode on a suspended portDiana Z2019-05-171-11/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | Since suspended ports run a very tight while loop which does not include the pd_task's event processing, sysjumping an unlocked system with a suspended port hangs forever. A suspended port cannot be in an alternate mode, so this change skips setting PD_EVENT_SYSJUMP for such ports (which, currently, is only used to trigger the exit mode sequence). In the unlikely event that processing a PD interrupt causes the port to suspend after this check and before PD_EVENT_SYSJUMP is set, the sysjump loop will also send the reply event to the caller. BUG=b:131855159 BRANCH=None TEST=set a phaser port to fail TCPC initialization, verified that "sysjump RW" can still succeed with suspended port Change-Id: I948dd419718d0eb2e5ade58970ed36a8bd51b272 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1613640 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* servo_v4: fix in displaying CCD polarityNamyoon Woo2019-05-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From crrev.com/c/1529724, servo-v4 console displays the ccd polarity in opposite manner. 2019-05-15 11:53:59 [583.849805 CCD: connected noflip] 2019-05-15 11:54:01 adC 2019-05-15 11:54:01 CHG_CC1_PD = 1708 2019-05-15 11:54:01 CHG_CC2_PD = 33 2019-05-15 11:54:01 DUT_CC1_PD = 1637 2019-05-15 11:54:01 DUT_CC2_PD = 1625 2019-05-15 11:54:01 SBU1_DET = 3092 2019-05-15 11:54:01 SBU2_DET = 24 2019-05-15 11:54:01 SUB_C_REF = 569 2019-05-15 11:54:20 C1 st3 2019-05-15 11:54:20 C1 st5 2019-05-15 11:54:20 [604.585404 CCD: connected flip] 2019-05-15 11:54:23 adc 2019-05-15 11:54:24 CHG_CC1_PD = 1712 2019-05-15 11:54:24 CHG_CC2_PD = 32 2019-05-15 11:54:24 DUT_CC1_PD = 1616 2019-05-15 11:54:24 DUT_CC2_PD = 1644 2019-05-15 11:54:24 SBU1_DET = 20 2019-05-15 11:54:24 SBU2_DET = 2955 2019-05-15 11:54:24 SUB_C_REF = 611 BUG=None BRANCH=None TEST=manually build fw and checked. 2019-05-15 12:07:46 [27.057955 CCD: connected noflip] 2019-05-15 12:07:47 adc 2019-05-15 12:07:48 CHG_CC1_PD = 1705 2019-05-15 12:07:48 CHG_CC2_PD = 4 2019-05-15 12:07:48 DUT_CC1_PD = 1617 2019-05-15 12:07:48 DUT_CC2_PD = 1645 2019-05-15 12:07:48 SBU1_DET = 20 2019-05-15 12:07:48 SBU2_DET = 3102 2019-05-15 12:07:48 SUB_C_REF = 592 2019-05-15 12:08:05 [45.191161 CCD: connected flip] 2019-05-15 12:08:06 adc 2019-05-15 12:08:08 CHG_CC1_PD = 1704 2019-05-15 12:08:08 CHG_CC2_PD = 4 2019-05-15 12:08:08 DUT_CC1_PD = 1638 2019-05-15 12:08:08 DUT_CC2_PD = 1625 2019-05-15 12:08:08 SBU1_DET = 2970 2019-05-15 12:08:08 SBU2_DET = 23 2019-05-15 12:08:08 SUB_C_REF = 563 Change-Id: I0e8540fb30460827772fefd63a3426d67fa85092 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1613650 Reviewed-by: Nick Sanders <nsanders@chromium.org>
* flash_ec: prevent null entry in dut-control recovery listNamyoon Woo2019-05-171-2/+8
| | | | | | | | | | | | | | | | | | With some faulty platforms, dut-control might fail and dut-control recovery list might have a null entry. On flash_ec exit, the command run "dut-control ''" displays a long error message, which confuses users. This CL prevents that happening. BUG=None BRANCH=None TEST=manually ran on hatch, scarlet and coral Change-Id: I26b8c46b5ce6ff529cd368adeb6b24a01ed14566 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1614360 Reviewed-by: Matthew Blecker <matthewb@chromium.org>
* g: do not destroy manufacturing space by flasheraseVadim Bendebury2019-05-172-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | When modifying flasherase behavior last time around, it was mistakenly presumed that the manufacture_space field was set during Chrome OS device manufacturing. In fact it is set during chip manufacture and should be preserved. BRANCH=none BUG=b:132720245 TEST=using a device with H1 with cert seeds present: - install CR50_DEV=1 image containing this patch - install a recent prod image (it is not yet running, as its version is lower than the ToT) - on Cr50 console run . flasherase . rollback - observe the released image start and successfully complete TPM manufacture process. Change-Id: Id028ffc51bb69810a0564c915b1be944ff5f1d89 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1615422 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* common: chip_save_reset_flags takes uint32_tJack Rosenthal2019-05-175-5/+5
| | | | | | | | | | | | | | | The getters and setters for the reset flags should take and return the same type. `uint32_t' seems the more appropraiate type than `int', so change the setter to take `uint32_t'. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I50928a114858dd51034a048520efa849f5182bd0 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1615648 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* pd_protocol: Add ready_state_holdoff_timer.Aseda Aboagye2019-05-171-17/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recently a sink holdoff timer was added to the PD stack which allowed the state machine to prevent initiating any messages for 200ms after entering the SNK_READY state. This was to give time for some chatty sources to send messages to avoid a collision. Apparently, the same thing can happen when we are a source (collision with chatty sink). This commit reuses the holdoff timer for resolution as a source as well, which starts after an explicit contract is established. In order to prevent any potential new collisions, some jitter based off of the system timestamp is added to the holdoff timer. BUG=b:132202148, chromium:925618 BRANCH=firmware-atlas-11827.B TEST=Flash atlas, plug in a fully featured C-C cable between atlas and the LG 27UK850-W, verify that no conflict occurs and external display always works. TEST=Verify that no messages are initiated by the source within 200ms of sending PS_RDY. TEST=Flash nocturne, verify Dell U3818DW still works over C-C cable. TEST=Flash nocturne, verify CableMatters MST DP hub still works with charge through. TEST=Verify with Twinkie that messages are sent at varied timestamps between 200-300ms in the SNK/SRC_READY state. Change-Id: I195199de271950ae09c2b26194ddc5f271b296a0 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1600510 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* servo_v4: Remove console command history.Aseda Aboagye2019-05-171-0/+1
| | | | | | | | | | | | | | | | | servo_v4 is tight on space, so remove the history console command to gain some space. BUG=None BRANCH=None TEST=make -j BOARD=servo_v4 Change-Id: Idba1b05335e31f655e98883abdd15000e6310c41 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1613799 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Nick Sanders <nsanders@chromium.org>
* bq25710: Adjust settings to limit VSYS droop with no batteryScott Collyer2019-05-172-7/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When there is no battery present VSYS is set to the value defined in register 0x3E. The reset value of this register is based on what type of battery pack is used. In addition to this, big core systems such as CML can a peak power draw that exceeds the external USB PD adapters limit. This can lead to a VSYS collapse which then will cause the AP to sequence out of S0. This CL modifies 3 default settings for the bq25710 to reduce the likelihood of VSYS droop leading to the AP exiting S0. The primary change here is enabling prochot to be active when VSYS is operating within a threshold of VSYS_MIN. As mentioned above, in the no battery case, this will always be true which results in prochot being continuosly asserted. In addition, when a battery is present, but deeply discharged, prochot would be similarly asserted until the bq25710 exits its precharge state. In addition to the settings change, the reset register control bit is set at the beginning of the init routine to ensure that following EC resets the bq25710 always starts in the same state as it does following a power cycle event. BUG=b:130209125 BRANCH=none TEST=Verfied that when using both a 45W and 60W USB PD external charger that Hatch can boot successfully without a battery. In particular tested that without setting BQ25710_PROCHOT_PROFILE_VSYS hatch fails to boot successfully to the kernel, but does when this bit is set. Also with scope verified that prochot is continuosly asserted when there is no battery present. Change-Id: I450f735bca861baa5aae45af70fd8344a618f609 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1580184 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* kohaku: Add support for Dyna batteryScott Collyer2019-05-172-39/+10
| | | | | | | | | | | | | | | | | | | This CL adds support for the battery that's currently being used with Kohaku systems. Without this support the AP won't be powered on automatically when only on battery power. BUG=b:132272081 BRANCH=none TEST=Verifed that 'battery found' message is in EC console log and that AP boots automatically when AC power is not connected. Change-Id: I2f9e0f09cf3d2caad33ed62e2b8f42a609b34fc3 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1603470 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* kohaku: Fix the GPIO pin assignment for USB_C0_BC12_CHG_DET_LScott Collyer2019-05-171-1/+1
| | | | | | | | | | | | | | | | This was misread as GPO06, but it is connected to GPOD6. BUG=b:130197995 BRANCH=none TEST=make -j BOARD=kohaku Change-Id: Ia780306b655898718e131de7fd4452a26bb07423 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1582966 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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